2025-12-12 03:30:28.172 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.142.20:5700'
2025-12-12 03:30:28.172 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.142.20:5802)
2025-12-12 03:30:28.172 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.142.20:5801)
2025-12-12 03:30:28.172 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.142.22:6700'
2025-12-12 03:30:28.172 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.142.22:6802)
2025-12-12 03:30:28.172 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.142.22:6801)
2025-12-12 03:30:28.172 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.142.20:5700/1'
2025-12-12 03:30:28.172 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.142.20:5804)
2025-12-12 03:30:28.172 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.142.20:5803)
2025-12-12 03:30:28.172 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.142.20:5700/2'
2025-12-12 03:30:28.172 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.142.20:5806)
2025-12-12 03:30:28.172 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.142.20:5805)
2025-12-12 03:30:28.172 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.142.20:5700/3'
2025-12-12 03:30:28.172 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.142.20:5808)
2025-12-12 03:30:28.172 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.142.20:5807)
2025-12-12 03:30:28.172 [INFO] fake_trx.py:424 Init complete
2025-12-12 03:30:28.172 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-12 03:30:28.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:28.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:28.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:28.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:28.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:28.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:32.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:32.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:32.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:32.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:32.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 0 -> 1
2025-12-12 03:30:32.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:30:32.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:30:32.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:32.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:32.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:32.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:30:32.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:32.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 0 -> 1
2025-12-12 03:30:32.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:30:32.700 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:30:32.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:32.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:32.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:32.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:30:32.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:32.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 0 -> 1
2025-12-12 03:30:32.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:30:32.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:30:32.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:32.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:32.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:32.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:30:32.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:32.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 0 -> 1
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:30:32.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:30:32.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:30:32.711 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:30:32.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:30:33.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:30:33.252 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:30:33.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:33.253 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:30:33.253 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:30:33.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:33.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:33.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:33.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:33.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:33.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:33.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:33.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:33.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:33.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:33.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.656 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:30:33.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:33.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:33.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:33.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:33.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:33.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:33.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:33.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:33.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:33.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:33.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:33.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:33.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:33.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:33.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:33.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:33.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:34.130 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:30:34.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:34.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:34.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:34.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:34.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:34.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:34.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:34.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:34.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:34.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:34.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:34.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:34.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:30:34.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:34.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:34.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:34.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:34.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:34.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:34.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:35.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:35.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:35.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:35.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:35.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:35.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:35.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:35.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:35.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:35.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:35.069 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:30:35.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:35.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:35.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:35.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:35.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:35.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:35.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:30:35.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:35.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:35.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:35.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:35.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:35.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:35.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:35.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:35.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:35.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:35.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:35.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:35.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:35.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:36.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:30:36.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:30:36.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:36.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:36.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:36.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:36.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:36.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:36.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:36.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:36.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:36.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:36.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:36.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:36.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:36.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:36.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:36.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:36.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:36.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:36.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:36.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:36.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:36.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:30:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:30:37.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:37.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:37.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:37.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:37.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:37.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:37.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:37.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:37.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:37.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:37.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:37.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:37.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:37.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:37.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:37.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:37.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:37.895 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:30:38.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:38.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:38.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:38.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:38.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:38.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:38.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:38.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:38.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:38.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:38.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:38.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:38.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:38.369 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:30:38.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:38.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:38.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:38.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:38.845 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:30:39.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:39.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:39.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:39.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:39.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:39.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:39.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:39.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:39.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:39.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:39.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:39.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:39.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:39.318 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:30:39.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:39.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:39.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:39.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:30:40.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:40.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:40.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:40.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:40.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:40.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:40.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:40.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:40.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:40.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:40.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:40.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:40.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:40.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:30:40.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:40.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:40.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:40.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:40.741 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:30:41.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:41.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:41.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:41.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:41.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:41.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:41.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:41.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:41.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:41.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:41.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:41.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:41.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:41.214 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:30:41.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:41.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:41.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:41.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:41.690 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:30:42.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:42.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:42.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:30:42.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:42.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:42.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:42.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:30:42.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:42.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:42.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:42.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:42.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:42.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:42.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:42.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:42.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:42.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.112 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:30:43.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:43.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:43.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:43.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:43.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:43.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:43.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:43.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:43.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:43.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:43.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:43.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:43.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:43.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.583 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:30:43.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:43.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:43.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:43.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:43.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:43.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:43.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:43.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:43.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:43.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:43.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:43.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:43.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:43.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:43.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.054 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:30:44.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:44.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:44.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:44.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:44.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:44.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:44.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:44.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:44.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:44.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:44.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:44.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:44.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:44.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:44.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:44.525 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:30:44.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:44.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:44.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:44.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:44.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:44.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:44.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:44.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:44.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:44.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:44.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:44.996 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:30:45.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:45.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:45.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:45.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:45.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:45.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:45.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:45.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:45.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:45.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:45.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:45.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:30:45.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:30:45.472 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:30:45.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:45.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:30:45.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:30:45.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:30:45.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:45.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:45.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:45.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:45.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:45.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:45.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:45.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:45.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:45.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:45.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:45.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:45.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:45.931 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:30:45.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:45.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:45.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:45.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:45.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:50.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:50.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:50.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:50.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:50.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:50.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:50.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:50.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:50.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:50.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:50.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:30:50.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:30:50.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:30:50.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:50.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:50.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:50.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:30:50.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:50.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:30:50.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:30:50.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:30:50.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:50.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:50.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:50.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:30:50.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:50.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:30:50.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:30:50.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:30:50.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:50.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:50.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:50.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:30:50.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:50.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:30:50.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:30:50.966 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:30:50.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:50.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:50.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:30:51.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:30:51.485 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:30:51.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.487 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:30:51.489 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:30:51.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:51.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:51.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:51.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.921 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:30:51.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:51.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:51.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:51.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:30:52.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:52.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:52.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:52.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:52.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:52.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:52.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:52.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:52.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:52.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:52.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:52.613 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:30:52.614 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.614 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.614 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.614 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.615 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.615 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.615 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:52.615 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=357 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:57.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:57.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:57.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:57.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:57.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:57.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:57.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:57.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:57.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:57.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:30:57.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:30:57.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:30:57.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:30:57.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:57.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:57.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:57.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:30:57.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:30:57.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:57.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:30:57.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:30:57.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:57.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:30:57.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:30:57.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:30:57.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:30:57.641 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:30:57.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:30:57.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:30:57.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:30:58.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:30:58.162 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:30:58.164 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:30:58.166 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:30:58.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:58.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:30:58.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:30:58.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:30:58.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:58.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:30:58.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:30:58.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:30:58.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:30:58.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:30:58.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:30:58.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:30:58.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:30:58.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:30:58.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:30:58.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:30:58.249 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:30:58.250 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.250 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.250 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.250 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.250 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.252 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.252 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.252 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.252 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.252 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.253 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.254 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.254 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.254 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.254 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.254 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.255 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.256 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.256 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.256 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.256 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.256 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:30:58.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:31:03.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:31:03.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:03.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:03.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:03.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:03.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:03.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:03.257 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:03.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:03.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:31:03.260 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:31:03.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:31:03.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:03.261 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:03.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:03.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:31:03.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:03.262 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:03.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:31:03.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:03.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:31:03.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:31:03.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:31:03.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:03.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:03.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:03.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:31:03.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:03.268 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:31:03.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:31:03.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:31:03.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:31:03.272 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:31:03.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:03.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:03.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:31:03.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:31:03.787 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:31:03.789 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:31:03.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:03.790 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:31:03.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:03.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:03.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:03.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:03.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:03.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:03.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:03.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:03.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:03.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:31:03.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:31:03.862 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:31:03.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.863 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.863 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.863 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.863 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.863 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.864 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.864 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.864 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.864 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.864 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.865 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:03.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:08.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:31:08.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:31:08.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:08.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:08.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:08.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:08.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:08.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:08.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:08.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:08.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:08.877 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:31:08.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:08.878 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:08.879 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:31:08.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:08.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:08.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:31:08.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:08.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:31:08.884 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:31:08.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:31:08.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:31:08.885 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:31:08.885 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:31:08.885 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:08.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:08.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:31:09.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:31:09.407 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:31:09.409 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:31:09.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:09.411 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:31:09.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:09.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:09.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:09.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:09.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:09.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:09.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:09.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:09.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:09.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:09.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:31:09.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:31:09.540 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:31:09.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:14.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:31:14.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:31:14.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:14.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:14.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:14.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:14.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:31:14.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:14.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:14.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:31:14.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:31:14.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:31:14.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:31:14.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:14.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:14.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:31:14.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:31:14.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:31:14.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:14.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:31:14.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:31:14.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:14.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:31:14.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:31:14.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:31:14.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:31:14.586 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:31:14.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:31:14.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:31:14.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:31:14.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:31:14.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:31:15.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:31:15.112 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:31:15.114 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:31:15.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:15.116 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:31:15.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:15.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:15.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:15.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:15.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:15.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:15.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:15.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:15.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:15.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:15.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:15.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:15.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:15.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:15.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:31:15.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:15.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:15.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:15.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:16.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:31:16.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:31:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:16.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:16.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:16.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:16.951 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:31:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:31:17.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:17.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:17.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:17.893 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:31:18.363 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:31:18.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:18.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:18.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:18.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:18.834 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:31:19.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:19.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:19.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:19.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:19.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:19.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:19.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:19.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:19.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:19.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:19.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:19.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:19.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:19.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:19.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:31:19.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:19.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:19.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:19.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:19.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:31:19.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:31:19.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:31:19.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:31:19.775 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:31:20.247 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:31:20.717 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:31:21.188 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:31:21.659 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:31:22.130 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:31:22.600 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:31:23.071 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:31:23.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:23.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:23.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:23.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:23.541 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:31:23.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:23.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:23.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:23.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:23.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:23.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:23.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:23.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:23.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:23.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:23.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:23.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:23.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:23.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:31:24.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:31:24.954 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:31:25.425 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:31:25.896 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:31:26.367 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:31:26.837 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:31:27.308 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:31:27.779 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:31:27.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:27.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:27.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:27.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:27.982 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=2902 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:31:27.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:27.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:27.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:27.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:27.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:27.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:27.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:27.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:28.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:28.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:28.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:28.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:28.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:28.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:28.249 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:31:28.720 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:31:29.191 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:31:29.662 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:31:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:31:30.603 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:31:31.074 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:31:31.544 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:31:32.015 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:31:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:32.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:32.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:32.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:32.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:32.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:32.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:32.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:32.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:32.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:32.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:32.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:32.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:32.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:32.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:32.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:32.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:32.486 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:31:32.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:31:33.428 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:31:33.898 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:31:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:31:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:31:35.311 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:31:35.781 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:31:36.252 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:31:36.723 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:31:36.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:36.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:36.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:36.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:36.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:36.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:36.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:36.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:36.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:36.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:36.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:36.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:36.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:36.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:36.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:36.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:36.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:37.194 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:31:37.665 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:31:37.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:38.135 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:31:38.606 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:31:39.077 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:31:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:31:40.018 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:31:40.489 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:31:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:31:41.431 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:31:41.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:41.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:41.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:41.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:41.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:41.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:41.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:41.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:41.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:41.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:41.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:41.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:41.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:41.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:41.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:41.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:41.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:41.901 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:31:42.372 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:31:42.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:42.843 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:31:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:31:43.785 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:31:44.255 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:31:44.726 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:31:45.197 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:31:45.667 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:31:46.138 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:31:46.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:46.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:46.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:46.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:46.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:46.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:46.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:46.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:46.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:46.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:46.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:46.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:46.609 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:31:46.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:46.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:46.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:46.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:46.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:46.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:31:47.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:47.551 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:31:48.021 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 03:31:48.492 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 03:31:48.963 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 03:31:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 03:31:49.905 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 03:31:50.375 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 03:31:50.846 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 03:31:51.317 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 03:31:51.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:51.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:51.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:51.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:51.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:51.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:51.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:51.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:51.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:51.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:51.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:51.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:51.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:51.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:51.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:51.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:51.787 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 03:31:52.258 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 03:31:52.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:52.728 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 03:31:53.200 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 03:31:53.671 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 03:31:54.141 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 03:31:54.612 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 03:31:55.083 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 03:31:55.554 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 03:31:56.024 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 03:31:56.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:56.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:56.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:56.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:56.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:31:56.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:31:56.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:31:56.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:56.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:56.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:56.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:31:56.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:31:56.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:31:56.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:56.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:31:56.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:31:56.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:56.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:31:56.495 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 03:31:56.966 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 03:31:57.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:31:57.436 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 03:31:57.908 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 03:31:58.378 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 03:31:58.849 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 03:31:59.320 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 03:31:59.791 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 03:32:00.261 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 03:32:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 03:32:01.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:01.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:01.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:01.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:01.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:01.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:01.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:01.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:01.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:01.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:01.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:01.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:01.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:01.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:01.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:01.203 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 03:32:01.674 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 03:32:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:02.144 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 03:32:02.615 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 03:32:03.086 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 03:32:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 03:32:04.028 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 03:32:04.498 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 03:32:04.969 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 03:32:05.440 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 03:32:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:05.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:05.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:05.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:05.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:05.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:05.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:05.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:05.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:05.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:05.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:05.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:05.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:05.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:05.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:05.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:05.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:05.910 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 03:32:06.381 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 03:32:06.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:06.852 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 03:32:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 03:32:07.794 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 03:32:08.264 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 03:32:08.735 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 03:32:09.206 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 03:32:09.677 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 03:32:10.147 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 03:32:10.618 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 03:32:10.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:10.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:10.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:10.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:10.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:10.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:10.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:10.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:10.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:10.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:10.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:10.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:10.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:10.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:10.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:10.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:11.089 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 03:32:11.560 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 03:32:12.030 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 03:32:12.501 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 03:32:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 03:32:13.443 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 03:32:13.913 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 03:32:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 03:32:14.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:14.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:14.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:14.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:14.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:14.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:14.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:14.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:14.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:14.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:14.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:14.854 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 03:32:14.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:14.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:14.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:15.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:15.326 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 03:32:15.796 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 03:32:16.267 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 03:32:16.738 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 03:32:17.209 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 03:32:17.679 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 03:32:18.150 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 03:32:18.621 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 03:32:19.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:19.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:19.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:19.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:19.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:19.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:19.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:19.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:19.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:19.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:19.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:19.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:19.092 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 03:32:19.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:19.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:19.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:19.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:19.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:19.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 03:32:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 03:32:20.504 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 03:32:20.975 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 03:32:21.446 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 03:32:21.917 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 03:32:22.387 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 03:32:22.857 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 03:32:23.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:23.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:23.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:23.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:23.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:23.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:23.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:23.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:23.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:23.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:23.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:23.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:23.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:23.329 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 03:32:23.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:23.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:23.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:23.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:23.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:23.798 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 03:32:24.267 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 03:32:24.738 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 03:32:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 03:32:25.680 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 03:32:26.150 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 03:32:26.621 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 03:32:27.092 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 03:32:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:27.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:27.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:27.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:27.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:27.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:27.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:27.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:27.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:27.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:27.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:27.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:27.562 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 03:32:27.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:27.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:27.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:27.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:27.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:27.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:28.033 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 03:32:28.504 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 03:32:28.975 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 03:32:29.446 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 03:32:29.916 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 03:32:30.387 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 03:32:30.858 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 03:32:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 03:32:31.799 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 03:32:31.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:31.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:31.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:31.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:31.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:31.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:31.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:31.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:31.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:31.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:31.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:31.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:32.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:32.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:32.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:32.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:32.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:32.269 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 03:32:32.741 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 03:32:33.212 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 03:32:33.692 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 03:32:34.161 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 03:32:34.631 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 03:32:35.102 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 03:32:35.572 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 03:32:36.043 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 03:32:36.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:36.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:36.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:36.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:36.228 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=17688 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:36.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:36.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:36.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:36.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:36.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:36.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:36.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:36.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:36.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:36.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:36.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:36.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:36.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:36.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:36.514 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 03:32:36.985 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 03:32:37.455 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 03:32:37.925 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 03:32:38.396 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 03:32:38.867 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 03:32:39.338 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 03:32:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 03:32:40.279 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 03:32:40.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:40.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:40.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:40.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:40.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:40.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:40.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:40.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:40.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:40.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:40.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:40.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:40.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:40.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:40.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:40.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:40.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:40.751 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 03:32:41.221 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 03:32:41.692 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 03:32:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 03:32:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-12 03:32:43.105 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2025-12-12 03:32:43.575 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2025-12-12 03:32:44.046 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2025-12-12 03:32:44.517 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2025-12-12 03:32:44.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:44.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:44.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:44.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:44.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:44.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:44.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:44.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:32:44.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:44.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:44.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:44.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:44.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:32:44.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:32:44.750 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:32:44.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:44.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:49.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:32:49.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:32:49.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:49.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:49.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:49.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:49.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:49.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:32:49.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:49.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:32:49.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:32:49.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:32:49.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:32:49.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:32:49.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:32:49.776 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:32:49.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:32:49.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:49.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:49.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:32:49.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:32:49.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:32:49.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:32:49.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:32:49.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:32:49.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:32:49.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:32:49.784 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:32:49.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:49.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:32:49.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:32:49.786 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:32:54.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:32:54.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:32:54.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:54.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:54.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:54.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:32:54.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:32:54.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:54.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:32:54.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:32:54.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:32:54.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:32:54.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:32:54.830 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:54.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:32:54.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:32:54.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:32:54.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:32:54.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:32:54.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:32:54.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:32:54.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:54.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:32:54.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:32:54.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:32:54.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:32:54.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:32:54.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:32:54.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:32:54.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:32:54.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:32:54.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:32:54.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:32:54.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:32:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:32:54.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:32:54.850 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:32:54.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:32:54.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:54.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:32:55.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:32:55.376 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:32:55.378 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:32:55.379 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:32:55.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:55.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:55.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:55.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:55.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:55.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:55.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:55.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:55.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:55.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:55.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:55.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:55.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:55.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:55.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:55.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:55.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:55.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:55.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:55.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:55.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:55.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:55.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:55.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:32:55.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:55.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:55.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:32:56.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:56.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:56.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:56.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:56.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:56.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:32:56.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:56.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:56.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:32:56.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:56.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:56.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:56.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:56.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:56.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:56.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:32:57.243 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:32:57.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:57.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:57.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:57.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:57.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:57.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:57.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:57.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:57.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:57.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:57.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:57.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:57.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:57.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.720 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:32:57.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:57.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:57.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:57.829 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=637 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:32:57.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:57.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:57.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:57.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:57.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:57.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:57.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:57.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:57.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:57.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:57.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:57.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:57.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:57.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:57.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:32:58.197 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:32:58.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:58.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:58.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:58.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:58.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:58.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:58.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:58.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:58.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:58.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:58.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:58.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:58.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:58.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.674 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:32:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:58.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:58.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:32:58.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:58.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:58.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:58.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:58.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:58.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:58.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:58.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:58.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:58.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:58.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:58.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:58.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:58.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:58.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:59.151 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:32:59.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:59.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:59.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:59.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:59.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:32:59.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:32:59.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:32:59.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:59.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:59.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:59.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:32:59.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:32:59.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:32:59.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:32:59.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:32:59.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:32:59.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:59.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:32:59.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:32:59.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:32:59.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:32:59.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:32:59.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:00.103 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:33:00.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:00.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:00.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:00.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:00.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:00.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:00.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:00.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:00.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:00.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:00.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:00.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:00.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:00.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.576 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:33:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:00.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:00.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:00.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:00.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:00.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:00.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:00.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:00.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:00.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:00.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:00.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:00.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:00.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:00.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.054 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:33:01.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:01.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:01.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:01.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:01.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:01.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:01.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:01.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:01.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:01.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:01.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:01.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:01.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.529 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:33:01.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:01.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:01.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:01.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:01.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:01.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:01.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:01.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:01.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:01.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:01.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:01.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:01.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:01.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:01.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:33:02.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:02.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:02.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:02.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:02.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:02.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:02.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:02.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:02.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:02.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:02.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:02.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:02.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:02.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:33:02.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:02.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:02.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:02.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:02.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:02.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:02.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:02.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:02.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:02.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:02.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:02.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:02.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:02.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:02.960 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:33:03.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:03.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:03.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:03.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:03.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:03.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:03.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:33:03.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.848 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1927 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:03.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:03.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:03.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:03.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:03.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:03.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:03.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:33:03.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:03.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:03.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:03.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:04.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:04.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:04.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:04.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:04.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:04.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:04.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:04.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:04.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:04.387 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:33:04.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:04.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:04.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:04.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:04.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:04.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:04.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:04.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:04.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:04.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:04.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:04.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:04.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:33:04.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:33:04.854 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:33:04.854 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:04.855 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:09.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:33:09.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:33:09.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:09.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:09.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:09.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:09.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:09.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:33:09.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:09.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:33:09.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:33:09.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:33:09.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:33:09.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:33:09.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:09.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:09.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:33:09.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:33:09.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:33:09.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:33:09.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:33:09.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:33:09.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:09.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:09.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:33:09.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:33:09.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:33:09.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:33:09.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:33:09.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:33:09.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:09.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:09.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:33:09.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:33:09.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:33:09.904 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:33:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:33:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:33:09.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:33:09.906 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:33:09.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:09.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:33:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:33:10.444 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:33:10.446 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:33:10.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:10.449 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:33:10.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:10.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:10.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:10.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:10.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:10.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:10.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:10.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:10.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:10.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:10.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:10.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:10.862 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:33:10.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:10.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:10.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:10.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:11.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:11.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:11.341 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:33:11.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:11.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:11.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:11.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:11.546 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=352 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:33:11.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:11.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:11.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:11.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:11.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:11.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:11.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:11.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:11.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:11.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:11.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:11.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:11.819 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:33:11.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:11.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:11.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:11.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:12.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:33:12.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:12.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:33:12.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:12.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:12.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:12.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:12.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:12.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:12.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:12.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:13.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:13.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:13.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:13.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:13.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:13.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:13.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:13.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:13.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:13.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:13.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:13.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:13.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:33:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:13.724 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:33:13.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:13.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:13.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:13.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:14.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:14.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:14.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:14.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:14.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:14.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:14.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:14.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:14.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:14.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:14.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:14.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:14.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:33:14.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:14.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:14.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:14.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:14.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:14.676 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:33:14.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:14.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:14.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:14.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:15.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:15.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:15.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:33:15.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:15.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:15.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:15.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:15.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:15.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:15.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:15.630 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:33:15.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:15.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:15.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:15.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:15.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:15.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:15.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:15.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:15.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:15.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:16.108 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:33:16.585 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:33:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:16.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:17.063 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:33:17.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:17.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:17.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:17.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:17.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:17.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:17.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:17.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:17.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:17.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:17.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:17.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:17.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:17.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:17.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:17.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:17.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:17.540 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:33:18.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:33:18.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:18.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:18.494 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:33:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:18.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:18.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:18.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:18.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:18.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:18.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:18.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:18.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:18.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:18.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:18.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:18.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:18.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:18.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:18.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:18.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:18.970 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:33:19.448 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:33:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:19.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:19.926 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:33:20.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:20.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:20.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:20.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:20.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:20.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:20.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:20.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:20.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:20.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:20.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:20.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:20.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:20.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:20.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:20.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:20.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:20.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:20.402 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:33:20.881 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:33:21.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:21.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:33:21.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:21.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:21.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:21.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:21.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:21.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:21.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:21.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:21.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:21.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:21.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:21.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:21.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:21.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:21.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:21.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:21.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:21.836 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:33:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:33:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:22.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:22.794 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:33:23.272 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:33:23.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:23.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:23.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:23.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:23.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:23.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:23.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:23.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:23.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:23.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:23.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:23.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:23.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:23.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:23.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:23.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:23.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:23.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:23.749 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:33:24.226 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:33:24.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:24.704 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:33:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:25.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:25.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:25.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:25.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:25.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:25.182 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:33:25.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:25.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:25.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:25.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:25.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:25.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:25.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:25.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:25.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:25.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:25.660 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:33:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:33:26.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:26.616 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:33:26.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:26.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:26.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:26.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:26.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:26.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:26.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:26.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:26.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:26.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:26.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:26.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:26.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:26.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:26.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:26.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:26.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:33:27.567 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:33:27.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:27.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:33:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:28.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:28.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:28.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:28.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:28.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:28.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:28.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:28.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:28.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:28.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:28.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:28.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:28.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:28.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:28.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:28.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:28.523 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:33:29.000 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:33:29.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:29.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:29.477 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:33:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:29.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:29.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:29.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:29.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:29.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:29.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:29.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:29.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:29.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:29.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:29.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:29.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:29.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:29.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:29.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:29.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:29.953 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:33:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:33:30.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:30.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:30.904 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:33:31.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:31.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:31.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:31.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:31.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:31.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:31.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:31.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:31.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:31.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:31.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:31.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:31.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:31.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:31.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:33:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:33:32.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:32.316 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:33:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:32.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:32.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:32.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:32.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:32.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:32.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:32.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:32.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:32.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:32.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:32.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:32.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:32.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:32.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:32.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:32.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:32.788 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:33:33.264 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:33:33.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:33.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:33.741 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:33:33.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:33.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:33.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:33.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:33.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:33.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:33.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:33.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:33.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:33.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:33.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:33.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:34.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:34.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:34.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:34.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:33:34.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:34.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:34.690 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:33:35.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:35.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:35.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:35.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:35.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:35.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:35.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:35.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:35.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:35.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:35.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:35.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:35.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:35.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:35.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:35.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:35.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:35.167 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:33:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:33:36.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:36.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:36.124 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:33:36.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:36.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:36.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:36.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:36.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:36.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:36.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:36.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:36.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:36.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:36.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:36.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:36.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:36.602 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:33:36.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:36.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:36.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:36.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:37.081 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:33:37.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:37.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:37.559 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:33:37.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:37.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:37.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:37.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:38.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:38.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:38.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:38.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:38.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:38.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:38.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:38.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:33:38.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:38.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:38.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:38.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:38.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:38.513 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:33:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:38.991 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:33:39.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:39.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:39.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:39.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:39.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:39.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:39.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:39.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:39.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:39.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:39.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:39.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:39.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:33:39.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:33:39.457 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:33:44.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:33:44.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:33:44.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:44.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:44.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:44.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:44.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:33:44.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:33:44.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:44.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:33:44.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:33:44.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:33:44.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:33:44.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:33:44.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:44.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:33:44.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:33:44.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:33:44.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:33:44.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:33:44.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:33:44.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:33:44.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:44.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:33:44.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:33:44.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:33:44.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:33:44.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:33:44.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:33:44.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:33:44.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:33:44.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:33:44.500 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:33:44.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:33:44.500 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:33:44.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:33:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:33:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:33:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:33:44.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:33:44.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:33:44.510 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:33:44.510 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:33:44.510 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:33:44.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:33:44.515 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:33:44.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:33:45.045 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:33:45.046 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:33:45.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:45.048 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:33:45.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:45.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:45.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:45.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:45.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:45.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:45.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:45.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:45.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:45.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:45.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:33:45.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:45.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:45.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:45.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:45.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:33:46.413 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:33:46.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:46.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:46.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:46.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:46.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:33:47.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:33:47.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:47.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:47.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:47.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:47.844 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:33:48.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:33:48.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:48.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:48.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:48.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:48.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:33:48.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:48.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:48.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:48.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:49.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:49.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:49.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:49.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:49.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:49.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:49.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:49.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:49.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:49.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:49.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:49.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:49.255 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:33:49.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:33:49.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:33:49.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:33:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:33:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:33:50.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:33:50.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:33:51.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:33:51.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:33:52.114 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:33:52.592 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:33:53.069 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:33:53.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:53.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:53.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:53.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:53.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:53.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:53.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:53.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:53.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:53.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:53.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:53.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:53.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:53.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:53.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:53.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:53.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:53.541 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:33:54.020 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:33:54.497 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:33:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:33:55.450 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:33:55.926 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:33:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:33:56.871 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:33:57.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:57.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:57.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:57.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:33:57.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:33:57.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:33:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:57.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:57.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:57.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:33:57.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:33:57.347 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:33:57.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:33:57.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:33:57.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:33:57.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:57.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:33:57.819 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:33:58.292 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:33:58.768 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:33:59.237 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:33:59.708 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:34:00.181 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:34:00.658 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:34:01.136 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:34:01.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:01.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:01.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:01.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:01.613 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:34:01.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:01.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:01.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:01.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:01.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:01.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:01.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:01.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:01.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:01.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:01.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:01.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:01.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:02.091 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:34:02.569 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:34:03.047 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:34:03.525 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:34:04.003 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:34:04.481 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:34:04.959 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:34:05.436 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:34:05.914 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:34:06.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:06.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:06.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:06.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:06.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:06.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:06.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:06.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:06.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:06.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:06.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:06.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:06.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:06.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:06.391 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:34:06.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:06.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:06.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:06.867 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:34:07.344 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:34:07.821 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:34:08.298 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:34:08.774 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:34:09.252 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:34:09.729 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:34:10.206 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:34:10.682 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:34:10.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:10.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:10.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:10.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:10.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:10.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:10.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:10.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:10.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:10.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:10.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:10.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:10.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:10.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:10.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:10.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:10.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:11.160 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:34:11.639 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:34:12.118 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:34:12.596 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:34:13.074 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:34:13.551 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:34:14.028 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:34:14.506 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:34:14.984 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:34:15.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:15.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:15.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:15.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:15.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:15.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:15.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:15.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:15.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:15.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:15.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:15.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:15.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:34:15.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:15.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:15.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:15.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:15.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:15.461 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:34:15.939 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:34:16.417 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:34:16.895 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:34:17.373 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:34:17.851 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:34:18.330 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 03:34:18.808 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 03:34:19.283 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 03:34:19.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:19.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:19.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:19.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:19.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:19.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:19.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:19.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:19.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:19.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:19.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:19.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:19.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:19.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:19.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:19.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:19.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:19.761 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 03:34:20.239 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 03:34:20.716 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 03:34:21.193 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 03:34:21.668 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 03:34:22.145 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 03:34:22.619 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 03:34:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 03:34:23.569 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 03:34:24.048 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 03:34:24.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:24.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:24.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:24.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:24.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:24.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:24.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:24.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:24.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:24.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:24.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:24.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:24.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:34:24.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:24.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:24.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:24.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:24.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:24.525 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 03:34:25.002 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 03:34:25.480 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 03:34:25.958 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 03:34:26.436 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 03:34:26.913 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 03:34:27.392 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 03:34:27.870 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 03:34:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 03:34:28.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:28.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:28.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:28.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:28.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:28.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:28.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:28.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:28.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:28.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:28.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:28.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:28.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:28.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:28.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:28.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 03:34:29.301 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 03:34:29.773 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 03:34:30.249 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 03:34:30.726 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 03:34:31.202 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 03:34:31.679 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 03:34:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 03:34:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 03:34:32.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:32.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:32.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:32.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:32.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:32.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:32.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:32.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:32.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:32.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:32.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:32.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:32.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:32.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:32.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:32.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:32.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:33.108 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 03:34:33.585 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 03:34:34.061 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 03:34:34.537 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 03:34:35.014 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 03:34:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 03:34:35.962 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 03:34:36.438 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 03:34:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 03:34:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:37.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:37.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:37.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:37.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:37.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:37.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:37.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:37.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:37.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:37.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:37.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:37.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:37.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:37.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:37.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:37.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:37.390 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 03:34:37.865 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 03:34:38.340 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 03:34:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 03:34:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 03:34:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 03:34:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 03:34:40.710 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 03:34:41.187 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 03:34:41.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:41.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:41.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:41.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:41.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:41.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:41.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:41.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:41.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:41.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:41.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:41.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:41.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:41.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:41.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:41.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:41.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:41.663 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 03:34:42.140 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 03:34:42.615 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 03:34:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 03:34:43.558 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 03:34:44.034 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 03:34:44.511 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 03:34:44.987 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 03:34:45.464 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 03:34:45.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:45.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:45.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:45.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:45.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:45.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:45.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:45.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:45.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:45.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:45.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:45.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:45.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:45.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:45.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:45.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:45.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:45.939 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 03:34:46.412 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 03:34:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 03:34:47.353 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 03:34:47.823 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 03:34:48.294 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 03:34:48.767 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 03:34:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 03:34:49.719 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 03:34:49.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:49.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:49.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:49.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:49.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:49.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:49.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:49.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:49.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:49.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:49.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:49.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:49.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:49.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:49.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:49.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:50.193 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 03:34:50.666 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 03:34:51.143 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 03:34:51.621 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 03:34:52.096 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 03:34:52.565 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 03:34:53.035 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 03:34:53.506 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 03:34:53.984 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 03:34:54.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:54.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:54.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:54.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:54.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:54.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:54.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:54.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:54.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:54.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:54.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:54.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:54.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:54.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:54.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:54.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:54.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:54.461 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 03:34:54.933 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 03:34:55.404 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 03:34:55.883 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 03:34:56.361 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 03:34:56.839 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 03:34:57.316 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 03:34:57.794 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 03:34:58.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:58.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:58.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:58.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:58.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:34:58.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:34:58.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:34:58.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:58.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:58.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:58.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:34:58.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:34:58.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:34:58.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:34:58.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:34:58.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:58.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:34:58.272 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 03:34:58.750 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 03:34:59.227 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 03:34:59.705 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 03:35:00.184 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 03:35:00.662 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 03:35:01.141 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 03:35:01.619 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 03:35:02.098 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 03:35:02.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:02.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:02.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:02.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:02.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:02.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:02.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:02.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:02.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:02.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:02.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:02.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:02.576 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 03:35:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:02.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:02.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:02.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:02.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:03.054 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 03:35:03.532 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 03:35:04.010 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 03:35:04.485 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 03:35:04.963 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 03:35:05.441 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 03:35:05.919 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 03:35:06.397 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 03:35:06.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:06.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:06.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:06.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:06.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:06.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:06.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:06.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:06.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:06.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:06.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:06.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:06.875 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 03:35:06.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:06.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:06.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:06.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:06.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:07.352 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 03:35:07.829 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 03:35:08.304 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 03:35:08.776 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 03:35:09.251 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 03:35:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 03:35:10.205 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 03:35:10.683 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 03:35:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:11.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:11.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:11.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:11.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:11.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:11.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:11.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:11.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:35:11.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:35:11.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:35:11.158 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:35:16.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:35:16.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:35:16.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:16.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:16.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:35:16.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:16.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:16.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:35:16.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:16.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:35:16.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:35:16.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:35:16.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:35:16.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:35:16.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:16.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:16.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:35:16.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:35:16.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:35:16.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:35:16.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:35:16.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:35:16.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:16.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:35:16.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:16.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:35:16.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:35:16.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:35:16.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:35:16.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:35:16.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:35:16.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:35:16.206 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:35:16.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:16.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:16.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:16.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:16.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:35:16.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:35:16.208 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:35:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:35:21.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:35:21.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:21.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:35:21.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:21.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:35:21.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:35:21.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:21.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:35:21.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:35:21.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:35:21.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:35:21.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:35:21.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:21.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:35:21.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:35:21.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:35:21.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:35:21.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:35:21.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:35:21.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:35:21.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:21.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:35:21.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:35:21.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:35:21.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:35:21.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:35:21.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:35:21.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:35:21.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:35:21.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:35:21.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:35:21.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:35:21.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:35:21.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:35:21.257 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:35:21.257 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:35:21.257 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:35:21.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:35:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:35:21.787 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:35:21.789 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:35:21.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:21.791 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:35:21.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:21.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:21.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:21.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:21.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:21.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:21.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:21.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:21.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:21.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:21.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:21.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:35:22.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:22.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:22.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:22.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:22.684 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:35:23.161 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:35:23.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:23.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:23.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:23.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:23.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:35:24.115 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:35:24.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:24.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:24.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:24.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:24.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:35:25.069 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:35:25.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:25.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:25.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:25.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:25.546 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:35:25.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:25.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:25.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:25.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:25.889 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=994 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:35:25.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:25.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:25.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:25.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:25.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:25.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:25.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:25.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:25.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:25.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:25.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:25.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:25.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:35:26.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:35:26.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:35:26.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:35:26.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:35:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:35:26.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:35:27.441 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:35:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:35:28.395 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:35:28.870 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:35:29.347 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:35:29.825 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:35:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:30.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:30.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:30.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:30.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:30.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:30.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:30.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:30.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:30.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:30.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:30.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:30.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:30.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:30.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:30.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:30.302 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:35:30.780 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:35:31.258 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:35:31.735 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:35:32.212 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:35:32.689 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:35:33.167 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:35:33.645 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:35:34.122 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:35:34.600 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:35:34.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:34.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:34.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:34.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:34.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:34.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:34.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:34.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:34.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:34.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:34.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:34.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:34.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:34.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:34.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:34.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:34.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:35.077 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:35:35.555 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:35:36.032 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:35:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:35:36.975 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:35:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:35:37.929 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:35:38.407 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:35:38.881 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:35:39.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:39.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:39.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:39.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:39.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:39.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:39.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:39.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:39.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:39.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:39.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:39.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:39.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:39.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:39.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:39.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:39.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:39.358 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:35:39.836 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:35:40.314 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:35:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:35:41.269 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:35:41.746 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:35:42.224 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:35:42.703 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:35:43.181 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:35:43.659 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:35:43.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:43.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:43.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:43.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:43.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:43.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:43.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:43.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:43.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:43.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:43.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:43.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:43.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:43.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:43.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:43.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:43.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:44.137 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:35:44.610 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:35:45.080 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:35:45.557 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:35:46.035 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:35:46.514 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:35:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:35:47.470 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:35:47.947 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:35:48.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:48.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:48.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:48.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:48.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:48.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:48.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:48.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:48.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:48.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:48.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:48.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:48.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:48.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:48.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:48.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:48.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:48.425 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:35:48.902 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:35:49.380 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:35:49.858 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:35:50.336 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:35:50.813 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:35:51.291 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:35:51.769 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:35:52.247 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:35:52.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:52.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:52.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:52.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:52.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:52.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:52.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:52.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:52.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:52.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:52.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:52.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:52.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:35:52.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:52.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:52.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:52.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:52.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:52.721 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:35:53.193 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:35:53.670 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:35:54.148 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:35:54.626 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:35:55.104 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 03:35:55.582 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 03:35:56.060 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 03:35:56.539 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 03:35:56.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:56.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:56.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:56.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:57.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:35:57.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:35:57.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:35:57.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:57.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:57.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:57.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:35:57.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:35:57.016 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 03:35:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:35:57.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:35:57.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:35:57.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:57.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:35:57.495 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 03:35:57.973 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 03:35:58.451 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 03:35:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 03:35:59.406 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 03:35:59.883 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 03:36:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 03:36:00.834 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 03:36:01.308 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 03:36:01.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:01.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:01.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:01.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:01.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:01.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:01.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:01.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:01.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:01.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:01.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:01.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:01.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:01.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:01.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:01.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:01.784 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 03:36:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 03:36:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 03:36:03.216 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 03:36:03.694 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 03:36:04.169 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 03:36:04.638 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 03:36:05.107 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 03:36:05.582 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 03:36:06.060 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 03:36:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 03:36:06.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:06.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:06.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:06.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:06.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:06.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:06.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:06.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:06.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:06.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:06.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:06.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:06.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:06.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:06.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:06.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:07.009 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 03:36:07.483 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 03:36:07.960 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 03:36:08.438 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 03:36:08.915 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 03:36:09.393 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 03:36:09.867 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 03:36:10.336 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 03:36:10.806 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 03:36:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 03:36:11.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:11.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:11.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:11.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:11.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:11.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:11.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:11.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:11.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:11.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:11.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:11.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:11.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:11.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:11.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:11.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:11.762 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 03:36:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 03:36:12.705 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 03:36:13.177 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 03:36:13.647 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 03:36:14.120 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 03:36:14.598 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 03:36:15.074 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 03:36:15.552 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 03:36:15.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:15.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:15.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:15.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:15.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:15.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:15.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:15.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:15.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:15.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:15.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:15.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:16.029 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 03:36:16.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:16.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:16.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:16.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:16.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:16.506 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 03:36:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 03:36:17.462 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 03:36:17.939 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 03:36:18.417 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 03:36:18.895 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 03:36:19.372 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 03:36:19.849 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 03:36:20.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:20.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:20.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:20.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:20.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:20.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:20.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:20.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:20.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:20.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:20.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:20.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:20.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:20.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:20.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:20.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:20.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:20.333 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 03:36:20.812 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 03:36:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 03:36:21.763 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 03:36:22.241 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 03:36:22.719 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 03:36:23.197 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 03:36:23.671 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 03:36:24.147 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 03:36:24.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:24.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:24.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:24.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:24.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:24.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:24.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:24.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:24.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:24.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:24.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:24.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:24.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:24.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:24.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:24.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:24.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:24.622 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 03:36:25.098 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 03:36:25.573 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 03:36:26.049 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 03:36:26.525 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 03:36:27.002 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 03:36:27.480 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 03:36:27.953 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 03:36:28.423 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 03:36:28.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:28.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:28.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:28.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:28.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:28.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:28.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:28.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:28.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:28.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:28.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:28.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:28.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:28.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:28.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:28.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:28.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:28.899 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 03:36:29.377 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 03:36:29.849 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 03:36:30.331 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 03:36:30.807 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 03:36:31.284 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 03:36:31.761 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 03:36:32.238 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 03:36:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 03:36:33.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:33.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:33.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:33.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:33.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:33.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:33.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:33.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:33.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:33.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:33.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:33.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:33.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:33.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:33.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:33.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:33.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:33.192 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 03:36:33.670 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 03:36:34.147 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 03:36:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 03:36:35.103 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 03:36:35.581 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 03:36:36.059 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 03:36:36.536 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 03:36:37.014 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 03:36:37.492 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 03:36:37.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:37.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:37.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:37.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:37.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:37.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:37.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:37.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:37.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:37.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:37.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:37.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:37.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:37.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:37.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:37.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:37.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:37.969 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 03:36:38.447 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 03:36:38.924 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 03:36:39.403 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 03:36:39.878 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 03:36:40.355 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 03:36:40.834 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 03:36:41.312 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 03:36:41.790 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 03:36:41.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:41.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:41.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:41.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:41.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:41.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:41.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:41.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:41.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:41.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:41.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:41.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:41.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:41.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:41.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:41.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:41.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:42.264 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 03:36:42.742 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 03:36:43.218 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 03:36:43.695 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 03:36:44.172 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 03:36:44.649 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 03:36:45.121 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 03:36:45.593 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 03:36:46.070 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 03:36:46.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:46.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:46.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:46.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:46.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:46.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:46.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:36:46.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:46.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:46.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:46.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:36:46.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:36:46.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:46.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:36:46.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:36:46.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:46.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:46.543 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 03:36:47.020 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 03:36:47.496 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 03:36:47.974 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 03:36:48.452 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 03:36:48.929 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 03:36:49.407 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 03:36:49.884 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 03:36:50.362 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-12 03:36:50.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:36:50.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:36:50.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:36:50.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:36:50.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:36:50.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:36:50.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:36:50.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:36:50.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:36:50.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:36:50.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:36:50.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:36:50.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:36:50.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:36:50.496 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:36:50.496 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.496 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:50.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=19105 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:36:55.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:36:55.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:36:55.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:36:55.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:36:55.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:36:55.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:36:55.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:36:55.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:36:55.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:36:55.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:36:55.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:36:55.517 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:36:55.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:36:55.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:36:55.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:36:55.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:36:55.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:36:55.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:36:55.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:36:55.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:36:55.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:36:55.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:36:55.525 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:36:55.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:36:55.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:36:55.526 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:36:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:37:00.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:37:00.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:37:00.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:37:00.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:37:00.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:37:00.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:37:00.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:37:00.550 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:00.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:37:00.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:37:00.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:37:00.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:37:00.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:37:00.556 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:37:00.556 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:37:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:37:00.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:00.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:37:00.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:37:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:37:00.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:37:00.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:37:00.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:37:00.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:37:00.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:00.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:37:00.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:37:00.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:37:00.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:37:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:37:00.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:37:00.562 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:37:00.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:00.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:00.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:37:01.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:37:01.078 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:37:01.079 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:37:01.079 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:37:01.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:01.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:01.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:01.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:01.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:01.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:01.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:01.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:01.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:01.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:01.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:01.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:01.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:01.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:01.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:37:01.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:01.997 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:37:02.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:02.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:02.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:02.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:02.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:02.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:02.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:02.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:02.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:02.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:02.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:02.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:02.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:02.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:02.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:02.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:02.468 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:37:02.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:02.939 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:37:03.417 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:37:03.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:03.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:03.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:03.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:03.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:03.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:03.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:03.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:03.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:03.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:03.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:03.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:03.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:03.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:03.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:03.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:03.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:03.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:03.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:03.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:03.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:03.894 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:37:04.372 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:37:04.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:04.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:04.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:04.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:04.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:04.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:04.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:04.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:04.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:04.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:04.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:04.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:04.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:04.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:04.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:37:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:04.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:04.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:04.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:04.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:37:05.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:05.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:05.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:05.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:05.805 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:37:06.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:06.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:06.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:06.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:06.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:06.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:06.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:06.283 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:37:06.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:06.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:06.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:06.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:06.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:06.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:06.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:06.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:06.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:06.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:06.760 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:37:07.239 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:37:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:37:07.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:07.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:07.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:07.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:07.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:07.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:07.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:07.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:07.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:07.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:07.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:07.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:07.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:07.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:07.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:08.192 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:37:08.669 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:37:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:37:09.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:09.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:09.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:09.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:09.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:09.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:09.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:09.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:09.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:09.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:09.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:09.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:09.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:09.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:09.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:09.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:37:10.103 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:37:10.581 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:37:10.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:10.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:10.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:10.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:10.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:10.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:10.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:10.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:10.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:10.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:10.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:10.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:10.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:10.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:10.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:10.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:10.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:10.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:11.059 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:37:11.537 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:37:12.015 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:37:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:12.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:12.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:12.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:12.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:12.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:12.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:12.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:12.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:12.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:12.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:12.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:12.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:12.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:12.494 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:37:12.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:12.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:12.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:37:13.450 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:37:13.927 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:37:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:13.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:13.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:13.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:13.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:13.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:13.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:13.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:13.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:13.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:13.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:13.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:13.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:13.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:14.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:14.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:14.405 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:37:14.883 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:37:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:15.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:15.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:15.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:15.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:15.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:15.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:15.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:15.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:15.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:15.358 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:37:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:15.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:15.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:15.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:15.835 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:37:16.314 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:37:16.788 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:37:16.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:16.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:16.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:16.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:16.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:16.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:16.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:16.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:16.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:16.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:16.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:16.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:16.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:16.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:16.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:16.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:16.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:17.257 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:37:17.729 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:37:18.206 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:37:18.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:18.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:18.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:18.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:18.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:18.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:18.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:18.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:18.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:18.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:18.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:18.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:18.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:18.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:18.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:18.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:18.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:18.678 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:37:19.149 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:37:19.622 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:37:19.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:19.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:19.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:19.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:19.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:19.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:19.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:19.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:19.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:19.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:19.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:19.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:19.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:19.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:19.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:19.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:19.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:20.098 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:37:20.567 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:37:21.039 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:37:21.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:21.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:21.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:21.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:21.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:21.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:21.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:21.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:21.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:21.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:21.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:21.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:21.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:21.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:21.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:21.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:21.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:21.512 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:37:21.989 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:37:22.467 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:37:22.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:22.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:22.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:22.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:22.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:22.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:22.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:22.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:22.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:22.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:22.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:22.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:22.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:22.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:22.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:22.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:22.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:22.943 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:37:23.421 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:37:23.898 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:37:24.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:24.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:24.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:24.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:24.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:24.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:24.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:24.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:24.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:24.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:24.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:24.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:24.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:24.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:24.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:24.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:24.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:24.374 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:37:24.852 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:37:25.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:25.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:25.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:25.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:25.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:25.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:25.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:25.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:25.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:25.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:25.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:25.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:25.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:25.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:25.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:25.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:25.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:25.330 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:37:25.808 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:37:26.285 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:37:26.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:26.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:26.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:26.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:26.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:26.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:26.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:26.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:26.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:26.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:26.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:26.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:26.759 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:37:26.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:26.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:26.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:26.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:26.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:27.237 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:37:27.715 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:37:28.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:28.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:28.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:28.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:28.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:28.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:28.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:28.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:28.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:28.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:28.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:28.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:37:28.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:28.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:28.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:28.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:28.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:28.659 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:37:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:37:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:29.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:29.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:29.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:29.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:29.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:29.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:29.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:29.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:37:29.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:37:29.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:37:29.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:37:29.577 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:37:29.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:37:29.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:37:29.577 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:29.577 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:29.577 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:29.578 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:29.578 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:34.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:37:34.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:37:34.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:37:34.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:37:34.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:37:34.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:37:34.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:37:34.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:37:34.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:34.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:37:34.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:37:34.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:37:34.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:37:34.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:37:34.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:34.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:37:34.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:37:34.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:37:34.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:37:34.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:37:34.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:37:34.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:37:34.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:34.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:37:34.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:37:34.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:37:34.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:37:34.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:37:34.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:37:34.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:37:34.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:37:34.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:37:34.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:37:34.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:37:34.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:37:34.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:37:34.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:37:34.629 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:37:34.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:37:34.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:37:34.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:37:35.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:37:35.174 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:37:35.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:35.177 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:37:35.179 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:37:35.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:35.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:35.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:35.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:35.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:35.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:35.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:35.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:35.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:35.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:35.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:35.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:35.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:35.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:37:35.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:35.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:35.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:35.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:37:36.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:37:36.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:36.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:37:37.466 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:37:37.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:37.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:37:38.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:38.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:37:38.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:38.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:38.879 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:37:38.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:38.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:38.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:38.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:38.952 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=936 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:38.952 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:38.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:38.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:38.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:38.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:38.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:38.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:38.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:38.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:38.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:38.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:39.349 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:37:39.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:37:39.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:37:39.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:37:39.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:37:39.820 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:37:40.291 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:37:40.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:37:41.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:37:41.703 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:37:41.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:42.174 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:37:42.645 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:37:42.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:42.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:42.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:42.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:42.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:42.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:42.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:42.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:42.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:42.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:42.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:42.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:42.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:42.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:42.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:42.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:42.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:43.115 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:37:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:37:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:37:44.528 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:37:44.999 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:37:45.469 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:37:45.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:45.940 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:37:46.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:46.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:46.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:46.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:46.393 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=2548 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:46.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:46.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:46.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:46.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:46.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:46.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:46.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:46.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:46.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:46.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:46.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:37:46.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:37:47.352 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:37:47.823 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:37:48.294 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:37:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:37:49.240 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:37:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:37:50.183 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:37:50.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:50.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:50.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:50.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:50.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:50.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:50.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:50.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:50.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:50.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:50.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:50.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:50.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:50.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:50.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:50.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:50.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:50.654 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:37:51.125 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:37:51.596 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:37:52.066 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:37:52.543 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:37:53.017 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:37:53.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:53.487 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:37:53.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:53.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:53.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:53.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:53.926 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=4177 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:53.926 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=4177 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:37:53.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:53.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:53.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:53.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:53.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:53.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:53.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:53.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:53.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:53.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:53.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:53.967 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:37:54.447 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:37:54.927 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:37:55.407 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:37:55.881 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:37:56.361 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:37:56.839 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:37:57.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:57.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:37:57.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:57.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:57.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:57.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:37:57.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:37:57.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:37:57.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:57.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:57.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:57.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:37:57.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:37:57.311 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:37:57.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:37:57.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:37:57.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:37:57.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:57.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:37:57.782 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:37:58.253 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:37:58.724 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:37:59.195 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:37:59.665 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:38:00.137 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:38:00.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:00.607 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:38:00.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:00.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:01.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:01.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:01.000 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=5697 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:01.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:01.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:01.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:01.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:01.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:01.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:01.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:01.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:01.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:01.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:01.078 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:38:01.549 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:38:02.020 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:38:02.490 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:38:02.961 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:38:03.432 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:38:03.902 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:38:04.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:04.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:04.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:04.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:04.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:04.295 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=6411 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:04.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:04.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:38:04.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:38:04.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:38:04.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:38:04.301 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:38:04.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:38:04.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:38:09.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:38:09.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:38:09.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:38:09.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:38:09.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:38:09.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:38:09.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:38:09.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:38:09.330 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:38:09.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:38:09.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:38:09.333 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:38:09.333 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:38:09.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:38:09.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:38:09.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:38:09.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:38:09.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:38:09.335 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:38:09.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:38:09.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:38:09.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:38:09.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:38:09.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:38:09.338 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:38:09.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:38:09.338 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:38:09.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:38:09.340 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:38:09.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:38:09.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:38:09.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:38:09.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:38:09.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:38:09.341 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:38:09.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:38:09.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:38:09.345 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:38:09.345 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:38:09.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:38:09.350 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:38:09.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:38:09.858 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:38:09.858 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:38:09.859 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:38:09.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:09.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:09.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:09.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:09.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:09.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:09.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:09.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:09.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:09.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:09.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:09.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:09.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:09.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:10.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:38:10.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:10.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:10.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:10.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:10.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:38:11.256 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:38:11.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:11.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:11.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:11.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:11.727 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:38:12.200 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:38:12.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:12.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:12.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:12.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:12.673 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:38:12.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:13.147 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:38:13.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:13.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:13.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:13.623 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:38:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:13.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:13.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:13.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:13.700 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:13.700 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:13.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:13.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:13.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:13.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:13.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:13.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:13.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:13.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:13.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:13.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:13.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:14.107 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:38:14.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:14.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:14.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:14.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:14.590 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:38:15.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:38:15.539 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:38:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:38:16.485 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:38:16.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:16.956 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:38:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:38:17.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:17.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:17.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:17.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:17.573 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1768 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:17.573 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:17.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:17.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:17.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:17.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:17.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:17.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:17.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:17.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:17.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:17.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:17.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:38:18.375 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:38:18.856 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:38:19.329 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:38:19.809 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:38:20.284 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:38:20.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:20.767 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:38:21.250 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:38:21.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:21.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:21.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:21.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:21.474 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=2600 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:21.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:21.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:21.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:21.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:21.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:21.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:21.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:21.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:21.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:21.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:21.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:21.733 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:38:21.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:38:22.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:22.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:22.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:22.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:22.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:22.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:22.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:22.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:22.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:22.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:22.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:22.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:22.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:22.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:22.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:22.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:22.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:38:23.149 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:38:23.623 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:38:24.103 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:38:24.581 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:38:25.060 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:38:25.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:25.547 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:38:26.028 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:38:26.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:26.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:26.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:26.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:26.103 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=3588 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:26.103 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=3588 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:26.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:26.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:26.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:26.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:26.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:26.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:26.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:26.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:26.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:26.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:26.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:26.509 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:38:26.994 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:38:27.473 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:38:27.956 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:38:28.443 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:38:28.927 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:38:29.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:29.404 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:29.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:29.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:29.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:29.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:29.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:29.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:29.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:29.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:29.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:29.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:29.879 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:38:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:38:30.824 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:38:31.307 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:38:31.790 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:38:32.263 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:38:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:32.739 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:38:33.212 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:38:33.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:33.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:33.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:33.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:33.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:33.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:33.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:33.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:33.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:33.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:33.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:33.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:33.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:33.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:33.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:38:33.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:38:34.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:34.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:34.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:34.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:34.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:34.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:34.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:34.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:34.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:34.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:34.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:34.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:34.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:34.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:34.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:34.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:34.631 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:38:35.116 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:38:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:38:36.085 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:38:36.563 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:38:37.048 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:38:37.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:37.530 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:38:37.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:37.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:37.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:37.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:37.971 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=6115 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:37.971 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=6115 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:37.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:37.972 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=6115 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:37.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:37.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:37.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:37.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:37.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:38.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:38.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:38.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:38.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:38.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:38.014 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:38:38.487 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:38:38.969 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:38:39.447 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:38:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:38:40.398 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:38:40.878 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:38:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:41.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:41.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:41.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:41.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:41.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:41.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:41.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:41.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:41.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:41.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:41.352 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:38:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:41.827 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:38:42.298 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:38:42.771 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:38:43.247 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 03:38:43.720 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 03:38:44.192 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 03:38:44.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:44.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:44.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:44.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:44.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:44.628 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=7543 tn=0 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:44.628 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=7543 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:44.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:44.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:44.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:44.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:44.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:44.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:44.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:44.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:44.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:44.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:44.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 03:38:45.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:45.136 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 03:38:45.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:45.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:45.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:45.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:45.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:45.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:45.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:45.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:45.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:45.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:45.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:45.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:45.615 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 03:38:45.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:45.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:45.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:45.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:45.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:46.085 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 03:38:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 03:38:47.031 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 03:38:47.504 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 03:38:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 03:38:48.457 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 03:38:48.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:48.940 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 03:38:49.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:49.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:49.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:49.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:49.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:49.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:49.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:49.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:49.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:49.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:49.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:49.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:49.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:49.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:49.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 03:38:49.891 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 03:38:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 03:38:50.840 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 03:38:51.311 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 03:38:51.789 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 03:38:52.273 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 03:38:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:52.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:52.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:52.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:52.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:52.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:52.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:52.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:52.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:52.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:52.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:52.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:52.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:52.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:52.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:52.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:52.750 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 03:38:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 03:38:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 03:38:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 03:38:54.655 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 03:38:55.131 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 03:38:55.612 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 03:38:55.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:56.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:56.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:56.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:56.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:56.007 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=9981 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:38:56.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:56.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:56.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:56.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:38:56.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:38:56.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:38:56.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:38:56.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:38:56.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:56.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:56.095 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 03:38:56.570 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 03:38:56.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:56.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:38:56.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:38:56.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:38:56.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:38:56.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:38:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:38:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:38:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:38:56.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:38:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:38:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:38:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:38:56.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:38:56.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:38:56.969 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:38:56.969 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=10187 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:01.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:01.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:01.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:01.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:01.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:01.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:01.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:01.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:01.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:01.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:01.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:39:01.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:39:01.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:39:01.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:01.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:01.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:01.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:39:01.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:01.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:39:02.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:39:02.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:39:02.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:02.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:02.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:02.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:39:02.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:02.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:39:02.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:39:02.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:39:02.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:02.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:02.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:02.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:39:02.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:02.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:39:02.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:39:02.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:39:02.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:39:02.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:39:02.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:39:02.009 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:39:02.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:39:02.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:02.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:02.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:02.014 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:39:02.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:39:02.535 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:02.537 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:39:02.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:39:02.539 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:39:02.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:02.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:39:02.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:39:02.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:39:02.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:39:02.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:39:02.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:39:02.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:39:03.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:03.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:03.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:03.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:39:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:39:04.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:04.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:04.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:04.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:04.364 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:39:04.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:39:05.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:05.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:05.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:05.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:05.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:39:05.777 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:39:06.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:06.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:06.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:06.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:06.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:39:06.718 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:39:07.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:07.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:07.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:07.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:07.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:39:07.659 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:39:08.130 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:39:08.601 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:39:09.072 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:39:09.543 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:39:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:39:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:39:10.955 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:39:11.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:11.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:11.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:11.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:11.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:11.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:11.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:11.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:11.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:11.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:11.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:11.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:11.331 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:39:11.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:11.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2022 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:16.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:16.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:16.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:16.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:16.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:16.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:16.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:16.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:16.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:16.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:16.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:39:16.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:39:16.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:39:16.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:16.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:16.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:16.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:39:16.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:16.351 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:16.352 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:39:16.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:16.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:16.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:39:16.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:16.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:39:16.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:39:16.357 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:39:16.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:16.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:16.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:39:16.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:39:16.876 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:16.878 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:39:16.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:39:16.881 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:39:16.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:16.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:16.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:39:16.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:39:16.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:39:16.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:39:16.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:39:16.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:39:17.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:39:17.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:17.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:17.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:17.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:17.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:39:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:39:18.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:18.734 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:39:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:39:19.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:19.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:19.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:39:20.156 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:39:20.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:20.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:20.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:20.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:20.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:39:21.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:39:21.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:21.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:21.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:21.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:21.578 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:39:22.050 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:39:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:39:23.000 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:39:23.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:39:23.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:39:24.419 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:39:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:39:25.363 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:39:25.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:25.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:25.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:25.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:25.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:25.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:25.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:25.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:25.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:25.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:25.679 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:25.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.680 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.680 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.680 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:25.680 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:30.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:30.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:30.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:30.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:30.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:30.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:30.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:30.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:30.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:30.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:30.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:39:30.695 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:39:30.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:39:30.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:30.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:30.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:30.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:39:30.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:30.697 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:39:30.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:39:30.700 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:39:30.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:30.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:30.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:30.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:39:30.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:30.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:39:30.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:39:30.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:39:30.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:30.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:30.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:30.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:39:30.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:30.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:39:30.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:39:30.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:39:30.709 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:39:30.710 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:30.715 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:39:31.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:39:31.239 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:31.241 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:39:31.243 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:39:31.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:39:31.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:31.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:31.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:39:31.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:39:31.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:31.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:31.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:31.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:32.153 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:39:32.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:39:32.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:39:32.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:39:32.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:39:32.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:39:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:39:32.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:32.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:32.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:32.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:39:33.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:39:33.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:33.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:33.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:34.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:39:34.538 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:39:34.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:34.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:34.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:34.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:35.014 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:39:35.493 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:39:35.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:35.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:35.975 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:39:36.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:39:36.921 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:39:37.395 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:39:37.874 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:39:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:39:38.819 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:39:39.299 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:39:39.772 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:39:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:39:40.719 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:39:41.194 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:39:41.669 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:39:42.145 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:39:42.619 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:39:43.095 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:39:43.578 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:39:44.062 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:39:44.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:44.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:44.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:44.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:44.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:44.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:44.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:44.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:44.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:44.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:44.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:44.163 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:39:44.164 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.164 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.165 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:44.166 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:49.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:49.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:49.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:49.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:49.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:49.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:49.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:49.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:49.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:49.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:39:49.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:39:49.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:39:49.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:39:49.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:49.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:49.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:49.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:39:49.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:39:49.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:39:49.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:39:49.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:39:49.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:49.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:49.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:49.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:39:49.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:39:49.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:49.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:39:49.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:39:49.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:39:49.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:39:49.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:39:49.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:39:49.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:39:49.183 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:39:49.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:39:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:39:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:39:49.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:39:49.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:39:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:39:49.697 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:49.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:39:49.697 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:39:49.698 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:49.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:39:49.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:39:49.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:39:50.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:39:50.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:50.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:50.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:50.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:50.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:39:50.712 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:51.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:39:51.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:51.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:51.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:51.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:51.221 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:51.605 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:39:51.728 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:52.085 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:39:52.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:52.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:52.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:52.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:52.571 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:39:53.054 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:39:53.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:53.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:53.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:53.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:53.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:39:53.734 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:54.014 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:39:54.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:54.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:54.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:54.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:54.263 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:54.494 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:39:54.788 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:54.972 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:39:55.294 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:55.452 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:39:55.935 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:39:56.417 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:39:56.897 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:39:57.300 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:39:57.377 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:39:57.859 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:39:58.342 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:39:58.825 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:39:59.308 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:39:59.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:39:59.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:39:59.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:39:59.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:39:59.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:39:59.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:39:59.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:39:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:39:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:39:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:39:59.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:39:59.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:39:59.325 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:39:59.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2147 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:59.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2147 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:59.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2147 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:39:59.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2147 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:04.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:04.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:04.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:04.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:04.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:04.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:04.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:04.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:04.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:04.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:04.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:04.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:04.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:04.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:04.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:04.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:04.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:04.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:04.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:04.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:04.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:04.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:04.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:04.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:04.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:04.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:04.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:04.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:04.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:04.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:04.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:04.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:04.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:04.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:04.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:04.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:04.367 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:04.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:04.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:04.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:40:04.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:40:04.885 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:40:04.886 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:40:04.887 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:40:04.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:04.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:04.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:04.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:04.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:04.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:04.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:04.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:04.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:04.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:04.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:04.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:04.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:04.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:40:05.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:05.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:05.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:05.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.808 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=307 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:05.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:40:05.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:05.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:05.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:05.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:05.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:05.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:05.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:05.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:05.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:05.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:05.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:06.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.302 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:40:06.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:06.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:06.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:06.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:06.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:40:06.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:06.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:06.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:06.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:06.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:06.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:06.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:06.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:06.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:06.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:06.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:07.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:07.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:07.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:07.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:40:07.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:07.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:07.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:07.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:07.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:07.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:07.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:07.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:07.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:07.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:07.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:07.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:07.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:07.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:07.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:07.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:07.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:07.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:07.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:07.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:07.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:07.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:07.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:07.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:07.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:07.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:07.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:07.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:07.722 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:07.722 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.722 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=711 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.723 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.724 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.724 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.724 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.724 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.724 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:07.725 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=712 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:12.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:12.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:12.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:12.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:12.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:12.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:12.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:12.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:12.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:12.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:12.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:12.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:12.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:12.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:12.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:12.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:12.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:12.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:12.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:12.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:12.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:12.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:12.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:12.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:12.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:12.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:12.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:12.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:12.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:12.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:12.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:12.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:12.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:12.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:12.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:12.747 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:12.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:12.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:12.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:12.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:40:13.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:40:13.266 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:40:13.268 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:40:13.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:13.270 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:40:13.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:13.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:13.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:13.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:13.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:13.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:13.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:13.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:13.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 03:40:13.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:13.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:13.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:13.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:13.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:13.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:40:13.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:14.201 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:40:14.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:40:14.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:14.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:14.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:14.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:15.174 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:40:15.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:15.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:15.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:15.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:15.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:15.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:15.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:15.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:15.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:15.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:15.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:15.399 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:15.399 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:15.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:20.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:20.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:20.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:20.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:20.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:20.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:20.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:20.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:20.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:20.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:20.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:20.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:20.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:20.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:20.415 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:20.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:20.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:20.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:20.416 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:20.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:20.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:20.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:20.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:20.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:20.419 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:20.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:20.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:20.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.422 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:20.422 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:20.422 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:20.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:20.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:20.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:20.425 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:20.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:25.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:25.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:25.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:25.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:25.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:25.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:25.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:25.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:25.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:25.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:25.440 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:25.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:25.440 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:25.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:25.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:25.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:25.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:25.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:25.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:25.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:25.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:25.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:25.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:25.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:25.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:25.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:25.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:25.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:25.444 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:25.446 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:25.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:25.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:25.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:25.446 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:25.447 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:25.447 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:25.447 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:25.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:25.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:25.452 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:40:25.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:40:25.964 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:40:25.965 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:40:25.965 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:40:25.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:40:26.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:26.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:26.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:26.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:26.895 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:40:27.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:40:27.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:27.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:27.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:27.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:27.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:40:28.343 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:40:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:28.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:28.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:40:29.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:40:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:29.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:29.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:29.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:29.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:40:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:40:30.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:30.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:30.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:30.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:30.749 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:40:31.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:40:31.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:31.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:31.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:31.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:31.468 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:31.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:36.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:36.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:36.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:36.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:36.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:36.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:36.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:36.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:36.486 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:36.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:36.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:36.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:36.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:36.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:36.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:36.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:36.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:36.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:36.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:36.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:36.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:36.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:36.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:36.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:36.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:36.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:36.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:36.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:36.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:36.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:36.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:36.502 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:36.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:36.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:36.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:40:36.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:40:37.025 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:40:37.027 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:40:37.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:37.029 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:40:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:40:37.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:37.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:37.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:40:38.403 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:40:38.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:38.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:38.873 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:40:39.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:40:39.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:39.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:39.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:39.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:40:40.293 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:40:40.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:40.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:40.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:40.765 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:40:41.244 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:40:41.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:41.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:41.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:41.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:41.724 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:40:42.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:42.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:42.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:42.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:42.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:42.041 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:42.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:42.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:42.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1192 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:40:47.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:47.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:47.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:47.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:47.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:47.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:47.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:47.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:47.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:47.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:47.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:47.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:47.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:47.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:47.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:47.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:47.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:47.063 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:47.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:47.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:47.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:47.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:47.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:47.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:47.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:47.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:47.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:47.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:47.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:47.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:47.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:47.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:47.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:47.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:47.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:47.074 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:47.074 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:47.074 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:47.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:47.076 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:47.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:40:52.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:40:52.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:52.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:52.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:52.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:52.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:40:52.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:52.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:52.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:40:52.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:52.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:40:52.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:40:52.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:40:52.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:40:52.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:40:52.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:52.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:52.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:40:52.089 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:40:52.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:40:52.089 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:40:52.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:40:52.091 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:40:52.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:52.091 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:40:52.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:40:52.091 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:40:52.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:40:52.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:40:52.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:40:52.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:40:52.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:40:52.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:40:52.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:40:52.094 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:40:52.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:40:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:40:52.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:40:52.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:40:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:40:52.607 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:40:52.607 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:40:52.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:40:52.608 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:40:52.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:40:52.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:40:52.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:40:53.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:40:53.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:53.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:53.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:53.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:40:53.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:40:53.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:40:53.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:40:53.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:40:53.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:40:53.995 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:40:54.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:54.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:40:54.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:40:55.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:55.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:55.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:55.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:55.407 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:40:55.879 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:40:56.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:56.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:56.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:56.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:56.350 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:40:56.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:40:57.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:40:57.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:40:57.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:40:57.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:40:57.291 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:40:57.761 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:40:58.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:40:58.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:40:59.173 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:40:59.644 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:41:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:41:00.586 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:41:01.057 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:41:01.527 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:41:01.997 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:41:02.469 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:41:02.942 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:41:03.415 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:41:03.894 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:41:04.363 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:41:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:41:05.304 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:41:05.775 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:41:06.255 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:41:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:41:07.215 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:41:07.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:07.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:07.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:07.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:07.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:07.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:07.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:07.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:07.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:07.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:07.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:07.394 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:41:07.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:12.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:12.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:12.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:12.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:12.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:12.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:12.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:12.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:12.419 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:12.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:12.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:41:12.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:41:12.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:41:12.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:12.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:12.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:12.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:41:12.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:12.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:41:12.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:41:12.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:41:12.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:12.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:12.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:12.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:41:12.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:12.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:12.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:41:12.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:12.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:41:12.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:41:12.428 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:41:12.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:12.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:12.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:41:12.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:41:12.955 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:12.957 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:12.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:12.959 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:41:12.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:12.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:12.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:41:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:12.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:12.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:12.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:41:12.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:41:12.994 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:12.997 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:13.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:13.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:13.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:13.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:13.374 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:41:13.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:13.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:13.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:13.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:13.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:41:14.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:41:14.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:14.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:14.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:14.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:41:15.264 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:41:15.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:15.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:15.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:15.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:41:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:41:16.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:16.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:16.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:16.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:16.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:41:17.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:41:17.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:17.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:17.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:41:18.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:41:18.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:41:19.057 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:41:19.528 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:41:19.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:41:20.476 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:41:20.949 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:41:21.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:21.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:21.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:21.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:21.009 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1851 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:21.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:21.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:21.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:21.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:21.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:21.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:21.030 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:41:21.031 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.031 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.031 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.031 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.032 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.032 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.032 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.032 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.032 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:21.033 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:26.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:26.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:26.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:26.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:26.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:26.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:26.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:26.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:26.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:26.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:26.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:41:26.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:41:26.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:41:26.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:26.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:26.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:26.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:41:26.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:26.063 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:41:26.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:41:26.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:41:26.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:26.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:26.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:26.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:41:26.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:26.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:41:26.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:41:26.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:41:26.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:26.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:26.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:26.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:41:26.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:26.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:41:26.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:41:26.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:41:26.079 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:41:26.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:26.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:26.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:41:26.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:41:26.609 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:26.611 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:26.614 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:41:26.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:26.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:26.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:26.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:41:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:26.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:26.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:26.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:41:26.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:41:26.652 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:26.654 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:26.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:26.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:26.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:26.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:27.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:41:27.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:27.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:27.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:27.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:27.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:41:27.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:41:28.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:28.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:28.446 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:41:28.917 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:41:29.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:29.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:29.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:29.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:29.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:41:29.860 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:41:30.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:30.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:30.339 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:41:30.813 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:41:31.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:31.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:31.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:31.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:31.289 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:41:31.762 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:41:32.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:41:32.705 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:41:33.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:41:33.664 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:41:34.145 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:41:34.623 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:41:34.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:34.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:34.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:34.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:34.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:34.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:34.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:34.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:34.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:34.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:34.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:34.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:34.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:34.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:34.675 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:34.675 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:39.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:39.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:39.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:39.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:39.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:39.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:39.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:39.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:39.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:39.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:41:39.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:41:39.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:41:39.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:41:39.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:39.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:39.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:39.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:41:39.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:41:39.707 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:41:39.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:41:39.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:41:39.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:39.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:39.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:39.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:41:39.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:41:39.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:39.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:41:39.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:41:39.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:41:39.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:41:39.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:41:39.715 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:41:39.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:41:39.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:41:39.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:41:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:41:40.243 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:40.245 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:40.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:40.248 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:41:40.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:40.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:40.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:41:40.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:40.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:40.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:40.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:41:40.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:41:40.278 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:40.280 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:40.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:40.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:40.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:40.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:40.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:40.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:41:40.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:40.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:40.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:40.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:41.141 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:41:41.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:41:41.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:41.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:41.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:41.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:42.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:41:42.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:41:42.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:42.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:42.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:42.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:43.035 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:41:43.505 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:41:43.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:43.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:43.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:43.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:43.976 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:41:44.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:41:44.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:44.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:41:45.400 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:41:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:41:46.347 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:41:46.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:41:47.300 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:41:47.778 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:41:48.251 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:41:48.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:48.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:48.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:48.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:48.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:48.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:48.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:41:48.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:48.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:48.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:48.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:41:48.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:41:48.340 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:41:48.344 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:41:48.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:48.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:41:48.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:41:48.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:48.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:48.722 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:41:49.194 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:41:49.673 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:41:50.153 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:41:50.634 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:41:51.114 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:41:51.593 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:41:52.068 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:41:52.549 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:41:53.027 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:41:53.506 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:41:53.985 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:41:54.461 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:41:54.935 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:41:55.402 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:41:55.874 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:41:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:41:56.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:41:56.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:41:56.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:41:56.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:41:56.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:41:56.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:41:56.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:41:56.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:41:56.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:41:56.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:41:56.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:41:56.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:41:56.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:41:56.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:41:56.376 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3578 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3578 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3578 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3578 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3578 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:41:56.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:01.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:42:01.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:42:01.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:01.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:01.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:01.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:01.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:01.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:01.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:01.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:01.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:42:01.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:42:01.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:42:01.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:01.400 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:01.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:01.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:42:01.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:01.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:01.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:42:01.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:01.403 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:42:01.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:42:01.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:42:01.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:01.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:01.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:01.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:42:01.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:01.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:42:01.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:42:01.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:42:01.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:42:01.409 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:42:01.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:01.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:01.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:42:01.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:42:01.923 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:01.923 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:01.924 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:42:01.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:01.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:01.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:01.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:01.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:01.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:01.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:01.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:01.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:01.975 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:01.979 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:01.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:01.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:01.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:01.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:01.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:02.352 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:42:02.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:02.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:42:03.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:42:03.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:03.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:03.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:03.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:03.763 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:42:04.235 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:42:04.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:04.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:04.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:04.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:04.705 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:42:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:42:05.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:05.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:05.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:05.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:42:06.118 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:42:06.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:06.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:06.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:06.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:42:07.059 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:42:07.530 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:42:08.001 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:42:08.471 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:42:08.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:42:09.413 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:42:09.884 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:42:09.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:09.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:09.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:09.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:10.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:10.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:10.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:10.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:10.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:10.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:10.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:10.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:10.016 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:10.017 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:10.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:10.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:10.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:10.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:10.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:42:10.825 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:42:11.296 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:42:11.767 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:42:12.238 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:42:12.708 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:42:13.179 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:42:13.650 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:42:14.121 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:42:14.591 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:42:15.062 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:42:15.533 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:42:16.004 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:42:16.475 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:42:16.945 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:42:17.416 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:42:17.887 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:42:18.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:18.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:18.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:18.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:18.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:18.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:18.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:18.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:18.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:18.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:18.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:18.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:18.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:42:18.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:42:18.048 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:42:18.048 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.049 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.049 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.049 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.049 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.049 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.050 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.051 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.051 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.051 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.051 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.051 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.052 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.052 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.052 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.052 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.052 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.053 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.054 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:18.054 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:23.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:42:23.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:42:23.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:23.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:23.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:23.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:23.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:23.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:23.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:23.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:23.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:42:23.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:42:23.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:42:23.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:23.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:23.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:23.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:42:23.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:23.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:42:23.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:42:23.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:42:23.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:23.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:23.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:23.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:42:23.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:23.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:42:23.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:42:23.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:42:23.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:23.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:23.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:23.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:42:23.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:23.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:42:23.084 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:42:23.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:42:23.085 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:42:23.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:23.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:23.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:23.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:23.089 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:42:23.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:42:23.599 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:23.599 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:23.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:23.600 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:42:23.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:23.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:23.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:23.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:23.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:23.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:23.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:23.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:23.650 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:23.654 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:23.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:23.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:23.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:24.027 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:42:24.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:24.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:24.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:24.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:24.497 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:42:24.968 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:42:25.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:25.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:25.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:25.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:25.439 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:42:25.910 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:42:26.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:26.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:26.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:26.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:42:26.851 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:42:27.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:27.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:27.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:27.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:27.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:42:27.793 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:42:28.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:28.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:28.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:28.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:28.264 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:42:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:42:29.205 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:42:29.676 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:42:30.147 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:42:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:42:31.088 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:42:31.559 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:42:31.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:31.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:31.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:31.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:31.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:31.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:31.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:31.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:31.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:31.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:31.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:31.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:31.692 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:31.693 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:31.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:31.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:31.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:31.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:31.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:32.030 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:42:32.500 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:42:32.971 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:42:33.442 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:42:33.913 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:42:34.384 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:42:34.854 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:42:35.325 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:42:35.796 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:42:36.267 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:42:36.738 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:42:37.215 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:42:37.690 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:42:38.167 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:42:38.641 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:42:39.111 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:42:39.581 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:42:39.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:39.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:39.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:39.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:39.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:39.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:39.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:39.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:39.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:39.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:39.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:42:39.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:42:39.713 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:42:39.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:39.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:44.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:42:44.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:42:44.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:44.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:44.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:44.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:44.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:42:44.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:44.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:44.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:42:44.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:42:44.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:42:44.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:42:44.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:44.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:44.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:42:44.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:42:44.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:42:44.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:42:44.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:42:44.747 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:42:44.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:44.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:44.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:42:44.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:42:44.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:42:44.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:42:44.749 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:42:44.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:42:44.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:44.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:42:44.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:42:44.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:42:44.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:42:44.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:42:44.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:42:44.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:42:44.753 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:42:44.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:42:44.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:42:44.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:42:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:42:45.278 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:45.281 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:45.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:45.283 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:42:45.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:45.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:45.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:45.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:45.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:45.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:45.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:45.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:45.364 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:45.369 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:45.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:45.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:45.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:45.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:45.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:45.695 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:42:45.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:45.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:45.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:45.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:46.166 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:42:46.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:42:46.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:46.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:46.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:46.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:47.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:42:47.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:42:47.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:47.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:47.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:47.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:48.049 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:42:48.520 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:42:48.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:48.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:42:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:42:49.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:42:49.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:42:49.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:42:49.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:42:49.932 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:42:50.403 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:42:50.873 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:42:51.344 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:42:51.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:42:52.286 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:42:52.756 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:42:53.227 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:42:53.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:53.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:53.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:53.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:53.385 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1872 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:42:53.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:42:53.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:42:53.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:42:53.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:53.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:53.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:53.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:42:53.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:42:53.406 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:42:53.407 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:42:53.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:42:53.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:42:53.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:42:53.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:53.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:42:53.698 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:42:54.169 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:42:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:42:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:42:55.581 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:42:56.052 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:42:56.523 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:42:56.993 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:42:57.464 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:42:57.935 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:42:58.406 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:42:58.876 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:42:59.347 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:42:59.818 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:43:00.289 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:43:00.760 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:43:01.230 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:43:01.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:01.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:01.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:01.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:01.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:01.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:01.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:01.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:01.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:01.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:01.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:01.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:01.464 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:01.469 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:01.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:01.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:01.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:01.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:01.701 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:43:02.172 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:43:02.643 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:43:03.113 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:43:03.584 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:43:04.055 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:43:04.526 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:43:04.997 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:43:05.467 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:43:05.938 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:43:06.409 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:43:06.880 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:43:07.350 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:43:07.821 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:43:08.292 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:43:08.763 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:43:09.233 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:43:09.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:09.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:09.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:09.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:09.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:09.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:09.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:09.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:09.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:09.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:09.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:09.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:09.509 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:09.510 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:09.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:09.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:09.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:09.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:09.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:09.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:09.704 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:43:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:43:10.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:10.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:10.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:10.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:10.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:10.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:10.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:10.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:10.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:10.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:43:10.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:43:10.376 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:43:10.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:15.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:43:15.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:43:15.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:15.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:15.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:15.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:15.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:15.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:43:15.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:15.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:43:15.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:43:15.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:43:15.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:43:15.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:43:15.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:15.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:15.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:43:15.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:43:15.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:43:15.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:43:15.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:43:15.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:43:15.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:15.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:15.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:43:15.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:43:15.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:43:15.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:43:15.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:43:15.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:43:15.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:15.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:15.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:43:15.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:43:15.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:43:15.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:43:15.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:43:15.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:43:15.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:43:15.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:43:15.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:43:15.399 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:43:15.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:15.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:15.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:43:15.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:43:15.927 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:15.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:15.929 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:15.931 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:43:15.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:15.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:15.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:15.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:15.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:15.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:15.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:15.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:15.968 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:15.970 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:15.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:15.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:15.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:15.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:15.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:16.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:43:16.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:16.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:16.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:16.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:16.817 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:43:17.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:43:17.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:17.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:17.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:17.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:17.758 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:43:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:43:18.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:18.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:18.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:18.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:18.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:43:19.171 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:43:19.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:19.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:19.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:19.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:19.641 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:43:20.112 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:43:20.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:20.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:20.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:20.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:20.583 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:43:21.054 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:43:21.524 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:43:21.995 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:43:22.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:43:22.937 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:43:23.407 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:43:23.878 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:43:23.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:23.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:23.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:23.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:23.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:23.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:23.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:23.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:23.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:23.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:23.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:23.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:24.011 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:24.012 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:24.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:24.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:24.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:24.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:24.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:24.349 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:43:24.820 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:43:25.290 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:43:25.761 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:43:26.232 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:43:26.703 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:43:27.174 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:43:27.644 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:43:28.115 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:43:28.586 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:43:29.057 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:43:29.527 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:43:29.998 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:43:30.469 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:43:30.940 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:43:31.410 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:43:31.881 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:43:32.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:32.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:32.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:32.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:32.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:32.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:32.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:32.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:32.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:32.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:32.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:43:32.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:43:32.041 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:43:32.042 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:32.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:32.042 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.043 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:32.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:43:37.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:43:37.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:43:37.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:37.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:37.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:43:37.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:43:37.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:37.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:43:37.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:43:37.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:43:37.060 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:43:37.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:43:37.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:37.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:43:37.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:43:37.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:43:37.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:43:37.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:43:37.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:43:37.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:43:37.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:37.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:43:37.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:43:37.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:43:37.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:43:37.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:43:37.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:43:37.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:43:37.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:43:37.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:43:37.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:43:37.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:43:37.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:43:37.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:43:37.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:43:37.075 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:43:37.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:43:37.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:43:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:43:37.080 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:43:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:43:37.592 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:37.593 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:37.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:37.593 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:43:37.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:37.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:37.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:37.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:37.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:37.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:37.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:37.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:37.606 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:37.606 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:37.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:37.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:37.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:37.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:37.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:38.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:43:38.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:38.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:38.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:38.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:43:38.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:43:39.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:39.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:39.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:39.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:43:39.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:43:40.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:40.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:40.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:40.414 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:43:40.891 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:43:41.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:41.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:41.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:41.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:43:41.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:43:42.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:43:42.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:43:42.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:43:42.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:43:42.308 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:43:42.779 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:43:43.250 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:43:43.721 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:43:44.191 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:43:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:43:45.133 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:43:45.604 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:43:45.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:45.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:45.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:45.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:45.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:45.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:45.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:45.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:45.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:45.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:45.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:45.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:45.693 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:45.697 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:45.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:45.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:45.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:45.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:46.084 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:43:46.553 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:43:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:43:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:43:47.965 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:43:48.435 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:43:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:43:49.377 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:43:49.848 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:43:50.319 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:43:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:43:51.260 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:43:51.731 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:43:52.202 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:43:52.673 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:43:53.143 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:43:53.614 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:43:53.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:53.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:53.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:53.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:53.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:43:53.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:43:53.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:43:53.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:53.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:53.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:53.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:43:53.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:43:53.748 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:43:53.750 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:43:53.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:43:53.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:43:53.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:43:53.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:53.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:43:54.085 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:43:54.556 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:43:55.026 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:43:55.497 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:43:55.968 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:43:56.439 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:43:56.909 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:43:57.381 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:43:57.857 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:43:58.335 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:43:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:43:59.284 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:43:59.756 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:44:00.227 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:44:00.698 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:44:01.173 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:44:01.647 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:44:01.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:01.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:01.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:01.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:01.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:01.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:01.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:01.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:01.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:01.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:01.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:01.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:01.778 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:01.780 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:01.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:01.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:01.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:01.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:01.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:02.121 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:44:02.598 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:44:03.071 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:44:03.544 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:44:04.017 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:44:04.486 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:44:04.957 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:44:05.427 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:44:05.898 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:44:06.369 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:44:06.840 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:44:07.310 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:44:07.781 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:44:08.252 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:44:08.723 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:44:09.193 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:44:09.664 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:44:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:09.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:09.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:09.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:09.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:09.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:09.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:09.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:09.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:44:09.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:44:09.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:44:09.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:44:09.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:44:09.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:44:09.813 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:44:09.814 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7072 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:44:09.814 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7072 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:44:14.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:44:14.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:44:14.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:44:14.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:44:14.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:44:14.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:44:14.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:44:14.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:44:14.831 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:44:14.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:44:14.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:44:14.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:44:14.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:44:14.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:44:14.835 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:44:14.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:44:14.836 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:44:14.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:44:14.836 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:44:14.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:44:14.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:44:14.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:44:14.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:44:14.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:44:14.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:44:14.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:44:14.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:44:14.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:44:14.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:44:14.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:44:14.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:44:14.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:44:14.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:44:14.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:44:14.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:44:14.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:44:14.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:44:14.846 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:44:14.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:44:14.851 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:44:15.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:44:15.360 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:15.360 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:15.360 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:44:15.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:15.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:15.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:15.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:15.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:15.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:15.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:15.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:15.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:15.378 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:15.380 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:15.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:15.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:15.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:15.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:15.808 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:44:15.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:15.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:15.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:15.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:16.282 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:44:16.755 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:44:16.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:16.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:16.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:16.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:44:17.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:44:17.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:17.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:17.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:17.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:44:18.661 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:44:18.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:18.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:18.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:18.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:19.132 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:44:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:44:19.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:44:19.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:44:19.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:44:19.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:44:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:44:20.546 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:44:21.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:44:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:44:21.979 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:44:22.459 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:44:22.938 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:44:23.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:23.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:23.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:23.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:23.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:23.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:23.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:23.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:23.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:23.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:23.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:23.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:23.419 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:44:23.462 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:23.463 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:23.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:23.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:23.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:23.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:23.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:23.892 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:44:24.365 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:44:24.843 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:44:25.321 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:44:25.793 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:44:26.283 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:44:26.752 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:44:27.222 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:44:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:44:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:44:28.650 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:44:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:44:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:44:30.089 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:44:30.568 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:44:31.047 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:44:31.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:31.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:31.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:31.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:31.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:31.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:31.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:31.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:31.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:31.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:31.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:31.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:31.517 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:31.521 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:31.522 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:44:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:31.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:31.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:31.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:31.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:32.001 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:44:32.479 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:44:32.953 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:44:33.423 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:44:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:44:34.365 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:44:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:44:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:44:35.797 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:44:36.277 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:44:36.757 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:44:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:44:37.716 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:44:38.194 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:44:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:44:39.154 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:44:39.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:39.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:39.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:39.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:39.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:39.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:39.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:39.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:39.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:39.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:39.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:39.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:39.571 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:39.573 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:39.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:39.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:39.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:39.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:39.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:39.633 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:44:40.106 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:44:40.577 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:44:41.047 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:44:41.518 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:44:41.998 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:44:42.477 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:44:42.957 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:44:43.437 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:44:43.917 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:44:44.397 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:44:44.876 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:44:45.355 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:44:45.834 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:44:46.314 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:44:46.789 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:44:47.258 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:44:47.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:47.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:47.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:47.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:47.586 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=7009 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:44:47.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:47.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:47.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:47.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:47.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:47.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:47.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:47.629 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:47.633 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:47.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:47.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:47.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:47.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:47.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:47.729 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:44:48.199 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:44:48.674 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 03:44:49.154 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 03:44:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 03:44:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 03:44:50.594 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 03:44:51.073 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 03:44:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 03:44:52.027 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 03:44:52.507 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 03:44:52.985 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 03:44:53.454 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 03:44:53.930 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 03:44:54.402 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 03:44:54.873 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 03:44:55.344 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 03:44:55.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:55.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:55.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:55.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:55.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:44:55.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:44:55.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:44:55.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:55.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:55.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:55.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:44:55.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:44:55.667 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:44:55.668 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:44:55.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:44:55.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:44:55.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:44:55.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:55.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:44:55.821 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 03:44:56.303 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 03:44:56.782 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 03:44:57.262 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 03:44:57.742 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 03:44:58.222 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 03:44:58.701 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 03:44:59.181 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 03:44:59.661 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 03:45:00.141 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 03:45:00.618 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 03:45:01.092 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 03:45:01.562 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 03:45:02.033 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 03:45:02.509 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 03:45:02.989 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 03:45:03.470 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 03:45:03.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:03.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:03.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:03.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:03.680 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=10451 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:03.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:03.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:03.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:45:03.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:03.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:03.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:03.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:45:03.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:45:03.703 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:03.705 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:03.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:03.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:03.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:03.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:03.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:03.948 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 03:45:04.427 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 03:45:04.905 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 03:45:05.383 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 03:45:05.860 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 03:45:06.338 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 03:45:06.818 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 03:45:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 03:45:07.770 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 03:45:08.249 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 03:45:08.728 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 03:45:09.202 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 03:45:09.672 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 03:45:10.143 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 03:45:10.620 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 03:45:11.100 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 03:45:11.574 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 03:45:11.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:11.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:11.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:11.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:11.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:11.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:11.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:45:11.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:11.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:11.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:11.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:45:11.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:45:11.755 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:11.759 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:11.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:11.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:11.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:11.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:11.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:12.050 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 03:45:12.529 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 03:45:12.998 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 03:45:13.468 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 03:45:13.946 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 03:45:14.426 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 03:45:14.906 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 03:45:15.386 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 03:45:15.867 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 03:45:16.345 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 03:45:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 03:45:17.303 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 03:45:17.783 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 03:45:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 03:45:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 03:45:19.212 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 03:45:19.690 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 03:45:19.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:19.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:19.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:19.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:19.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:19.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:19.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:19.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:19.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:19.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:19.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:19.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:19.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:45:19.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:45:19.787 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:19.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13895 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:24.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:45:24.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:45:24.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:24.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:24.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:24.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:24.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:24.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:45:24.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:24.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:45:24.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:45:24.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:45:24.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:45:24.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:45:24.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:24.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:24.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:45:24.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:45:24.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:45:24.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:45:24.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:45:24.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:45:24.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:24.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:24.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:45:24.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:45:24.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:45:24.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:45:24.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:45:24.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:45:24.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:24.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:24.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:45:24.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:45:24.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:45:24.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:45:24.806 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:45:24.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:24.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:45:25.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:45:25.335 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:25.338 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:25.339 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:45:25.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:25.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:25.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:25.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:45:25.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:25.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:25.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:25.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:45:25.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:45:25.392 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:25.397 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:25.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:25.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:25.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:25.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:25.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:25.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:45:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:25.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:26.258 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:45:26.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:45:26.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:26.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:26.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:26.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:27.230 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:45:27.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:45:27.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:27.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:27.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:27.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:45:28.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:45:28.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:28.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:28.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:28.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:29.167 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:45:29.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:45:29.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:29.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:29.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:29.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:30.131 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:45:30.609 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:45:31.086 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:45:31.572 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:45:32.050 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:45:32.534 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:45:33.010 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:45:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:33.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:33.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:33.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:33.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:33.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:33.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:45:33.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:33.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:33.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:33.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:45:33.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:45:33.476 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:33.480 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:33.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:33.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:33.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:33.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:33.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:33.492 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:45:33.970 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:45:34.449 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:45:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:45:35.418 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:45:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:45:36.372 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:45:36.859 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:45:37.343 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:45:37.830 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:45:38.315 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:45:38.794 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:45:39.280 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:45:39.755 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:45:40.242 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:45:40.722 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:45:41.200 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:45:41.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:41.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:41.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:41.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:41.494 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=3533 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:41.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:41.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:41.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:41.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:41.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:45:41.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:45:41.509 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:45:41.510 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.510 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.510 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.510 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:41.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3537 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:45:46.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:45:46.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:45:46.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:46.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:46.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:46.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:46.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:46.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:45:46.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:46.522 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:45:46.522 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:45:46.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:45:46.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:45:46.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:45:46.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:46.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:46.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:45:46.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:45:46.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:45:46.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:45:46.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:45:46.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:45:46.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:46.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:45:46.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:45:46.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:45:46.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:45:46.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:45:46.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:45:46.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:45:46.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:45:46.532 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:45:46.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:45:46.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:45:46.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:45:46.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:45:46.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:45:46.536 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:45:46.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:45:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:45:46.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:45:47.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:45:47.051 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:45:47.051 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:45:47.051 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:45:47.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:47.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:47.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:47.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:45:47.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:47.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:47.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:47.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:45:47.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:45:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:47.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:45:47.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:45:47.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:47.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:47.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:45:47.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:47.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:47.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:47.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:47.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:45:48.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:45:48.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:48.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:48.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:48.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:45:49.376 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:45:49.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:49.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:49.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:49.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:49.846 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:45:50.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:45:50.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:50.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:50.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:50.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:50.788 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:45:51.259 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:45:51.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:51.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:51.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:51.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:51.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:45:52.200 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:45:52.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:45:53.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:45:53.612 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:45:54.083 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:45:54.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:45:55.025 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:45:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:45:55.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:45:55.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:45:55.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:45:55.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:45:55.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:45:55.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:45:55.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:45:55.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:45:55.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:45:55.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:45:55.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:45:55.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:45:55.131 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:45:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:00.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:00.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:00.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:00.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:00.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:00.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:00.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:00.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:00.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:00.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:00.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:46:00.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:46:00.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:46:00.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:00.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:00.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:00.150 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:46:00.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:00.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:46:00.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:46:00.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:46:00.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:00.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:00.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:00.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:46:00.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:00.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:46:00.155 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:46:00.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:46:00.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:00.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:00.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:00.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:46:00.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:00.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:46:00.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:46:00.162 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:46:00.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:00.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:00.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:46:00.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:46:00.680 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:46:00.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:00.682 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:46:00.683 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:46:00.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:00.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:00.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:46:00.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:00.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:46:00.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:46:00.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:46:00.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:46:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:00.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:46:00.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:46:00.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:00.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:01.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:46:01.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:01.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:01.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:01.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:01.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:46:02.108 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:46:02.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:02.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:02.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:02.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:02.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:46:03.053 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:46:03.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:03.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:03.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:03.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:03.527 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:46:04.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:46:04.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:04.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:04.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:04.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:04.472 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:46:04.946 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:46:05.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:05.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:05.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:05.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:05.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:46:05.899 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:46:06.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:46:06.859 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:46:07.338 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:46:07.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:46:08.296 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:46:08.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:08.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:08.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:08.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:08.770 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:46:08.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:08.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:08.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:08.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:08.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:08.787 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:46:08.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:08.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:08.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.791 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.791 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.791 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.791 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:08.791 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:13.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:13.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:13.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:13.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:13.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:13.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:13.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:13.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:13.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:13.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:13.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:46:13.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:46:13.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:46:13.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:13.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:13.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:13.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:46:13.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:13.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:13.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:46:13.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:13.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:46:13.810 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:46:13.810 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:46:13.810 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:13.810 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:13.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:13.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:46:13.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:13.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:46:13.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:46:13.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:46:13.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:46:13.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:46:13.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:46:13.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:46:13.814 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:46:13.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:13.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:13.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:13.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:46:14.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:46:14.331 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:46:14.332 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:46:14.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:14.334 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:46:14.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:14.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:14.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:46:14.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:14.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:46:14.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:46:14.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:46:14.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:46:14.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:46:14.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:14.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:14.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:14.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:15.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:46:15.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:46:15.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:15.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:15.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:15.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:16.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:46:16.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:46:16.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:16.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:17.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:46:17.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:46:17.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:17.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:17.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:17.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:18.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:46:18.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:46:18.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:18.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:18.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:18.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:19.100 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:46:19.580 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:46:20.064 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:46:20.551 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:46:20.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:20.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:20.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:20.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:20.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:20.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:20.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:20.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:20.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:20.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:20.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:20.872 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:46:20.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:25.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:25.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:25.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:25.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:25.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:25.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:25.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:25.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:25.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:25.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:25.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:46:25.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:46:25.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:46:25.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:25.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:25.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:25.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:46:25.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:25.911 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:46:25.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:46:25.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:46:25.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:25.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:25.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:46:25.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:25.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:46:25.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:46:25.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:46:25.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:25.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:25.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:25.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:46:25.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:25.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:46:25.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:46:25.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:46:25.928 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:46:25.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:25.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:46:26.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:46:26.439 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:46:26.440 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:46:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:26.441 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:46:26.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:26.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:26.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:46:26.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:26.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:46:26.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:46:26.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:46:26.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:46:26.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:46:26.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:26.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:26.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:26.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:27.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:46:27.863 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:46:27.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:27.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:27.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:27.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:46:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:46:28.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:28.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:28.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:28.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:29.327 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:46:29.808 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:46:29.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:29.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:29.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:29.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:30.288 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:46:30.770 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:46:30.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:30.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:30.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:30.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:31.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:31.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:31.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:31.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:31.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:31.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:31.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:31.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:31.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:31.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:31.036 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1079 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:31.037 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1079 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:31.037 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1079 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:31.037 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1079 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:31.037 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1079 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:46:31.250 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:46:31.732 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:46:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:46:32.709 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:46:33.197 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:46:33.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:46:34.179 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:46:34.670 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:46:35.161 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:46:35.641 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:46:36.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:36.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:36.038 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:46:36.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:36.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:36.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:36.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:36.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:36.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:36.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:36.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:36.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:36.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:36.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:36.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:46:36.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:36.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:46:36.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:46:36.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:46:36.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:36.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:36.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:36.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:46:36.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:36.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:46:36.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:46:36.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:46:36.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:36.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:36.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:36.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:46:36.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:36.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:46:36.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:46:36.066 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:46:36.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:36.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:36.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:36.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:36.069 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:46:36.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:36.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:46:41.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:46:41.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:41.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:41.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:41.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:41.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:41.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:41.079 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:41.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:46:41.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:46:41.080 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:46:41.080 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:46:41.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:41.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:41.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:46:41.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:46:41.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:46:41.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:41.082 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:46:41.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:46:41.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:46:41.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:46:41.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:46:41.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:41.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:46:41.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:46:41.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:46:41.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:46:41.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:46:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:46:41.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:46:41.087 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:46:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:46:41.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:46:41.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:46:41.601 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:46:41.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:46:41.602 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:46:41.603 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:46:41.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:46:41.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:46:41.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:46:41.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:46:41.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:46:41.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:46:41.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:46:41.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:46:42.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:46:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:42.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:42.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:42.517 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:46:42.996 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:46:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:43.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:43.475 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:46:43.954 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:46:44.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:44.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:44.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:44.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:44.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:46:44.912 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:46:45.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:45.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:45.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:45.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:45.392 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:46:45.870 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:46:46.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:46.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:46:46.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:46:46.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:46:46.347 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:46:46.831 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:46:47.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:47.317 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:46:47.801 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:46:48.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:48.287 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:46:48.774 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:46:49.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:49.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:46:49.747 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:46:50.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:50.227 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:46:50.699 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:46:51.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:51.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:51.170 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:46:51.641 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:46:52.112 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:46:52.583 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:46:53.054 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:46:53.525 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:46:53.996 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:46:54.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:46:54.468 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:46:54.939 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:46:55.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:55.414 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:46:55.886 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:46:56.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:56.357 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:46:56.828 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:46:57.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:57.300 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:46:57.771 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:46:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:46:58.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:58.713 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:46:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:46:59.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:46:59.656 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:47:00.128 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:47:00.599 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:47:01.071 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:47:01.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:01.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:01.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:01.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:01.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:01.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:01.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:01.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:01.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:01.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:01.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:01.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:01.434 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:01.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:01.435 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4365 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:06.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:06.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:06.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:06.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:06.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:06.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:06.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:06.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:06.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:06.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:06.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:06.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:06.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:06.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:06.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:06.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:06.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:06.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:06.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:06.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:06.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:06.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:06.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:06.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:06.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:06.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:06.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:06.448 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:06.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:06.448 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:06.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:06.450 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:06.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:06.943 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:06.964 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:06.965 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:06.966 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:06.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:06.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:06.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:06.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:06.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:06.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:06.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:06.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:06.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:06.987 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:06.988 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 03:47:06.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:06.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:06.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:06.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:07.004 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.009 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=118 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.013 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=119 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.018 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.023 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=121 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.027 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=122 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.032 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.036 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=124 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.041 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=125 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.046 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.050 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.055 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.064 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.069 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.073 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.078 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.083 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.087 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.092 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.096 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.101 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.106 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.110 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.115 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.124 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.129 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.133 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.138 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.143 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.147 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.152 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.156 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.161 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.166 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.170 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.175 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.184 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.189 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.193 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.198 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.203 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.207 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.212 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.216 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.221 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.226 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.230 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.235 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.244 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.249 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.253 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.258 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.263 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.267 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.272 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.276 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.281 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.286 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.290 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.295 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.304 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.309 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.313 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.318 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.323 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.327 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.332 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.336 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.341 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.346 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.350 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.355 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.364 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.369 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.373 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.378 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.383 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.387 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.392 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.396 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.401 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.406 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.410 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.415 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.424 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:07.442 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.446 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.451 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:07.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:07.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:07.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:07.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:07.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 03:47:07.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:07.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:07.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:07.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:07.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:07.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:07.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:07.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:07.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:07.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:07.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:07.858 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:07.858 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:12.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:12.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:12.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:12.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:12.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:12.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:12.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:12.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:12.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:12.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:12.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:12.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:12.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:12.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:12.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:12.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:12.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:12.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:12.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:12.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:12.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:12.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:12.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:12.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:12.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:12.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:12.888 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:12.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:12.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:12.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:13.383 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:13.400 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:13.400 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:13.401 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:13.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:13.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:13.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:13.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:13.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:13.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:13.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:13.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:13.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:13.429 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:13.433 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:13.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 03:47:13.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:13.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:13.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:13.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:13.444 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.449 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=118 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.453 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=119 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.458 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.463 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=121 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.467 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=122 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.472 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.477 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=124 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.481 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=125 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.486 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.491 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.495 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.504 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.509 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.514 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.518 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.523 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.527 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.532 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.537 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.541 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.546 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.551 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.555 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.564 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.569 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.574 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.578 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.583 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.587 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.592 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.597 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.601 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.606 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.611 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.615 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.624 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.629 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.634 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.638 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.643 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.648 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.652 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.657 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.661 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.666 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.671 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.675 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.684 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.689 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.694 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.698 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.703 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.708 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.712 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.717 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.721 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.726 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.731 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.735 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.744 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.749 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.754 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.758 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.763 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.767 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.772 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.777 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.781 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.786 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.791 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.795 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.804 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.809 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.814 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.818 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.823 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.827 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.832 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.837 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.841 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.846 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.851 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.855 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.864 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:13.880 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.884 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.889 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 03:47:13.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:13.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:13.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:13.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:14.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 03:47:14.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:14.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:14.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:14.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:14.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:14.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:14.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:14.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:14.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:14.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:14.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:14.321 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:14.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:14.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:14.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.323 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.323 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.323 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:14.323 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:19.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:19.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:19.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:19.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:19.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:19.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:19.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:19.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:19.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:19.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:19.334 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:19.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:19.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:19.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:19.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:19.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:19.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:19.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:19.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:19.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:19.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:19.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:19.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:19.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:19.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:19.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:19.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:19.347 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:19.347 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:19.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:19.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:19.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:19.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:19.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:19.348 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:19.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:19.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:19.353 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:19.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:19.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:19.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:19.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:19.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:19.869 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:19.871 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:19.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:19.872 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:19.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:19.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:19.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:19.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:19.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:19.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:19.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:19.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:19.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:19.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:19.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:19.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:19.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:20.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:20.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:20.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:20.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:20.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:20.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:20.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:20.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:20.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:20.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:20.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:20.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:20.328 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:25.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:25.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:25.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:25.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:25.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:25.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:25.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:25.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:25.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:25.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:25.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:25.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:25.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:25.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:25.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:25.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:25.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:25.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:25.353 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:25.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:25.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:25.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:25.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:25.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:25.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:25.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:25.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:25.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:25.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:25.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:25.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:25.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:25.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:25.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:25.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:25.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:25.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:25.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:25.362 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:25.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:25.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:25.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:25.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:25.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:25.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:25.879 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:25.880 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:25.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:25.881 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:25.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:25.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:25.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:25.908 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:25.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:25.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:25.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:25.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:25.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:25.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:25.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:25.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:25.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:25.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:26.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:26.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:26.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:26.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:26.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:26.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:47:27.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:47:27.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:27.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:27.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:27.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:47:28.242 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:47:28.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:28.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:28.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:28.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:28.718 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:47:29.191 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:47:29.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:29.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:47:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:47:30.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:30.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:30.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:30.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:30.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:47:31.074 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:47:31.545 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:47:32.015 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:47:32.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:47:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:47:33.430 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:47:33.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:47:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:47:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:47:35.311 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:47:35.782 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:47:36.252 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:47:36.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:36.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:36.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:36.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:36.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:36.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:36.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:36.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:36.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:36.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:36.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:36.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:36.348 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:36.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:36.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:36.348 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:41.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:41.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:41.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:41.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:41.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:41.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:41.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:41.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:41.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:41.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:41.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:41.365 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:41.365 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:41.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:41.366 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:41.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:41.366 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:41.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:41.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:41.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:41.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:41.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:41.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:41.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:41.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:41.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:41.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:41.371 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:41.371 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:41.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:41.371 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:41.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:41.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:41.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:41.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:41.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:41.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:41.377 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:41.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:41.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:41.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:41.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:41.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:41.898 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:41.899 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:41.901 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:41.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:41.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:41.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:41.932 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:41.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:41.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:41.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:41.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:41.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:41.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:41.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:41.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:41.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:41.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:42.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:42.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:42.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:42.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:42.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:47:43.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:47:43.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:43.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:43.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:43.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:47:44.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:47:44.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:44.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:44.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:44.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:44.707 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:47:45.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:47:45.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:45.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:45.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:45.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:45.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:47:46.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:47:46.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:46.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:46.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:46.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:46.599 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:47:47.073 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:47:47.548 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:47:48.028 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:47:48.508 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:47:48.987 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:47:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:47:49.944 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:47:50.423 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:47:50.903 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:47:51.381 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:47:51.861 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:47:52.334 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:47:52.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:52.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:52.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:52.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:52.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:52.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:52.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:52.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:52.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:52.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:52.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:52.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:52.355 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:47:52.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:52.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:52.355 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:47:57.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:47:57.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:47:57.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:57.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:57.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:57.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:57.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:47:57.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:57.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:57.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:47:57.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:47:57.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:47:57.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:47:57.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:57.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:57.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:47:57.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:47:57.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:47:57.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:47:57.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:47:57.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:47:57.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:57.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:57.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:47:57.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:47:57.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:47:57.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:47:57.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:47:57.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:47:57.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:57.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:47:57.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:47:57.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:47:57.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:47:57.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:47:57.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:47:57.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:47:57.397 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:47:57.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:47:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:47:57.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:47:57.402 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:47:57.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:47:57.917 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:47:57.918 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:57.919 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:47:57.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:57.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:47:57.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:47:57.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:47:57.939 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:47:57.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:57.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:57.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:57.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:47:57.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:47:57.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:47:57.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:47:57.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:47:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:57.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:47:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:47:58.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:58.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:58.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:58.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:58.836 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:47:58.850 [DEBUG] fake_trx.py:264 (MS@172.18.142.22:6700) Recv SETTA cmd
2025-12-12 03:47:59.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:47:59.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:47:59.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:47:59.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:47:59.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:47:59.778 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:48:00.248 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:48:00.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:00.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:00.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:00.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:00.719 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:48:01.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:48:01.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:01.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:01.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:01.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:01.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:48:02.132 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:48:02.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:02.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:02.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:02.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:02.602 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:48:03.073 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:48:03.544 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:48:04.015 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:48:04.487 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:48:04.964 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:48:05.438 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:48:05.914 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:48:06.387 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:48:06.860 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:48:07.340 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:48:07.819 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:48:08.298 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:48:08.776 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:48:09.256 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:48:09.735 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:48:10.216 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:48:10.690 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:48:11.168 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:48:11.647 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:48:12.127 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:48:12.604 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:48:13.082 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:48:13.560 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:48:14.033 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:48:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:48:14.990 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:48:15.467 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:48:15.947 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:48:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:48:16.897 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:48:17.371 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:48:17.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:17.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:17.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:17.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:17.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:17.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:17.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:17.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:17.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:17.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:17.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:17.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:17.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:17.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:17.574 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:48:22.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:22.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:22.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:22.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:22.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:22.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:22.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:22.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:22.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:22.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:22.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:48:22.603 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:48:22.604 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:48:22.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:22.604 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:22.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:22.605 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:48:22.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:22.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:48:22.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:48:22.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:48:22.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:22.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:22.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:22.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:48:22.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:22.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:48:22.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:48:22.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:48:22.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:22.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:22.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:22.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:48:22.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:22.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:48:22.618 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:48:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:48:22.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:48:22.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:48:22.620 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:48:22.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:48:22.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:22.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:22.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:22.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:48:23.107 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:48:23.156 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:48:23.157 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:23.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:23.158 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:48:23.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:23.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:23.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:48:23.182 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:23.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:23.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:23.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:23.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:48:23.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:48:23.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:23.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:23.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:23.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:23.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:23.582 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:48:23.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:23.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:23.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:23.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:24.056 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:48:24.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:48:24.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:24.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:24.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:24.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:48:25.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:48:25.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:25.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:25.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:25.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:48:26.443 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:48:26.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:26.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:26.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:26.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:48:27.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:48:27.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:27.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:27.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:27.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:27.873 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:48:28.347 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:48:28.826 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:48:29.304 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:48:29.784 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:48:30.263 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:48:30.743 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:48:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:48:31.702 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:48:32.176 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:48:32.648 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:48:33.132 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:48:33.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:33.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:33.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:33.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:33.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:33.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:33.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:33.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:33.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:33.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:33.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:33.596 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:48:38.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:38.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:38.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:38.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:38.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:38.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:38.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:38.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:38.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:38.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:38.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:48:38.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:48:38.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:48:38.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:38.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:38.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:38.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:48:38.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:38.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:48:38.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:48:38.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:48:38.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:38.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:38.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:38.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:48:38.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:38.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:48:38.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:48:38.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:48:38.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:38.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:38.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:38.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:48:38.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:38.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:48:38.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:48:38.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:48:38.637 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:48:38.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:38.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:38.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:38.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:48:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:48:39.154 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:48:39.155 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:39.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:39.156 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:48:39.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:39.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:39.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:48:39.173 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:39.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:39.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:39.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:39.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:48:39.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:48:39.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:39.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:39.228 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:39.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:39.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:39.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:48:39.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:39.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:39.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:39.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:40.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:48:40.094 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:40.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:48:40.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:40.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:40.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:40.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:41.031 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:48:41.511 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:48:41.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:41.988 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:48:42.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:48:42.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:42.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:42.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:42.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:42.927 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:48:43.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:48:43.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:43.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:43.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:43.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:43.869 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:48:44.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:48:44.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:48:45.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:48:45.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:48:45.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:45.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:45.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:45.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:45.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:45.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:45.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:45.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:45.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:45.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:45.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:45.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:45.904 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:48:45.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:45.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:45.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:48:50.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:48:50.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:48:50.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:50.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:50.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:50.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:50.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:48:50.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:50.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:50.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:48:50.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:48:50.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:48:50.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:48:50.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:50.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:50.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:48:50.928 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:48:50.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:48:50.928 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:48:50.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:48:50.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:48:50.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:50.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:50.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:48:50.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:48:50.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:48:50.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:48:50.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:48:50.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:48:50.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:50.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:48:50.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:48:50.937 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:48:50.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:48:50.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:48:50.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:48:50.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:48:50.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.943 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:48:50.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:48:50.943 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:48:50.943 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:48:50.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:48:51.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:48:51.463 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:48:51.464 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:51.465 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:48:51.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:48:51.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:48:51.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:48:51.493 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:48:51.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:51.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:51.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:51.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:48:51.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:48:51.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:48:51.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:48:51.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:48:51.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:51.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:48:51.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:48:51.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:51.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:51.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:51.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:52.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:48:52.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:48:52.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:52.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:52.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:52.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:53.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:48:53.796 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:48:53.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:53.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:53.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:53.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:54.273 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:48:54.746 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:48:54.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:54.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:54.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:54.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:55.217 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:48:55.692 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:48:55.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:48:55.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:48:55.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:48:55.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:48:56.170 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:48:56.648 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:48:57.122 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:48:57.591 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:48:58.062 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:48:58.533 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:48:59.005 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:48:59.481 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:48:59.960 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:49:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:49:00.920 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:49:01.400 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:49:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:01.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:01.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:01.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:01.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:01.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:01.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:01.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:01.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:01.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:01.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:01.544 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:01.544 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:06.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:06.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:06.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:06.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:06.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:06.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:06.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:06.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:06.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:06.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:06.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:49:06.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:49:06.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:49:06.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:06.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:06.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:49:06.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:06.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:49:06.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:49:06.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:49:06.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:06.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:06.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:06.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:49:06.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:06.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:49:06.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:49:06.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:49:06.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:06.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:06.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:06.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:49:06.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:06.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:49:06.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:49:06.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:49:06.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:49:06.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:49:06.587 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:49:06.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:06.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:06.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:06.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:49:07.074 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:49:07.111 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:07.113 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:49:07.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:07.115 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:49:07.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:07.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:07.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:07.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:07.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:07.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:07.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:07.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:07.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:07.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:07.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.547 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:49:07.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:07.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:07.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:07.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:07.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:07.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:07.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:07.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:07.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:07.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:07.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:07.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:07.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:07.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:07.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:07.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:07.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.025 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:49:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:08.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:08.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:08.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:08.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:08.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:08.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:08.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:08.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:08.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:08.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:08.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:08.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:08.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:08.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:08.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:08.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:08.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:08.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:08.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:08.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:08.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:08.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:08.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:08.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:49:08.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:08.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:08.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:08.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:08.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:08.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:08.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:08.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:08.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:08.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:08.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:08.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:08.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:08.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:08.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:08.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:08.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:08.905 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:08.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:13.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:13.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:13.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:13.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:13.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:13.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:13.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:13.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:13.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:49:13.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:49:13.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:49:13.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:13.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:13.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:13.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:49:13.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:13.931 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:49:13.932 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:49:13.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:49:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:13.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:13.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:13.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:49:13.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:13.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:49:13.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:49:13.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:49:13.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:13.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:13.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:13.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:49:13.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:13.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:49:13.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:49:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:49:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:49:13.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:49:13.940 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:49:13.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:13.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:49:14.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:49:14.462 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:14.464 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:49:14.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:14.466 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:49:14.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:14.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:14.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:14.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:14.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:14.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:14.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:14.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:14.519 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:14.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:14.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:14.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:14.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:14.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:14.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:49:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:14.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:14.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:14.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:14.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:14.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:14.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:14.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:14.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:14.923 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:49:14.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:14.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:14.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:19.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:19.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:19.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:19.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:19.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:19.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:19.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:19.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:19.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:19.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:19.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:49:19.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:49:19.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:49:19.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:19.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:19.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:19.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:49:19.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:19.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:49:19.952 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:49:19.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:49:19.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:19.952 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:19.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:19.953 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:49:19.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:19.953 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:49:19.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:49:19.956 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:49:19.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:19.956 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:19.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:19.956 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:49:19.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:19.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:49:19.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:49:19.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:49:19.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:49:19.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:49:19.964 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:49:19.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:19.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:49:20.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:49:20.478 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:20.479 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:49:20.479 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:49:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:20.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:20.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:20.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:20.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:20.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:20.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:20.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:20.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:20.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:20.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:20.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:20.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:20.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:49:20.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:20.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:20.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:20.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:49:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:49:21.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:21.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:21.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:21.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:22.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:49:22.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:49:22.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:22.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:22.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:22.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:23.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:49:23.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:23.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:23.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:23.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:23.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:23.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:23.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:23.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:23.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:23.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:23.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:23.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:23.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:23.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:23.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:23.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:23.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:23.772 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:49:23.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:23.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:23.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:23.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:23.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:24.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:49:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:49:24.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:24.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:24.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:24.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:49:25.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:49:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:49:26.634 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:49:26.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:26.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:26.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:26.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:26.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:26.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:26.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:26.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:26.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:26.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:26.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:26.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:26.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:26.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:26.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:26.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:26.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:27.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:27.111 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:49:27.591 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:49:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:49:28.546 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:49:29.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:49:29.504 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:49:29.983 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:49:30.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:30.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:30.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:30.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:30.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:30.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:30.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:30.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:30.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:30.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:30.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:30.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:30.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:30.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:30.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:30.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:30.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:30.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:30.463 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:49:30.943 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:49:31.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:49:31.901 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:49:32.381 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:49:32.860 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:49:33.338 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:49:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:33.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:33.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:33.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:33.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:33.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:33.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:33.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:33.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:33.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:33.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:33.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:33.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:33.381 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:33.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:38.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:38.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:38.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:38.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:38.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:38.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:38.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:38.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:38.397 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:38.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:38.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:49:38.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:49:38.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:49:38.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:38.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:38.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:38.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:49:38.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:38.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:38.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:49:38.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:38.403 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:49:38.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:49:38.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:49:38.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:38.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:38.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:38.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:49:38.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:38.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:49:38.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:49:38.409 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:49:38.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:38.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:49:38.898 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:49:38.928 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:38.929 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:49:38.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:38.930 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:49:38.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:38.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:38.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:38.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:38.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:38.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:38.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:38.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:39.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:49:39.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:39.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:39.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:39.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:49:40.308 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:49:40.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:40.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:40.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:40.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:40.779 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:49:41.250 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:49:41.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:41.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:41.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:41.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:41.720 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:49:42.191 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:49:42.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:42.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:42.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:42.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:42.662 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:49:43.133 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:49:43.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:43.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:43.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:43.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:43.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:49:44.074 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:49:44.545 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:49:45.016 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:49:45.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:49:45.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:49:46.428 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:49:46.899 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:49:47.370 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:49:47.840 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:49:48.311 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:49:48.782 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:49:49.253 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:49:49.723 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:49:50.194 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:49:50.665 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:49:51.136 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:49:51.606 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:49:52.077 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:49:52.548 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:49:52.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:52.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:52.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:52.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:52.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:52.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:52.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:52.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:52.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:52.838 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:49:52.838 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:52.838 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:52.839 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:52.839 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:52.839 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:52.839 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:49:57.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:49:57.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:49:57.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:57.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:57.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:57.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:57.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:49:57.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:57.865 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:57.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:49:57.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:49:57.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:49:57.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:49:57.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:57.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:57.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:49:57.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:49:57.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:49:57.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:49:57.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:49:57.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:49:57.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:57.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:57.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:49:57.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:49:57.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:49:57.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:49:57.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:49:57.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:49:57.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:57.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:49:57.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:49:57.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:49:57.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:49:57.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:49:57.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:49:57.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:49:57.880 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:49:57.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:49:57.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:49:57.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:49:57.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:49:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:49:57.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:49:58.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:49:58.395 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:49:58.396 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:49:58.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:58.397 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:49:58.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:49:58.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:49:58.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:49:58.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:58.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:58.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:58.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:49:58.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:49:58.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:49:58.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:49:58.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:49:58.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:58.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:49:58.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:49:58.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:58.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:58.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:58.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:49:59.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:49:59.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:49:59.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:49:59.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:49:59.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:49:59.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:00.311 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:50:00.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:50:00.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:50:00.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:50:00.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:50:00.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:50:00.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:50:00.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:50:00.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:50:00.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:50:00.795 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:50:00.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:00.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:00.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:00.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:01.276 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:50:01.763 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:50:01.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:01.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:01.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:01.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:02.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:50:02.735 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:50:02.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:02.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:02.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:02.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:03.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:50:03.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:50:04.183 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:50:04.668 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:50:05.151 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:50:05.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:50:06.114 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:50:06.593 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:50:07.068 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:50:07.550 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:50:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:50:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:50:09.004 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:50:09.489 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:50:09.969 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:50:10.452 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:50:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:50:11.420 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:50:11.906 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:50:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:50:12.875 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:50:13.353 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:50:13.832 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:50:14.311 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:50:14.792 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:50:15.279 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:50:15.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:50:15.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:50:15.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:50:15.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:15.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:15.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:15.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:15.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:15.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:15.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:15.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:50:15.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:50:15.589 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:50:15.590 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:15.590 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.590 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.590 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.591 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.591 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.591 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:15.591 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3741 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:20.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:50:20.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:50:20.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:20.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:20.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:20.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:20.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:20.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:50:20.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:20.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:50:20.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:50:20.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:50:20.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:50:20.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:50:20.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:20.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:20.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:50:20.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:50:20.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:50:20.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:50:20.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:50:20.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:50:20.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:20.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:20.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:50:20.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:50:20.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:50:20.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:50:20.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:50:20.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:50:20.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:50:20.608 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:50:20.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:20.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:20.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:50:21.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:50:21.118 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:50:21.119 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:50:21.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:50:21.119 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:50:21.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:50:21.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:50:21.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:50:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:50:21.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:21.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:21.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:21.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:22.070 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:50:22.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:50:22.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:22.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:22.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:22.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:50:23.528 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:50:23.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:23.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:23.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:23.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:24.007 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:50:24.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:50:24.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:24.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:24.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:24.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:24.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:50:25.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:50:25.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:25.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:25.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:25.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:25.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:50:26.414 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:50:26.892 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:50:27.364 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:50:27.847 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:50:28.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:50:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:50:29.285 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:50:29.771 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:50:30.250 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:50:30.729 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:50:31.209 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:50:31.690 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:50:32.171 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:50:32.648 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:50:33.134 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:50:33.620 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:50:34.105 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:50:34.592 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:50:35.078 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:50:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:50:36.052 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:50:36.538 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:50:37.023 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:50:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:50:37.991 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:50:38.476 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:50:38.963 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:50:39.445 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:50:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:50:40.409 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:50:40.889 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:50:41.367 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:50:41.854 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:50:42.341 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:50:42.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:50:42.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:50:42.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:42.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:42.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:42.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:42.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:42.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:42.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:42.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:50:42.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:50:42.628 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:50:42.629 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4654 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:42.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:42.629 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4654 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:42.629 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4654 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:42.629 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4654 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:42.629 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4654 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:50:47.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:50:47.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:50:47.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:47.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:47.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:47.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:47.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:50:47.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:50:47.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:47.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:50:47.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:50:47.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:50:47.654 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:50:47.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:50:47.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:47.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:50:47.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:50:47.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:50:47.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:50:47.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:50:47.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:50:47.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:50:47.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:47.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:50:47.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:50:47.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:50:47.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:50:47.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:50:47.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:50:47.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:50:47.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:50:47.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:50:47.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:50:47.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:50:47.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:50:47.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:50:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:50:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:50:47.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:50:47.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:50:47.666 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:50:47.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:50:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:50:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:50:47.671 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:50:48.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:50:48.182 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:50:48.183 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:50:48.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:50:48.184 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:50:48.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:50:48.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:50:48.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:50:48.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:50:48.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:50:48.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:50:48.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:50:48.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:50:48.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:50:48.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:48.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:48.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:48.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:49.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:50:49.600 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:50:49.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:49.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:49.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:49.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:50.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:50:50.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:50:50.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:50.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:50.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:50.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:50:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:50:51.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:51.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:51.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:51.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:52.018 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:50:52.503 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:50:52.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:50:52.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:50:52.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:50:52.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:50:52.990 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:50:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:50:53.956 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:50:54.441 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:50:54.920 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:50:55.401 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:50:55.880 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:50:56.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:50:56.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:50:57.329 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:50:57.805 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:50:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:50:58.768 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:50:59.252 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:50:59.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:51:00.226 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:51:00.707 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:51:01.191 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:51:01.672 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:51:02.151 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:51:02.633 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:51:03.115 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:51:03.597 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:51:04.082 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:51:04.567 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:51:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:51:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:51:06.022 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:51:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:51:06.994 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:51:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:51:07.965 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:51:08.449 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:51:08.933 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:51:09.420 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:51:09.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:51:09.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:51:09.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:09.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:51:09.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:51:09.686 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:51:09.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:09.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:14.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:51:14.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:51:14.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:14.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:14.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:14.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:51:14.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:14.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:51:14.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:51:14.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:51:14.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:51:14.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:51:14.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:14.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:14.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:51:14.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:51:14.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:51:14.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:51:14.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:51:14.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:51:14.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:51:14.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:51:14.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:51:14.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:51:14.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:51:14.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:51:14.719 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:51:14.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:51:14.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:14.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:14.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:14.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:51:15.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:51:15.234 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:51:15.235 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:51:15.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:51:15.237 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:51:15.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:51:15.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:51:15.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:51:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:51:15.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:51:15.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:51:15.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:51:15.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:51:15.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:51:15.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:15.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:15.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:15.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:51:16.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:51:16.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:16.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:16.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:16.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:17.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:51:17.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:51:17.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:17.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:17.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:17.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:51:18.596 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:51:18.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:18.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:18.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:18.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:19.082 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:51:19.566 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:51:19.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:19.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:19.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:19.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:20.052 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:51:20.538 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:51:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:51:21.506 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:51:21.991 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:51:22.475 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:51:22.960 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:51:23.444 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:51:23.927 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:51:24.414 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:51:24.899 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:51:25.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:51:25.870 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:51:26.356 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:51:26.842 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:51:27.327 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:51:27.813 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:51:28.298 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:51:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:51:29.267 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:51:29.754 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:51:30.238 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:51:30.722 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:51:31.206 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:51:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:51:32.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:51:32.660 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:51:33.144 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:51:33.622 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:51:34.105 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:51:34.590 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:51:35.078 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:51:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:51:36.050 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:51:36.536 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:51:37.020 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:51:37.504 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:51:37.989 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:51:38.472 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:51:38.957 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:51:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:51:39.928 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:51:40.413 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:51:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:51:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:51:41.865 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:51:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:51:42.833 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:51:43.318 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:51:43.803 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:51:44.287 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:51:44.772 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:51:45.257 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:51:45.741 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:51:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:51:46.711 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:51:47.195 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:51:47.679 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:51:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:51:48.648 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:51:48.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:51:48.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:51:48.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:48.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:48.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:48.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:48.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:48.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:51:48.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:51:48.760 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:51:48.760 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.760 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7165 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.761 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.762 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.762 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.762 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.762 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.762 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:48.763 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7166 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:51:53.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:51:53.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:51:53.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:53.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:53.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:53.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:53.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:51:53.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:51:53.767 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:53.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:51:53.767 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:51:53.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:51:53.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:51:53.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:51:53.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:53.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:51:53.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:51:53.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:51:53.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:51:53.772 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:51:53.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:51:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:51:53.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:51:53.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:51:53.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:51:53.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:51:53.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:51:53.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:51:53.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:51:53.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:51:53.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:51:53.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:51:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:51:53.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:51:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:51:53.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:51:53.781 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:51:53.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:51:53.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:51:53.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:51:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:51:54.295 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:51:54.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:51:54.296 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:51:54.297 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:51:54.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:51:54.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:51:54.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:51:54.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:51:54.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:51:54.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:51:54.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:51:54.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:51:54.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:51:54.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:54.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:54.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:54.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:55.241 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:51:55.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:51:55.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:55.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:55.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:55.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:56.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:51:56.695 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:51:56.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:56.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:56.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:56.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:51:57.663 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:51:57.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:57.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:57.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:57.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:58.148 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:51:58.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:51:58.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:51:58.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:51:58.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:51:58.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:51:59.120 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:51:59.603 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:52:00.088 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:52:00.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:52:01.056 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:52:01.540 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:52:02.026 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:52:02.511 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:52:02.995 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:52:03.480 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:52:03.967 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:52:04.451 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:52:04.936 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:52:05.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:52:05.906 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:52:06.391 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:52:06.877 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:52:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:52:07.848 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:52:08.332 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:52:08.816 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:52:09.301 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:52:09.786 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:52:10.272 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:52:10.756 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:52:11.243 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:52:11.726 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:52:12.212 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:52:12.696 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:52:13.183 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:52:13.669 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:52:14.156 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:52:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:52:15.128 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:52:15.611 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:52:16.095 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:52:16.580 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:52:17.065 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:52:17.548 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:52:18.032 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:52:18.517 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:52:19.001 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:52:19.485 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:52:19.969 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:52:20.454 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:52:20.938 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:52:21.421 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:52:21.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:52:21.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:52:21.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:21.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:21.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:21.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:21.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:21.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:21.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:52:21.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:21.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5899 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:26.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:26.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:26.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:26.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:26.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:26.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:26.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:26.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:26.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:26.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:26.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:52:26.825 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:52:26.825 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:52:26.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:26.826 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:26.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:26.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:52:26.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:26.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:52:26.828 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:52:26.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:52:26.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:26.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:26.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:26.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:52:26.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:26.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:52:26.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:52:26.831 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:52:26.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:26.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:26.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:26.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:52:26.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:26.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:52:26.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:52:26.836 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:52:26.836 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:52:26.836 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:26.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:26.841 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:52:27.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:52:27.352 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:52:27.353 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:52:27.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:52:27.354 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:52:27.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:27.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:27.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:27.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:27.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:27.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:27.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:27.410 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:52:32.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:32.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:32.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:32.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:32.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:32.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:32.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:32.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:32.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:32.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:32.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:52:32.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:52:32.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:52:32.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:32.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:32.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:32.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:52:32.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:32.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:52:32.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:52:32.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:52:32.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:32.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:32.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:32.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:52:32.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:32.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:52:32.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:52:32.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:52:32.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:32.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:32.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:32.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:52:32.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:32.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:52:32.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:52:32.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:52:32.439 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:52:32.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:52:32.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:32.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:52:32.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:52:32.954 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:52:32.954 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:52:32.955 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:52:32.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:52:33.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:33.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:33.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:33.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:33.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:33.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:33.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:33.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:33.010 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:52:33.010 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:33.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:33.011 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:38.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:38.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:38.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:38.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:38.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:38.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:38.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:38.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:52:38.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:52:38.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:52:38.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:38.024 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:38.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:38.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:52:38.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:38.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:38.026 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:52:38.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:38.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:52:38.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:52:38.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:52:38.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:38.028 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:38.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:38.028 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:52:38.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:38.028 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:52:38.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:52:38.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:52:38.031 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:52:38.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:52:38.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:38.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:52:38.517 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:52:38.548 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:52:38.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:52:38.550 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:52:38.551 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:52:38.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:38.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:38.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:38.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:38.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:38.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:38.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:38.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:38.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:38.608 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:52:38.608 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:38.609 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:43.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:43.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:43.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:43.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:43.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:43.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:43.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:43.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:43.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:43.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:43.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:52:43.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:52:43.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:52:43.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:43.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:43.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:43.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:52:43.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:43.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:52:43.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:52:43.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:52:43.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:43.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:43.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:43.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:52:43.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:43.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:43.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:52:43.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:43.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:52:43.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:52:43.629 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:52:43.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:43.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:52:44.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:52:44.144 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:52:44.145 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:52:44.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:52:44.146 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:52:44.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:52:44.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:52:44.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:52:44.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:52:44.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:52:44.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:52:44.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:52:44.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:52:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:52:44.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:44.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:44.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:44.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:45.080 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:52:45.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:52:45.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:45.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:45.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:45.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:46.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:52:46.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:52:46.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:46.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:46.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:46.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:47.001 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:52:47.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:52:47.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:47.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:47.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:47.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:47.961 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:52:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:52:48.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:48.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:48.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:48.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:48.922 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:52:49.403 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:52:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:52:50.379 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:52:50.852 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:52:51.322 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:52:51.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:52:52.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:52:52.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:52:52.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:52.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:52.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:52.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:52.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:52.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:52.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:52.191 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:52:52.192 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.192 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.192 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.192 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.192 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.193 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1818 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.193 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.193 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.193 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.193 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.194 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.194 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.194 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.194 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1819 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.195 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.195 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.195 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.195 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.195 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.196 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.196 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.196 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1820 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.196 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.196 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.197 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.197 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.197 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.197 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.197 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:52.198 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:52:57.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:52:57.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:52:57.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:57.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:57.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:57.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:57.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:52:57.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:57.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:57.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:52:57.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:52:57.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:52:57.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:52:57.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:57.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:57.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:52:57.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:52:57.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:52:57.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:57.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:52:57.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:52:57.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:52:57.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:52:57.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:52:57.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:57.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:52:57.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:52:57.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:52:57.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:52:57.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:52:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:52:57.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:52:57.203 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:52:57.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:52:57.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:52:57.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:52:57.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:52:57.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:52:57.690 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:52:57.716 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:52:57.716 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:52:57.717 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:52:57.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:52:57.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:52:57.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:52:57.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:52:57.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:52:57.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:52:57.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:52:57.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:52:57.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:52:58.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:52:58.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:58.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:58.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:58.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:58.650 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:52:59.124 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:52:59.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:52:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:52:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:52:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:52:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:53:00.074 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:53:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:00.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:00.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:53:01.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:53:01.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:01.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:01.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:01.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:01.494 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:53:01.973 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:53:02.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:02.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:53:02.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:53:03.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:53:03.884 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:53:04.364 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:53:04.845 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:53:05.324 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:53:05.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:05.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:05.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:05.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:05.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:05.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:05.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:05.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:05.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:05.746 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:53:05.746 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.746 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.746 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.746 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.746 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.747 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:05.747 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:10.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:10.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:10.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:10.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:10.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:10.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:10.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:10.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:10.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:10.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:53:10.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:53:10.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:53:10.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:10.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:10.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:10.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:53:10.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:10.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:53:10.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:53:10.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:53:10.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:10.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:10.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:10.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:53:10.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:10.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:53:10.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:53:10.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:53:10.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:10.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:10.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:10.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:53:10.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:10.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:53:10.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:53:10.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:53:10.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:53:10.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:53:10.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:53:10.770 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:53:10.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:10.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:53:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:53:11.284 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:53:11.285 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:53:11.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:53:11.287 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:53:11.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:11.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:11.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:53:11.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:53:11.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:53:11.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:53:11.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:53:11.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:53:11.737 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:53:11.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:11.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:11.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:11.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:12.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:53:12.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:53:12.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:12.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:12.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:12.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:53:13.658 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:53:13.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:13.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:13.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:13.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:53:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:53:14.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:14.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:14.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:14.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:15.099 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:53:15.579 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:53:15.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:15.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:16.060 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:53:16.540 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:53:17.015 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:53:17.493 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:53:17.971 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:53:18.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:53:18.923 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:53:19.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:19.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:19.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:19.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:19.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:19.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:19.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:19.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:19.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:19.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:19.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:19.325 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:53:19.325 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:19.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.326 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.327 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.327 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.327 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.327 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.327 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:19.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:24.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:24.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:24.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:24.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:24.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:24.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:24.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:24.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:24.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:24.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:24.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:53:24.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:53:24.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:53:24.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:24.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:24.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:24.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:53:24.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:24.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:53:24.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:53:24.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:53:24.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:24.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:24.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:24.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:53:24.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:24.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:53:24.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:53:24.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:53:24.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:24.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:24.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:24.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:53:24.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:24.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:53:24.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:53:24.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:53:24.350 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:53:24.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:24.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:24.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:24.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:53:24.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:53:24.866 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:53:24.867 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:53:24.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:53:24.868 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:53:24.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:24.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:24.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:53:24.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:53:24.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:53:24.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:53:24.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:53:24.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:53:25.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:53:25.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:25.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:25.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:25.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:25.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:53:26.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:53:26.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:26.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:26.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:26.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:26.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:53:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:53:27.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:27.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:27.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:27.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:27.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:53:28.197 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:53:28.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:28.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:28.676 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:53:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:53:29.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:29.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:29.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:29.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:29.636 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:53:30.114 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:53:30.592 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:53:31.071 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:53:31.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:53:32.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:53:32.506 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:53:32.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:32.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:32.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:32.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:32.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:32.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:32.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:32.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:32.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:32.906 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.906 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.907 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:32.907 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:37.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:37.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:37.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:37.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:37.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:37.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:37.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:37.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:37.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:37.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:37.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:53:37.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:53:37.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:53:37.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:37.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:37.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:37.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:53:37.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:37.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:53:37.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:53:37.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:53:37.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:37.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:37.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:37.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:53:37.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:37.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:53:37.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:53:37.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:53:37.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:37.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:37.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:37.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:53:37.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:37.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:53:37.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:53:37.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:53:37.933 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:53:37.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:53:38.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:53:38.445 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:53:38.446 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:53:38.446 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:53:38.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:38.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:53:38.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:53:38.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:53:38.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:53:38.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:38.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:39.367 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:53:39.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:53:39.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:39.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:39.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:39.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:40.325 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:53:40.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:53:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:40.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:41.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:53:41.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:53:41.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:41.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:41.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:41.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:42.241 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:53:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:53:42.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:42.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:42.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:42.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:43.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:53:43.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:53:44.152 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:53:44.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:53:45.106 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:53:45.586 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:53:46.066 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:53:46.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:46.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:46.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:46.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:46.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:46.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:46.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:46.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:46.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:46.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:46.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:46.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:46.478 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:46.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:53:51.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:53:51.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:53:51.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:51.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:51.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:51.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:51.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:53:51.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:51.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:51.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:53:51.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:53:51.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:53:51.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:53:51.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:51.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:51.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:53:51.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:53:51.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:53:51.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:51.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:53:51.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:53:51.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:51.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:53:51.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:53:51.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:53:51.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:53:51.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:53:51.502 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:53:51.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:53:51.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:53:51.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:53:51.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:53:52.015 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:53:52.017 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:53:52.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:53:52.018 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:53:52.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:53:52.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:53:52.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:53:52.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:53:52.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:53:52.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:53:52.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:53:52.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:53:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:53:52.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:52.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:52.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:52.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:52.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:53:53.431 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:53:53.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:53.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:53.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:53.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:53.909 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:53:54.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:53:54.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:54.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:53:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:53:55.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:55.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:55.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:55.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:55.829 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:53:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:53:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:53:56.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:53:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:53:56.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:53:56.789 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:53:57.267 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:53:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:53:58.229 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:53:58.709 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:53:59.189 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:53:59.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:54:00.146 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:54:00.621 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:54:01.090 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:54:01.562 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:54:02.032 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:54:02.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:54:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:54:03.467 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:54:03.946 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:54:04.425 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:54:04.898 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:54:05.371 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:54:05.849 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:54:06.328 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:54:06.803 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:54:07.283 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:54:07.763 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:54:08.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:08.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:08.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:08.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:08.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:08.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:08.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:08.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:08.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:08.060 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:54:08.060 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.060 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.061 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.061 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.061 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.061 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.061 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.062 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.062 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.062 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.062 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:08.062 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:13.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:13.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:13.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:13.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:13.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:13.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:13.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:13.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:13.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:13.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:13.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:54:13.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:54:13.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:54:13.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:13.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:13.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:13.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:54:13.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:13.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:54:13.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:54:13.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:54:13.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:13.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:13.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:13.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:54:13.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:13.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:54:13.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:54:13.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:54:13.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:13.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:13.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:13.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:54:13.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:13.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:54:13.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:54:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.084 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:54:13.084 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:54:13.084 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:54:13.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:13.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:13.089 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:54:13.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:54:13.599 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:54:13.600 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:54:13.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:54:13.600 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:54:13.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:13.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:13.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:54:13.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:54:13.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:54:13.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:54:13.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:54:13.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:54:14.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:54:14.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:14.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:14.519 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:54:14.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:54:15.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:15.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:15.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:15.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:54:15.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:54:16.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:16.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:16.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:16.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:54:16.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:54:17.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:17.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:17.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:17.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:17.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:54:17.868 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:54:18.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:18.349 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:54:18.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:54:19.303 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:54:19.783 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:54:20.263 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:54:20.736 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:54:21.209 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:54:21.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:21.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:21.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:21.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:21.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:21.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:21.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:21.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:21.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:21.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:21.631 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:54:21.631 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:21.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:21.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:21.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:21.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:21.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:21.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:21.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:26.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:26.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:26.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:26.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:26.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:26.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:26.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:26.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:54:26.653 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:54:26.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:54:26.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:26.654 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:26.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:26.655 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:54:26.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:26.655 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:54:26.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:54:26.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:54:26.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:26.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:26.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:26.658 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:54:26.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:26.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:54:26.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:54:26.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:54:26.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:26.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:26.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:26.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:54:26.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:26.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:54:26.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:54:26.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:54:26.665 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:54:26.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:26.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:26.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:26.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:54:27.154 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:54:27.180 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:54:27.181 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:54:27.181 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:54:27.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:54:27.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:27.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:27.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:54:27.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:54:27.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:54:27.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:54:27.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:54:27.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:54:27.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:54:27.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:27.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:27.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:27.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:28.106 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:54:28.582 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:54:28.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:28.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:28.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:28.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:29.055 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:54:29.526 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:54:29.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:29.999 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:54:30.472 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:54:30.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:30.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:30.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:30.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:30.941 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:54:31.412 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:54:31.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:31.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:31.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:31.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:31.890 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:54:32.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:54:32.843 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:54:33.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:54:33.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:54:34.258 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:54:34.729 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:54:35.199 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:54:35.671 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:54:36.142 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:54:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:54:37.082 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:54:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:54:38.029 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:54:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:54:38.981 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:54:39.452 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:54:39.925 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:54:40.400 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:54:40.880 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:54:41.359 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:54:41.838 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:54:42.312 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:54:42.782 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:54:43.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:43.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:43.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:43.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:43.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:43.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:43.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:43.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:43.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:43.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:43.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:43.216 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:54:43.216 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:43.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:43.217 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:43.217 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:43.217 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:43.217 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:43.217 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:48.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:48.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:48.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:48.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:48.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:48.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:48.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:48.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:48.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:48.236 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:54:48.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:54:48.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:54:48.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:48.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:48.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:48.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:54:48.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:48.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:54:48.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:54:48.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:54:48.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:48.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:48.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:48.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:54:48.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:48.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:54:48.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:54:48.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:54:48.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:48.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:48.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:48.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:54:48.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:48.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:54:48.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:54:48.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:54:48.259 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:54:48.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:48.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:48.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:48.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:48.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:54:48.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:54:48.786 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:54:48.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:54:48.790 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:54:48.791 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:54:48.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:48.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:48.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:54:48.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:48.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:48.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:48.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:48.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:48.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:48.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:48.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:48.849 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:48.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:48.850 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:53.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:53.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:53.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:53.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:53.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:53.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:53.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:53.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:53.867 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:53.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:53.868 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:54:53.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:54:53.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:54:53.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:53.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:53.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:53.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:54:53.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:53.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:54:53.879 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:54:53.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:54:53.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:53.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:53.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:53.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:54:53.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:53.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:54:53.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:54:53.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:54:53.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:53.886 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:53.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:53.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:54:53.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:53.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:54:53.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:54:53.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:54:53.894 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:54:53.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:53.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:54:54.382 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:54:54.415 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:54:54.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:54:54.416 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:54:54.417 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:54:54.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:54:54.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:54:54.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:54:54.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:54:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:54:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:54:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:54:54.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:54.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:54.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:54.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:54.477 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:54:54.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:54.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:54.477 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:54.477 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:54.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:54.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:54.478 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:54:59.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:54:59.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:54:59.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:59.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:59.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:59.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:59.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:54:59.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:59.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:59.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:54:59.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:54:59.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:54:59.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:54:59.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:59.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:59.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:54:59.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:54:59.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:54:59.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:54:59.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:54:59.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:54:59.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:59.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:59.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:54:59.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:54:59.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:54:59.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:54:59.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:54:59.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:54:59.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:59.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:54:59.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:54:59.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:54:59.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:54:59.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:54:59.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:54:59.513 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:54:59.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:54:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:54:59.518 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:55:00.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:55:00.025 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:55:00.026 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:55:00.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:55:00.026 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:55:00.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:00.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:00.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:00.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:00.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:00.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:00.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:00.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:00.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:00.097 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:55:00.097 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:00.097 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:00.097 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:00.097 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:00.097 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:05.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:05.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:05.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:05.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:05.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:05.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:05.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:05.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:05.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:05.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:55:05.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:55:05.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:55:05.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:05.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:05.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:05.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:55:05.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:05.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:55:05.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:55:05.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:55:05.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:05.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:05.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:05.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:55:05.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:05.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:55:05.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:55:05.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:55:05.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:05.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:05.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:05.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:55:05.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:05.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:55:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:55:05.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:55:05.137 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:55:05.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:55:05.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:05.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:05.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:05.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:55:05.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:05.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:55:05.662 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:55:05.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:55:05.665 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:55:05.667 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:55:05.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:05.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:05.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:05.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:05.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:05.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:05.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:05.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:05.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:05.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:05.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:05.747 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:55:05.748 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.748 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.748 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.749 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.750 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:05.752 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:10.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:10.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:10.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:10.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:10.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:10.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:10.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:10.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:10.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:10.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:10.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:55:10.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:55:10.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:55:10.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:10.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:10.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:10.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:55:10.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:10.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:10.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:55:10.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:10.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:55:10.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:55:10.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:55:10.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:10.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:10.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:10.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:55:10.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:10.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:55:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:55:10.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:55:10.772 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:55:10.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:55:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:10.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:55:11.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:55:11.288 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:55:11.289 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:55:11.289 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:55:11.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:55:11.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:11.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:11.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:11.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:11.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:11.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:11.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:11.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:11.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:11.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:11.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:11.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:11.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:11.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:11.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:11.365 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:55:11.365 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:11.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:11.365 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:11.365 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:11.365 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:16.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:16.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:16.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:16.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:16.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:16.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:16.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:16.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:16.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:16.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:55:16.383 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:55:16.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:55:16.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:16.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:16.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:16.385 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:55:16.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:16.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:55:16.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:55:16.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:55:16.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:16.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:16.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:16.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:55:16.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:16.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:55:16.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:55:16.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:55:16.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:16.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:16.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:16.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:55:16.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:16.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:55:16.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:55:16.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:55:16.398 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:55:16.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:55:16.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:16.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:16.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:55:16.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:55:16.914 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:55:16.915 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:55:16.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:55:16.916 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:55:16.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:16.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:16.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:16.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:16.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:16.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:16.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:16.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:16.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:16.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:16.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:16.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:16.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:16.990 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:55:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:16.990 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.990 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:16.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:55:21.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:21.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:21.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:21.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:21.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:21.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:22.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:22.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:22.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:22.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:55:22.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:55:22.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:55:22.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:55:22.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:22.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:22.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:22.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:55:22.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:55:22.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:55:22.011 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:55:22.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:55:22.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:22.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:22.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:22.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:55:22.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:55:22.012 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:55:22.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:55:22.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:55:22.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:22.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:55:22.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:55:22.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:55:22.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:55:22.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:55:22.018 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:55:22.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:55:22.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:55:22.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:55:22.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:55:22.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:55:22.019 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:55:22.019 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:55:22.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:55:22.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:55:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:55:22.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:55:22.533 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:55:22.533 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:55:22.534 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:55:22.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:22.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:55:22.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:55:22.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:55:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:55:23.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:23.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:23.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:23.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:23.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:55:23.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:55:24.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:24.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:24.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:24.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:55:24.927 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:55:25.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:25.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:25.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:25.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:25.410 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:55:25.895 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:55:26.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:26.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:26.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:26.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:26.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:55:26.863 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:55:27.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:27.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:27.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:27.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:27.349 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:55:27.833 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:55:28.317 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:55:28.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:55:29.287 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:55:29.772 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:55:30.258 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:55:30.742 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:55:31.228 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:55:31.713 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 03:55:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 03:55:32.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 03:55:33.169 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 03:55:33.653 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 03:55:34.137 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 03:55:34.620 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 03:55:35.107 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 03:55:35.591 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 03:55:36.079 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 03:55:36.563 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 03:55:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 03:55:37.536 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 03:55:38.021 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 03:55:38.505 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 03:55:38.989 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 03:55:39.474 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 03:55:39.959 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 03:55:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 03:55:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 03:55:41.417 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 03:55:41.897 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 03:55:42.381 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 03:55:42.868 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 03:55:43.354 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 03:55:43.839 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 03:55:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 03:55:44.808 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 03:55:45.295 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 03:55:45.781 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 03:55:46.267 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 03:55:46.750 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 03:55:47.237 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 03:55:47.722 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 03:55:48.208 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 03:55:48.693 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 03:55:49.179 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 03:55:49.664 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 03:55:50.151 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 03:55:50.635 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 03:55:51.119 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 03:55:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 03:55:52.093 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 03:55:52.575 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 03:55:53.057 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 03:55:53.541 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 03:55:54.027 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 03:55:54.513 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 03:55:54.998 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 03:55:55.481 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 03:55:55.968 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 03:55:56.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:55:56.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:55:56.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:55:56.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:55:56.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:55:56.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:55:56.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:55:56.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:55:56.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:55:56.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:55:56.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:55:56.044 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:55:56.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:01.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:01.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:01.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:01.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:01.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:01.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:01.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:01.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:01.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:01.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:01.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:01.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:01.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:01.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:01.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:01.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:01.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:01.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:01.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:01.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:01.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:01.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:01.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:01.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:01.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:01.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:01.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:01.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:01.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:01.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:01.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:01.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:01.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:01.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:01.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:01.085 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:01.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:01.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:01.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:01.605 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:01.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:01.606 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:01.607 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:02.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:02.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:02.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:02.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:02.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:02.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:03.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:56:03.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:03.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:03.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:03.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:03.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:56:03.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:56:04.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:04.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:04.467 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:56:04.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:04.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:04.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:04.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:04.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:04.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:04.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:04.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:04.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:04.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:04.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:04.641 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:04.642 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=753 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:09.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:09.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:09.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:09.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:09.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:09.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:09.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:09.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:09.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:09.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:09.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:09.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:09.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:09.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:09.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:09.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:09.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:09.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:09.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:09.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:09.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:09.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:09.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:09.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:09.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:09.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:09.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:09.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:09.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:09.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:09.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:09.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:09.664 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:09.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:09.664 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:09.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:09.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:09.667 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:09.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:09.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:09.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:09.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:10.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:10.186 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:10.188 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:10.190 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:10.631 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:10.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:10.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:10.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:10.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:11.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:11.587 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:56:11.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:11.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:11.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:11.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:12.066 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:56:12.544 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:56:12.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:12.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:12.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:12.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:56:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:56:13.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:13.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:13.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:13.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:13.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:56:14.468 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:56:14.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:14.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:14.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:14.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:14.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:56:15.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:56:15.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:56:16.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:16.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:16.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:16.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:16.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:16.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:16.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:16.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:16.205 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:56:16.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:16.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:16.205 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:16.206 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:16.206 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:16.206 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:16.206 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:16.206 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1391 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:21.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:21.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:21.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:21.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:21.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:21.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:21.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:21.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:21.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:21.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:21.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:21.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:21.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:21.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:21.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:21.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:21.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:21.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:21.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:21.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:21.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:21.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:21.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:21.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:21.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:21.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:21.233 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:21.233 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:21.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:21.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:21.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:21.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:21.753 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:21.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:21.756 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:21.760 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:22.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:22.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:22.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:22.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:22.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:23.148 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:56:23.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:23.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:23.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:23.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:23.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:56:24.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:56:24.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:24.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:24.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:24.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:24.570 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:56:25.047 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:56:25.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:25.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:25.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:25.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:25.526 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:56:26.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:56:26.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:26.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:26.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:26.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:26.484 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:56:26.963 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:56:27.442 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:56:27.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:27.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:27.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:27.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:27.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:27.778 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:56:27.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:27.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:32.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:32.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:32.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:32.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:32.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:32.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:32.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:32.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:32.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:32.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:32.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:32.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:32.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:32.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:32.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:32.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:32.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:32.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:32.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:32.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:32.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:32.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:32.803 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:32.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:32.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:32.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:32.804 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:32.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:32.806 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:32.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:32.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:32.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:32.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:32.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:32.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:32.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:32.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:32.812 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:32.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:32.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:32.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:32.817 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:33.294 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:33.342 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:33.346 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:33.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:33.349 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:33.773 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:33.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:33.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:33.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:33.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:34.253 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:34.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:56:34.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:34.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:34.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:34.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:35.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:56:35.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:56:35.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:35.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:35.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:35.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:36.166 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:56:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:56:36.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:36.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:36.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:36.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:56:37.599 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:56:37.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:37.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:37.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:37.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:38.072 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:56:38.546 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:56:39.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:56:39.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:39.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:39.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:39.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:39.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:39.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:39.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:39.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:39.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:39.367 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:56:39.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:39.367 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:39.367 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:39.367 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:39.367 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:39.367 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:44.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:44.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:44.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:44.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:44.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:44.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:44.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:44.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:44.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:44.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:44.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:44.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:44.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:44.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:44.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:44.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:44.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:44.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:44.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:44.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:44.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:44.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:44.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:44.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:44.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:44.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:44.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:44.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:44.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:44.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:44.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:44.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:44.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:44.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:44.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:44.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:44.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:44.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:44.403 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:44.403 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:44.408 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:44.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:44.932 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:44.934 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:44.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:44.936 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:45.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:45.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:45.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:45.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:45.842 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:46.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:56:46.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:46.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:46.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:46.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:46.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:56:47.265 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:56:47.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:47.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:47.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:47.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:47.740 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:56:48.220 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:56:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:48.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:48.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:48.700 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:56:48.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:49.180 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:56:49.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:49.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:49.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:49.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:49.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:56:50.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:56:50.616 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:56:51.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:56:51.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:56:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:56:52.534 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:56:52.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:52.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:52.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:52.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:52.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:52.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:52.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:52.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:52.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:52.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:52.991 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:56:52.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.991 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.992 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.993 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.993 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.993 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.993 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:52.993 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:56:57.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:56:57.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:56:57.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:57.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:57.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:57.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:56:57.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:57.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:57.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:56:57.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:56:57.996 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:56:57.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:56:57.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:57.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:57.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:56:57.997 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:56:57.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:56:57.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:57.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:56:57.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:56:57.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:58.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:56:58.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:56:58.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.003 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:56:58.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:56:58.003 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:56:58.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:56:58.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:56:58.008 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:56:58.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:56:58.516 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:56:58.517 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:56:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:56:58.518 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:56:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:56:59.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:56:59.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:56:59.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:56:59.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:56:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:56:59.911 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:57:00.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:00.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:00.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:00.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:00.385 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:57:00.862 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:57:01.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:01.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:01.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:01.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:01.342 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:57:01.815 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:57:02.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:02.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:02.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:02.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:02.294 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:57:02.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:02.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:02.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:02.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:02.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:02.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:02.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:02.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:02.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:02.532 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:02.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:07.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:07.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:07.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:07.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:07.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:07.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:07.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:07.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:07.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:07.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:07.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:07.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:07.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:07.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:07.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:07.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:07.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:07.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:07.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:07.565 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:07.565 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:07.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:07.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:07.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:07.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:07.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:07.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:07.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:07.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:07.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:07.572 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:07.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:07.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:07.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:07.572 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:07.573 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:07.573 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:07.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:07.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:08.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:08.090 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:08.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:08.093 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:08.094 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:08.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:08.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:08.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:08.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:08.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:08.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:08.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:08.144 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.144 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:08.145 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:13.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:13.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:13.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:13.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:13.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:13.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:13.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:13.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:13.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:13.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:13.169 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:13.170 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:13.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:13.170 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:13.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:13.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:13.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:13.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:13.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:13.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:13.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:13.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:13.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:13.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:13.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:13.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:13.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:13.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:13.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:13.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:13.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:13.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:13.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:13.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:13.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:13.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:13.181 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:13.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:13.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:13.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:13.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:13.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:13.696 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:13.696 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:13.697 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:13.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:13.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:13.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:13.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:13.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:13.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:13.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:13.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:13.753 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:13.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:18.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:18.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:18.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:18.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:18.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:18.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:18.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:18.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:18.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:18.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:18.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:18.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:18.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:18.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:18.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:18.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:18.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:18.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:18.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:18.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:18.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:18.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:18.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:18.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:18.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:18.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:18.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:18.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:18.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:18.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:18.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:18.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:18.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:18.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:18.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:18.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:18.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:18.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:18.794 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:18.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:18.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:18.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:18.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:18.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:19.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:19.324 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:19.326 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:19.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:19.328 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:19.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:19.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:19.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:19.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:19.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:19.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:19.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:19.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:19.379 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:19.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:19.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:19.379 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.379 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.379 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:19.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:24.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:24.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:24.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:24.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:24.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:24.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:24.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:24.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:24.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:24.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:24.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:24.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:24.407 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:24.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:24.408 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:24.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:24.408 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:24.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:24.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:24.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:24.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:24.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:24.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:24.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:24.414 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:24.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:24.416 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:24.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:24.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:24.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:24.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:24.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:24.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:24.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:24.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:24.424 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:24.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:24.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:24.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:24.946 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:24.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:24.949 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:24.950 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:24.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:24.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:24.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:57:24.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:24.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:24.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:24.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:57:24.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:57:25.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:57:25.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:25.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:25.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:25.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:25.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:57:26.353 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:57:26.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:26.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:26.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:26.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:26.833 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:57:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:57:27.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:27.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:27.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:27.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:27.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:57:28.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:28.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:28.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:28.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:28.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:28.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:28.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:28.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:28.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:28.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:28.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:28.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:28.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:28.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:28.073 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:33.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:33.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:33.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:33.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:33.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:33.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:33.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:33.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:33.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:33.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:33.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:33.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:33.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:33.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:33.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:33.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:33.101 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:33.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:33.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:33.105 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:33.105 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:33.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:33.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:33.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:33.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:33.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:33.107 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:33.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:33.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:33.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:33.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:33.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:33.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:33.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:33.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:33.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:33.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:33.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:33.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:33.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:33.116 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:33.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:33.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:33.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:33.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:33.639 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:33.640 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:33.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:33.642 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:33.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:33.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:33.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:57:33.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:33.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:33.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:33.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:57:33.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:57:34.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:57:34.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:34.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:34.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:34.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:34.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:57:35.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:57:35.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:35.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:35.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:35.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:35.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:57:35.989 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:57:36.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:36.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:36.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:36.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:36.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:57:36.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:36.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:36.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:36.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:36.941 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:57:37.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:37.421 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:57:37.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:37.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:37.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:37.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:37.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:37.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:37.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:37.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:37.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:37.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:37.444 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:37.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:37.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:37.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:42.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:42.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:42.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:42.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:42.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:42.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:42.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:42.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:42.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:42.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:42.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:42.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:42.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:42.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:42.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:42.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:42.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:42.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:42.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:42.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:42.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:42.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:42.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:42.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:42.468 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:42.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:42.468 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:42.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:42.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:42.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:42.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:42.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:42.470 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:42.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:42.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:42.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:42.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:42.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:42.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:42.474 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:42.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:42.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:42.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:42.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:42.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:42.999 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:43.001 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:43.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:43.003 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:43.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:43.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:43.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:57:43.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:43.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:43.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:43.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:57:43.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:57:43.432 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:57:43.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:43.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:43.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:57:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:57:44.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:44.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:44.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:44.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:44.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:57:45.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:57:45.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:45.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:45.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:45.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:45.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:57:46.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:46.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:46.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:46.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:46.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:57:46.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:46.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:46.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:46.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:57:47.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:57:47.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:47.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:47.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:47.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:47.701 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:57:48.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:57:48.660 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:57:49.140 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:57:49.620 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:57:50.100 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:57:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:57:51.062 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:57:51.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:51.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:51.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:51.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:51.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:51.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:51.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:51.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:51.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:51.104 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:51.104 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:57:56.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:57:56.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:57:56.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:56.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:56.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:56.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:57:56.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:56.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:56.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:57:56.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:57:56.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:57:56.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:57:56.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:56.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:56.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:57:56.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:57:56.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:57:56.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:57:56.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:57:56.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:57:56.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:56.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:56.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:57:56.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:57:56.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:57:56.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:57:56.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:57:56.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:57:56.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:56.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:57:56.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:57:56.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:57:56.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:57:56.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:57:56.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:57:56.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:57:56.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:57:56.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:57:56.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:57:56.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:57:56.139 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:57:56.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:57:56.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:57:56.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:57:56.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:57:56.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:57:56.655 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:57:56.655 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:57:56.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:57:56.656 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:57:56.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:56.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:57:56.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:57:57.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:57:57.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:57.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:57.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:57:58.039 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:57:58.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:58.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:58.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:58.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:58.510 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:57:58.980 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:57:59.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:57:59.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:57:59.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:57:59.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:57:59.451 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:57:59.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:57:59.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:57:59.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:59.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:57:59.922 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:58:00.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:00.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:00.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:00.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:00.393 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:58:00.863 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:58:01.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:01.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:01.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:01.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:58:01.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:58:02.276 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:58:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:58:03.217 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:58:03.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:58:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:58:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:58:04.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:04.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:04.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:04.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:04.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:04.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:04.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:04.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:04.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:04.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:04.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:04.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:04.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:04.716 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:04.716 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.716 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.716 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.717 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.717 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.717 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.717 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:04.717 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:09.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:09.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:09.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:09.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:09.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:09.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:09.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:09.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:09.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:09.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:09.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:58:09.742 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:58:09.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:58:09.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:09.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:09.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:09.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:58:09.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:09.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:58:09.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:58:09.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:58:09.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:09.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:09.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:09.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:58:09.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:09.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:58:09.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:58:09.754 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:58:09.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:09.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:09.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:09.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:58:09.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:09.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:58:09.760 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:58:09.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:58:09.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:58:09.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:58:09.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:58:09.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:58:09.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:58:09.762 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:58:09.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:58:09.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:09.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:09.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:09.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:58:10.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:58:10.281 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:58:10.283 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:58:10.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:10.283 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:58:10.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:10.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:10.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:58:10.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:10.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:10.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:10.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:58:10.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:58:10.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:58:10.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:10.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:10.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:10.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:11.222 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:58:11.706 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:58:11.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:11.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:11.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:11.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:12.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:58:12.679 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:58:12.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:12.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:12.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:12.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:13.164 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:58:13.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:13.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:13.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:13.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:13.649 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:58:13.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:13.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:13.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:13.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:14.133 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:58:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:58:14.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:14.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:14.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:14.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:15.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:58:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:58:16.075 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:58:16.559 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:58:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:58:17.529 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:58:18.014 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:58:18.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:18.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:18.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:18.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:18.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:18.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:18.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:18.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:18.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:18.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:18.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:18.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:18.329 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:18.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1804 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:23.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:23.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:23.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:23.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:23.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:23.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:23.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:23.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:23.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:23.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:23.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:58:23.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:58:23.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:58:23.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:23.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:23.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:23.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:58:23.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:23.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:23.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:58:23.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:23.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:23.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:58:23.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:23.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:58:23.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:58:23.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:58:23.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:58:23.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:58:23.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:58:23.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:58:23.354 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:58:23.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:23.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:23.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:58:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:58:23.867 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:58:23.868 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:58:23.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:23.869 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:58:23.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:23.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:23.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:58:23.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:23.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:23.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:23.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:58:23.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:58:23.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:23.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:23.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:23.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:24.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:58:24.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:24.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:24.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:58:25.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:58:25.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:25.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:25.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:25.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:25.768 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:58:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:58:26.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:26.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:26.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:26.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:26.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:58:27.217 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:58:27.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:27.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:27.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:27.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:58:28.178 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:58:28.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:28.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:28.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:28.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:28.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:58:28.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:28.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:28.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:28.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:28.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:28.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:28.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:28.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:28.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:28.904 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1178 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:28.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:28.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1178 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.904 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.905 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:28.905 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1179 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:33.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:33.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:33.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:33.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:33.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:33.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:33.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:33.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:33.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:33.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:33.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:58:33.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:58:33.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:58:33.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:33.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:33.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:33.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:58:33.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:33.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:58:33.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:58:33.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:58:33.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:33.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:33.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:33.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:58:33.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:33.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:58:33.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:58:33.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:58:33.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:33.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:33.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:33.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:58:33.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:33.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:58:33.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:58:33.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:58:33.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:58:33.939 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:58:33.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:33.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:33.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:58:34.433 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:58:34.452 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:58:34.453 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:58:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:34.453 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:58:34.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:34.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:34.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:58:34.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:34.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:34.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:34.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:58:34.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:58:34.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:58:34.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:34.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:34.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:34.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:35.404 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:58:35.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:58:35.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:35.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:35.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:35.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:36.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:58:36.860 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:58:36.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:36.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:36.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:36.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:37.347 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:58:37.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:37.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:37.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:37.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:37.833 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:58:37.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:37.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:37.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:37.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:38.320 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:58:38.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:58:38.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:38.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:38.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:38.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:39.288 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:58:39.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:58:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:58:40.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:40.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:40.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:40.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:40.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:40.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:40.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:40.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:40.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:40.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:40.319 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:40.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:40.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:40.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:40.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:40.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:40.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:45.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:45.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:45.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:45.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:45.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:45.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:45.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:45.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:45.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:45.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:45.338 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:58:45.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:58:45.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:58:45.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:45.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:45.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:45.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:58:45.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:45.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:58:45.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:58:45.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:58:45.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:45.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:45.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:45.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:58:45.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:45.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:58:45.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:58:45.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:58:45.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:45.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:45.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:45.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:58:45.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:45.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:58:45.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:58:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:58:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:58:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:58:45.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:58:45.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:58:45.357 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:58:45.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:58:45.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:45.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:58:45.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:58:45.873 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:58:45.874 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:58:45.875 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:58:45.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:45.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:45.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:58:45.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:58:46.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:58:46.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:46.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:46.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:46.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:46.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:58:47.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:58:47.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:47.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:47.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:47.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:47.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:58:48.281 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:58:48.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:48.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:48.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:48.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:48.766 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:58:49.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:49.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:49.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:49.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:49.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:49.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:49.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:49.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:49.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:49.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:49.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:49.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:49.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:49.044 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:54.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:54.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:54.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:54.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:54.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:54.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:54.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:54.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:54.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:54.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:58:54.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:58:54.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:58:54.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:58:54.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:54.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:54.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:54.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:58:54.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:58:54.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:58:54.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:58:54.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:58:54.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:54.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:54.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:54.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:58:54.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:58:54.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:58:54.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:58:54.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:58:54.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:54.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:58:54.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:54.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:58:54.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:58:54.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:58:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:58:54.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:58:54.088 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:58:54.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:58:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:58:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:58:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:58:54.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:58:54.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:58:54.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:58:54.607 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:58:54.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:54.609 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:58:54.610 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:58:54.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:54.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:54.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:58:54.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:58:54.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:58:54.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:58:54.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:58:54.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:58:55.066 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:58:55.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:55.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:55.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:55.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:55.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:58:56.037 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:58:56.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:56.524 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:58:57.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:58:57.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:57.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:57.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:58:57.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:58:57.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:58:57.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:58:57.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:58:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:58:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:58:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:58:57.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:58:57.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:58:57.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:58:57.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:58:57.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:58:57.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:58:57.819 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:58:57.820 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:02.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:02.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:02.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:02.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:02.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:02.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:02.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:02.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:02.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:02.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:02.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:02.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:02.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:02.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:02.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:02.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:02.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:02.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:02.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:02.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:02.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:02.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:02.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:02.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:02.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:02.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:02.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:02.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:02.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:02.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:02.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:02.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:02.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.853 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:02.853 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:02.853 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:02.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.853 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:02.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:02.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:02.858 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:03.371 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:03.373 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:03.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:03.374 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:03.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:03.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:03.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:59:03.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:03.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:03.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:03.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:59:03.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:59:03.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:03.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:03.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:03.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:03.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:03.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:03.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:03.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:03.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:03.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:03.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:03.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:03.673 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:03.673 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:03.673 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:03.673 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:08.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:08.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:08.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:08.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:08.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:08.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:08.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:08.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:08.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:08.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:08.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:08.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:08.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:08.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:08.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:08.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:08.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:08.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:08.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:08.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:08.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:08.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:08.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:08.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:08.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:08.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:08.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:08.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:08.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:08.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:08.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:08.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:08.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:08.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:08.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:08.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:08.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:08.702 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:08.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:08.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:08.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:08.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:08.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:09.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:09.216 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:09.217 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:09.217 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:09.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:09.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:09.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:09.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:59:09.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:09.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:09.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:09.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:59:09.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:59:09.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:09.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:09.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:09.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:09.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:09.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:09.284 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:09.285 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:14.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:14.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:14.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:14.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:14.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:14.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:14.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:14.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:14.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:14.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:14.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:14.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:14.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:14.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:14.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:14.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:14.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:14.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:14.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:14.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:14.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:14.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:14.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:14.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:14.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:14.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:14.317 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:14.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:14.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:14.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:14.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:14.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:14.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:14.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:14.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:14.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:14.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:14.324 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:14.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:14.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:14.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:14.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:14.814 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:14.848 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:14.850 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:14.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:14.852 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:14.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:14.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:14.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:59:14.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:14.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:14.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:14.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:59:14.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:59:15.293 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:59:15.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:15.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:15.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:15.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:15.767 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:59:16.246 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:59:16.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:16.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:16.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:16.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:16.714 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:59:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:59:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:17.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:17.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:17.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:17.665 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:59:18.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:59:18.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:18.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:18.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:59:19.082 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:59:19.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:19.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:19.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:19.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:19.561 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:59:20.035 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:59:20.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:59:20.988 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:59:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:59:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:59:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:59:22.906 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:59:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:59:23.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:23.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:23.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:23.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:23.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:23.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:23.777 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2023 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.777 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.778 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.778 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.778 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:23.778 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2024 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:28.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:28.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:28.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:28.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:28.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:28.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:28.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:28.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:28.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:28.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:28.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:28.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:28.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:28.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:28.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:28.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:28.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:28.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:28.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:28.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:28.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:28.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:28.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:28.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:28.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:28.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:28.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:28.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:28.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:28.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:28.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:28.800 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:28.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:28.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:29.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:29.316 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:29.317 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:29.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:29.320 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:29.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:29.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:29.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:59:29.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:29.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:29.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:29.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:59:29.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:59:29.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:59:29.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:29.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:30.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:59:30.713 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:59:30.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:30.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:30.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:30.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:31.192 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:59:31.672 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:59:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:31.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:32.152 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:59:32.622 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:59:32.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:32.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:32.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:32.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 03:59:33.567 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 03:59:33.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:33.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:33.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:33.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:34.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 03:59:34.510 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 03:59:34.981 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 03:59:35.456 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 03:59:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 03:59:36.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 03:59:36.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 03:59:37.351 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 03:59:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 03:59:38.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:38.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:38.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:38.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:38.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:38.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:38.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:38.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:38.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:38.136 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:38.136 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:38.136 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:38.136 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:38.136 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:38.136 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:43.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:43.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:43.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:43.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:43.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:43.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:43.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:43.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:43.147 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:43.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:43.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:43.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:43.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:43.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:43.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:43.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:43.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:43.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:43.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:43.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:43.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:43.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:43.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:43.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:43.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:43.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:43.155 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:43.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:43.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:43.674 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:43.676 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:43.678 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:43.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:43.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:43.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 03:59:43.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:43.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:43.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:43.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 03:59:43.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 03:59:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:59:44.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:44.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:44.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:44.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:44.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:59:45.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 03:59:45.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:45.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:45.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:45.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 03:59:46.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 03:59:46.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:46.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:46.495 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 03:59:46.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 03:59:46.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 03:59:46.735 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:46.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 03:59:46.781 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.823 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.864 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.901 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.943 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:46.969 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 03:59:46.992 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.029 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.070 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.112 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.149 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:47.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:47.190 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.232 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:47.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 03:59:47.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 03:59:47.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:47.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:47.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:47.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:47.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:47.279 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=884 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=884 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:47.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=885 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:52.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:52.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:52.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:52.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:52.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:52.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:52.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:52.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:52.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:52.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:52.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:52.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:52.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:52.292 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:52.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:52.292 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:52.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:52.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:52.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:52.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:52.295 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:52.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:52.295 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:52.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:52.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:52.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:52.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:52.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:52.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:52.298 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:52.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:52.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:52.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:52.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:52.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:52.815 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:52.817 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:52.818 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:52.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:52.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:52.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:52.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:52.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:52.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:52.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:52.984 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:52.984 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 03:59:57.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 03:59:57.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 03:59:57.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:57.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:57.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:58.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 03:59:58.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:58.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:58.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 03:59:58.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 03:59:58.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 03:59:58.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 03:59:58.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:58.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:58.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 03:59:58.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 03:59:58.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 03:59:58.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 03:59:58.011 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 03:59:58.011 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 03:59:58.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:58.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:58.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 03:59:58.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 03:59:58.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 03:59:58.012 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 03:59:58.013 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 03:59:58.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 03:59:58.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:58.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 03:59:58.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 03:59:58.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 03:59:58.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 03:59:58.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 03:59:58.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 03:59:58.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 03:59:58.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 03:59:58.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 03:59:58.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 03:59:58.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 03:59:58.017 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 03:59:58.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 03:59:58.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 03:59:58.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 03:59:58.506 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 03:59:58.532 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 03:59:58.533 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 03:59:58.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 03:59:58.534 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 03:59:58.978 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 03:59:59.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 03:59:59.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 03:59:59.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 03:59:59.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 03:59:59.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 03:59:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:00:00.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:00.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:00.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:00.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:00.391 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:00:00.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:00:01.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:01.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:01.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:01.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:00:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:00:02.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:02.277 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:00:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:00:03.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:03.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:03.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:03.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:03.236 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:00:03.716 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:00:04.196 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:00:04.675 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:00:05.155 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:00:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:00:06.115 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:00:06.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:06.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:06.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:06.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:06.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:06.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:06.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:06.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:06.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:06.564 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:06.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:06.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:06.565 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:11.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:11.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:11.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:11.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:11.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:11.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:11.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:11.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:11.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:11.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:11.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:11.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:11.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:11.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:11.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:11.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:11.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:11.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:11.593 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:11.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:11.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:11.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:11.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:11.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:11.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:11.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:11.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:11.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:11.599 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:11.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:11.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:11.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:11.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:11.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:11.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:11.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:11.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:11.605 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:11.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:11.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:11.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:11.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:12.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:12.122 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:12.123 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:12.124 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:12.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:00:12.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:12.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:12.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:12.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:13.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:00:13.533 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:00:13.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:13.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:13.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:13.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:00:14.493 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:00:14.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:14.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:14.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:14.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:14.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:00:15.452 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:00:15.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:15.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:15.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:15.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:15.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:00:16.412 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:00:16.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:16.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:16.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:16.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:16.892 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:00:17.371 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:00:17.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:00:18.332 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:00:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:00:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:00:19.771 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:00:20.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:20.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:20.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:20.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:20.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:20.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:20.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:20.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:20.146 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:20.146 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1816 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:20.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:20.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1816 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1816 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:20.147 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:25.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:25.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:25.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:25.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:25.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:25.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:25.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:25.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:25.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:25.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:25.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:25.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:25.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:25.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:25.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:25.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:25.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:25.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:25.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:25.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:25.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:25.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:25.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:25.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:25.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:25.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:25.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:25.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:25.167 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:25.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:25.167 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:25.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:25.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:25.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:25.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:25.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:25.171 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:25.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:25.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:25.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:25.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:25.658 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:25.687 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:25.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:25.690 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:25.693 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:00:26.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:26.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:26.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:26.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:26.609 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:00:27.089 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:00:27.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:27.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:27.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:27.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:27.561 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:00:28.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:00:28.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:28.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:28.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:28.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:00:28.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:28.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:28.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:28.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:28.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:28.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:28.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:28.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:28.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:28.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:28.735 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:28.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:33.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:33.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:33.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:33.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:33.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:33.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:33.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:33.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:33.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:33.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:33.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:33.751 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:33.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:33.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:33.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:33.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:33.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:33.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:33.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:33.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:33.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:33.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:33.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:33.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:33.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:33.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:33.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:33.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:33.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:33.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:33.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:33.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:33.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:33.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:33.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:33.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:33.765 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:33.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:33.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:33.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:34.252 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:34.280 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:34.281 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:34.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:34.282 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:34.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:00:34.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:00:34.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:00:34.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:00:34.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:00:34.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:00:34.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:00:34.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:00:34.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:34.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:00:34.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:00:34.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:00:34.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:00:34.730 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:00:34.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:34.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:00:34.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:00:34.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:00:34.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:34.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:34.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:34.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:34.745 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:34.745 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:39.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:39.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:39.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:39.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:39.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:39.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:39.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:39.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:39.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:39.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:39.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:39.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:39.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:39.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:39.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:39.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:39.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:39.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:39.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:39.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:39.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:39.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:39.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:39.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:39.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:39.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:39.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:39.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:39.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:39.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:39.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:39.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:39.780 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:39.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:39.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:39.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:39.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:40.268 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:40.303 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:40.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:40.304 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:40.305 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:40.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:40.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:40.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:40.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:40.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:40.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:40.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:40.321 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:40.321 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.321 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.321 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.321 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:40.322 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:45.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:45.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:45.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:45.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:45.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:45.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:45.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:45.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:45.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:45.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:45.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:45.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:45.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:45.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:45.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:45.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:45.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:45.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:45.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:45.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:45.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:45.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:45.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:45.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:45.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:45.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:45.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:45.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:45.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:45.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:45.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:45.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:45.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:45.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:45.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:45.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:45.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:45.354 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:45.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:45.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:45.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:45.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:45.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:45.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:45.872 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:45.872 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:45.873 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:46.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:00:46.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:46.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:46.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:46.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:46.788 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:00:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:00:47.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:47.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:47.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:47.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:47.726 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:00:47.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:47.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:47.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:47.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:47.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:47.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:47.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:47.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:47.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:47.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:47.893 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:47.893 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:00:52.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:52.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:52.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:52.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:52.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:52.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:52.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:52.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:52.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:52.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:00:52.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:00:52.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:00:52.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:00:52.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:52.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:52.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:52.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:00:52.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:00:52.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:00:52.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:00:52.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:00:52.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:52.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:52.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:52.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:00:52.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:00:52.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:00:52.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:00:52.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:00:52.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:52.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:00:52.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:00:52.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:00:52.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:00:52.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:00:52.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:00:52.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:00:52.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:00:52.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:00:52.939 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:00:52.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:00:52.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:00:52.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:00:52.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:52.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:00:52.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:00:52.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:00:53.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:00:53.458 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:00:53.458 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:00:53.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:00:53.459 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:00:53.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:00:53.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:00:53.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:00:53.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:00:53.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:53.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:53.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:53.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:54.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:00:54.839 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:00:54.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:54.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:54.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:54.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:55.309 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:00:55.780 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:00:55.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:55.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:55.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:55.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:56.251 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:00:56.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:00:56.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:00:56.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:00:56.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:00:56.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:00:56.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:00:56.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:00:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:00:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:00:56.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:00:56.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:00:56.281 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:00:56.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:01.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:01.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:01.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:01.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:01.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:01.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:01.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:01.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:01.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:01.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:01.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:01.305 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:01.305 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:01.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:01.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:01.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:01.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:01.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:01.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:01.308 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:01.308 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:01.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:01.308 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:01.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:01.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:01.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:01.309 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:01.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:01.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:01.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:01.311 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:01.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:01.311 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:01.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:01.311 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:01.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:01.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:01.314 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:01.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:01.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:01.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:01.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:01.826 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:01.827 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:01.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:01.827 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:01.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:01.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:01.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:01.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:01:01.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:01:01.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:01:01.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:01:01.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:01:02.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:02.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:02.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:02.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:02.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:02.778 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:03.265 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:03.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:03.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:03.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:03.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:04.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:04.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:04.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:04.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:04.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:04.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:04.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:04.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:04.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:04.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:04.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:04.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:04.010 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:09.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:09.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:09.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:09.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:09.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:09.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:09.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:09.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:09.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:09.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:09.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:09.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:09.030 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:09.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:09.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:09.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:09.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:09.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:09.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:09.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:09.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:09.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:09.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:09.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:09.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:09.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:09.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:09.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:09.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:09.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:09.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:09.040 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:09.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:09.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:09.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:09.553 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:09.555 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:09.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:09.556 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:09.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:09.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:09.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:09.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:01:09.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:01:09.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:01:09.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:01:09.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:01:10.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:10.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:10.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:10.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:10.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:10.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:11.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:11.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:11.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:11.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:11.476 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:11.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:01:12.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:12.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:12.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:12.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:12.449 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:01:12.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:12.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:12.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:12.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:12.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:12.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:12.456 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:17.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:17.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:17.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:17.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:17.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:17.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:17.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:17.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:17.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:17.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:17.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:17.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:17.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:17.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:17.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:17.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:17.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:17.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:17.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:17.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:17.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:17.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:17.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:17.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:17.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:17.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:17.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:17.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:17.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:17.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:17.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:17.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:17.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:17.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:17.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:17.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:17.482 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:17.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:17.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:17.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:17.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:17.994 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:17.995 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:17.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:17.995 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:17.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:01:17.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:01:17.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:01:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:18.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:18.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:18.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:18.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:19.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:19.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:19.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:19.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:19.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:19.917 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:20.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:20.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:20.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:20.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:20.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:20.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:20.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:20.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:20.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:20.177 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:20.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:25.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:25.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:25.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:25.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:25.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:25.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:25.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:25.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:25.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:25.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:25.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:25.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:25.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:25.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:25.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:25.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:25.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:25.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:25.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:25.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:25.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:25.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:25.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:25.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:25.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:25.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:25.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:25.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:25.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:25.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:25.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:25.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:25.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:25.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:25.207 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:25.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:25.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:25.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:25.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:25.721 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:25.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:25.723 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:25.724 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:25.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:25.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:25.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:25.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:01:25.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:01:25.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:01:25.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:01:25.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:01:26.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:26.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:26.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:27.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:27.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:27.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:27.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:27.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:27.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:28.126 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:01:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:28.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:28.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:01:29.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:01:29.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:29.581 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:01:29.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:29.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:29.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:29.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:29.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:29.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:29.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:29.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:29.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:29.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:29.609 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:29.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:29.610 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:34.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:34.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:34.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:34.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:34.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:34.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:34.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:34.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:34.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:34.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:34.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:34.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:34.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:34.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:34.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:34.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:34.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:34.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:34.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:34.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:34.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:34.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:34.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:34.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:34.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:34.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:34.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:34.637 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:34.637 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:34.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:34.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:34.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:34.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:34.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:34.638 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:34.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:34.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:34.642 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:34.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:34.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:34.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:35.155 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:35.155 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:35.156 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:35.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:35.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:35.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:35.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:35.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:01:35.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:01:35.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:01:35.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:01:35.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:01:35.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:35.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:35.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:35.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:35.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:36.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:36.587 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:36.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:36.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:36.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:36.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:37.074 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:37.560 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:01:37.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:37.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:37.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:37.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:38.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:01:38.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:38.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:38.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:38.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:38.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:38.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:38.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:38.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:38.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:38.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:38.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:38.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:38.307 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:43.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:43.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:43.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:43.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:43.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:43.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:43.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:43.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:43.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:43.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:43.323 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:43.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:43.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:43.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:43.327 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:43.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:43.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:43.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:43.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:43.329 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:43.329 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:43.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:43.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:43.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:43.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:43.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:43.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:43.332 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:43.332 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:43.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:43.333 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:43.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:43.333 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:43.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:43.333 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:43.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:43.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:43.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:43.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:43.337 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:43.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:43.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:43.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:43.852 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:43.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:43.853 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:43.855 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:44.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:44.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:44.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:44.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:44.798 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:45.283 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:45.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:45.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:45.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:45.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:45.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:45.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:45.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:45.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:45.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:45.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:45.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:45.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:45.873 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:45.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:45.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:45.873 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:45.873 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:45.873 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:45.873 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:45.873 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:01:50.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:50.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:50.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:50.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:50.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:50.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:50.891 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:50.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:50.891 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:50.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:50.895 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:50.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:50.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:50.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:50.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:50.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:50.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:50.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:50.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:50.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:50.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:50.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:50.899 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:50.899 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:50.899 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:50.901 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:50.901 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:50.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:50.902 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:50.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:50.902 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:50.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:50.902 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:50.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:50.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:50.906 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:50.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:50.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:50.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:01:51.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:01:51.421 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:01:51.422 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:01:51.423 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:01:51.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:51.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:01:51.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:01:51.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:01:51.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:51.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:51.884 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:01:51.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:51.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:51.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:51.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:52.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:01:52.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:01:52.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:52.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:52.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:52.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:53.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:01:53.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:01:53.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:53.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:53.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:53.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:54.300 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:01:54.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:01:54.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:01:54.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:01:54.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:01:54.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:01:54.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:54.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:54.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:54.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:54.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:54.503 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:01:54.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:59.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:01:59.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:01:59.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:59.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:59.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:59.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:59.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:01:59.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:59.519 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:59.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:01:59.520 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:01:59.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:01:59.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:01:59.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:59.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:59.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:01:59.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:01:59.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:01:59.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:01:59.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:01:59.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:01:59.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:59.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:59.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:01:59.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:01:59.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:01:59.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:01:59.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:01:59.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:01:59.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:59.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:01:59.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:01:59.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:01:59.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:01:59.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:01:59.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:01:59.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:01:59.536 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:01:59.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:01:59.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:01:59.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:01:59.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:01:59.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:00.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:00.052 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:00.053 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:00.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:00.054 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:00.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:00.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:00.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:00.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:00.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:00.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:00.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:00.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:00.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:00.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:00.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:00.121 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:00.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:00.122 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.122 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.122 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.123 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.123 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.123 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.123 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.123 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:00.124 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:05.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:05.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:05.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:05.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:05.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:05.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:05.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:05.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:05.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:05.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:05.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:05.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:05.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:05.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:05.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:05.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:05.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:05.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:05.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:05.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:05.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:05.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:05.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:05.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:05.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:05.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:05.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:05.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:05.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:05.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:05.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:05.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:05.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:05.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:05.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:05.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:05.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:05.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:05.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:05.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:05.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:05.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:05.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:05.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:05.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:05.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:05.162 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:05.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:05.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:05.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:05.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:05.690 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:05.693 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:05.695 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:05.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:05.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:05.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:05.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:05.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:06.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:02:06.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:06.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:06.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:06.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:02:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:02:07.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:07.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:07.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:07.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:07.547 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:02:08.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:02:08.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:08.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:08.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:08.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:08.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:02:08.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:08.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:08.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:08.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:08.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:08.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:08.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:08.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:08.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:08.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:08.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:08.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:08.763 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:08.763 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.763 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:08.764 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:13.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:13.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:13.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:13.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:13.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:13.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:13.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:13.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:13.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:13.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:13.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:13.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:13.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:13.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:13.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:13.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:13.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:13.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:13.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:13.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:13.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:13.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:13.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:13.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:13.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:13.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:13.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:13.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:13.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:13.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:13.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:13.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:13.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:13.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:13.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:13.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:13.794 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:13.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:13.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:13.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:13.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:14.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:14.315 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:14.317 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:14.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:14.318 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:14.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:14.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:14.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:14.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:14.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:14.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:14.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:14.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:14.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:14.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:14.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:14.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:14.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:14.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:14.402 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:14.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:14.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:19.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:19.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:19.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:19.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:19.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:19.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:19.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:19.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:19.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:19.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:19.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:19.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:19.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:19.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:19.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:19.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:19.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:19.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:19.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:19.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:19.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:19.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:19.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:19.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:19.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:19.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:19.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:19.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:19.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:19.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:19.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:19.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:19.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:19.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:19.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:19.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:19.426 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:19.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:19.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:19.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:19.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:19.941 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:19.942 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:19.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:19.943 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:19.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:19.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:19.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:19.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:19.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:19.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:19.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:19.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:19.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:19.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:19.952 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:19.952 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.952 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.952 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.953 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.953 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:19.953 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=111 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:24.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:24.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:24.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:24.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:24.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:24.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:24.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:24.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:24.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:24.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:24.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:24.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:24.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:24.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:24.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:24.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:24.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:24.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:24.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:24.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:24.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:24.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:24.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:24.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:24.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:24.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:24.976 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:24.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:24.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:24.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:24.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:24.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:24.981 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:24.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:24.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:24.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:25.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:25.498 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:25.500 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:25.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:25.501 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:25.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:25.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:25.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:25.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:25.511 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:25.511 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:25.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:25.512 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:30.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:30.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:30.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:30.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:30.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:30.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:30.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:30.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:30.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:30.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:30.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:30.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:30.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:30.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:30.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:30.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:30.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:30.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:30.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:30.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:30.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:30.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:30.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:30.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:30.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:30.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:30.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:30.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:30.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:30.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:30.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:30.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:30.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:30.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:30.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:30.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:30.533 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:30.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:30.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:30.538 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:31.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:31.050 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:31.051 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:31.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:31.052 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:31.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:31.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:31.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:31.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:31.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:31.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:31.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:31.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:31.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:31.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:31.063 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:31.063 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.063 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:31.064 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:36.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:36.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:36.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:36.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:36.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:36.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:36.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:36.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:36.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:36.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:36.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:36.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:36.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:36.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:36.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:36.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:36.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:36.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:36.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:36.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:36.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:36.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:36.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:36.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:36.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:36.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:36.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:36.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:36.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:36.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:36.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:36.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:36.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:36.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:36.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:36.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:36.079 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:36.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:36.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:36.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:36.599 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:36.601 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:36.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:36.603 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:36.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:36.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:36.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:36.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:36.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:36.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:36.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:36.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:36.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:36.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:36.626 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.627 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.628 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.628 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.628 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:36.628 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:41.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:41.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:41.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:41.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:41.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:41.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:41.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:41.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:41.630 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:41.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:41.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:41.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:41.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:41.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:41.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:41.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:41.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:41.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:41.633 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:41.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:41.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:41.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:41.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:41.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:41.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:41.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:41.638 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:41.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:41.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:41.643 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:42.151 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:42.152 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:42.153 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:42.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:02:42.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:42.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:42.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:02:43.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:02:43.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:43.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:43.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:43.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:44.046 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:02:44.526 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:02:44.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:44.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:44.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:44.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:45.006 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:02:45.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:45.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:45.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:45.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:02:45.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:02:45.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:02:45.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:02:45.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:02:45.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:02:45.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:45.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:45.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:45.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:45.966 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:02:46.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:02:46.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:46.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:46.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:46.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:46.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:02:47.408 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:02:47.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:47.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:47.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:47.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:47.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:47.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:47.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:47.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:47.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:47.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:47.546 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.548 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.548 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.548 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.548 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.548 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.549 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.549 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.549 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:47.549 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:52.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:52.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:52.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:52.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:52.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:52.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:52.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:52.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:52.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:52.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:52.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:52.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:52.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:52.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:52.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:52.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:52.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:52.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:52.555 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:52.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:52.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:52.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:52.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:52.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:52.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:52.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:52.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:52.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:52.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:52.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:52.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:52.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:52.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:52.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:52.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:52.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:52.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:52.561 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:52.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:52.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:53.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:53.076 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:53.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:53.077 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:53.078 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:53.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:53.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:53.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:53.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:53.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:53.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:53.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:53.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:53.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:53.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:53.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:53.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:53.135 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:53.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:58.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:58.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:58.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:58.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:58.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:58.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:58.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:58.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:58.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:58.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:02:58.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:02:58.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:02:58.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:02:58.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:58.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:58.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:58.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:02:58.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:02:58.163 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:02:58.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:02:58.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:02:58.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:58.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:58.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:58.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:02:58.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:02:58.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:02:58.173 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:02:58.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:02:58.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:58.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:02:58.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:58.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:02:58.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:02:58.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:02:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:02:58.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:02:58.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:02:58.181 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:02:58.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:02:58.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:02:58.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:02:58.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:02:58.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:02:58.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:02:58.701 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:02:58.702 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:02:58.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:58.703 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:02:58.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:02:58.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:02:58.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:02:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:02:58.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:02:58.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:02:58.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:02:58.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:02:58.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:02:58.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:02:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:02:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:02:58.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:02:58.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:02:58.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:02:58.766 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:02:58.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:03.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:03.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:03.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:03.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:03.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:03.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:03.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:03.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:03.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:03.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:03.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:03.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:03.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:03.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:03.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:03.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:03.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:03.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:03.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:03.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:03.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:03.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:03.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:03.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:03.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:03.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:03.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:03.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:03.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:03.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:03.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:03.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:03.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:03.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:03.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:03.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:03.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:03.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:03.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:03.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:03.808 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:03.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:03.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:03.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:03.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:04.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:04.324 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:04.324 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:04.325 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:04.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:04.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:04.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:04.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:04.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:04.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:04.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:04.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:04.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:04.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:04.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:04.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:04.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:04.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:04.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:04.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:04.397 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:04.397 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:09.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:09.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:09.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:09.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:09.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:09.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:09.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:09.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:09.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:09.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:09.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:09.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:09.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:09.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:09.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:09.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:09.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:09.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:09.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:09.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:09.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:09.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:09.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:09.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:09.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:09.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:09.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:09.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:09.424 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:09.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:09.424 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:09.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:09.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:09.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:09.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:09.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:09.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:09.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:09.429 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:09.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:09.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:09.942 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:09.943 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:09.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:09.944 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:09.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:09.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:09.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:09.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:09.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:10.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:10.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:10.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:10.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:10.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:10.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:10.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:10.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:10.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:10.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:10.041 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:10.041 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:15.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:15.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:15.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:15.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:15.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:15.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:15.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:15.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:15.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:15.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:15.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:15.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:15.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:15.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:15.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:15.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:15.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:15.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:15.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:15.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:15.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:15.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:15.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:15.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:15.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:15.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:15.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:15.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:15.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:15.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:15.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:15.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:15.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:15.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:15.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:15.063 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:15.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:15.064 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:15.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:15.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:15.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:15.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:15.577 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:15.578 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:15.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:15.579 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:15.579 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 04:03:15.579 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 200
2025-12-12 04:03:15.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 04:03:15.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:16.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:16.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:03:16.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:16.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:16.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:16.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:16.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:16.529 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:03:17.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:03:17.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:17.215 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 04:03:17.216 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 0
2025-12-12 04:03:17.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 04:03:17.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:17.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:17.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:17.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:17.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:17.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:17.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:17.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:17.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:17.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:17.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:17.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:17.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:17.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:17.226 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:17.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:22.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:22.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:22.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:22.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:22.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:22.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:22.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:22.238 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:22.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:22.238 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:22.242 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:22.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:22.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:22.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:22.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:22.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:22.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:22.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:22.244 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:22.244 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:22.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:22.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:22.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:22.245 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:22.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:22.245 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:22.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:22.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:22.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:22.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:22.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:22.247 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:22.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:22.247 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:22.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:22.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:22.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:22.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:22.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:22.250 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:22.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:22.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:22.255 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:22.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:22.764 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:22.764 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:22.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:22.766 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:22.767 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 04:03:22.767 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 200
2025-12-12 04:03:22.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 04:03:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:23.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:03:23.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:23.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:23.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:23.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:23.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:23.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:03:23.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:03:24.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.404 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 04:03:24.404 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 0
2025-12-12 04:03:24.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 04:03:24.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:24.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:24.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:24.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:24.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:24.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:24.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:24.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:24.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:24.413 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:29.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:29.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:29.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:29.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:29.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:29.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:29.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:29.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:29.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:29.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:29.444 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:29.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:29.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:29.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:29.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:29.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:29.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:29.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:29.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:29.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:29.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:29.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:29.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:29.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:29.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:29.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:29.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:29.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:29.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:29.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:29.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:29.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:29.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:29.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:29.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:29.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:29.456 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:29.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:29.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:29.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:29.969 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:29.969 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:29.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:29.970 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:29.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:29.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:29.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:30.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:30.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:30.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:30.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:30.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:30.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:30.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:30.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:30.043 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:30.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:30.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:30.044 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:30.048 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:35.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:35.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:35.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:35.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:35.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:35.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:35.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:35.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:35.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:35.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:35.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:35.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:35.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:35.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:35.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:35.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:35.064 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:35.066 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:35.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:35.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:35.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:35.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:35.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:35.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:35.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:35.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:35.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:35.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:35.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:35.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:35.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:35.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:35.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:35.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:35.079 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:35.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:35.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:35.085 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:35.595 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:35.597 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:35.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:35.597 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:35.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:35.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:35.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:35.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:35.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:35.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:35.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:35.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:35.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:35.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:35.660 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:03:35.660 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:35.661 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.661 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.661 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.661 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.661 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:35.662 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:03:40.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:03:40.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:03:40.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:40.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:40.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:40.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:40.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:03:40.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:40.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:40.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:03:40.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:03:40.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:03:40.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:03:40.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:40.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:40.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:03:40.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:03:40.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:03:40.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:03:40.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:03:40.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:03:40.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:40.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:40.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:03:40.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:03:40.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:03:40.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:03:40.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:03:40.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:03:40.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:40.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:03:40.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:03:40.688 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:03:40.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:03:40.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:03:40.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:03:40.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:03:40.692 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:03:40.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:03:40.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:03:40.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:03:40.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:03:41.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:03:41.208 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:03:41.208 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:03:41.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:41.209 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:03:41.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:41.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:41.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:41.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:41.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:41.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:41.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:41.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:41.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:41.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:41.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:41.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:41.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:41.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:41.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:41.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:41.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:41.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:41.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:41.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:41.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:41.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:41.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:41.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:03:41.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:41.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:41.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:41.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:42.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:03:42.644 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:03:42.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:42.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:42.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:42.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:43.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:03:43.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:03:43.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:43.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:43.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:43.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:44.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:03:44.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:44.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:44.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:44.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:44.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:44.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:44.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:44.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:44.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:44.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:44.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:44.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:44.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:44.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:44.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:44.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:44.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:44.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:44.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:44.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:44.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:44.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:44.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:44.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:44.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:44.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:44.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:03:44.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:44.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:03:45.563 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:03:45.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:03:45.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:03:45.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:03:45.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:03:46.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:03:46.533 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:03:47.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:03:47.507 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:03:47.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:47.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:47.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:47.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:47.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:47.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:47.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:47.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:47.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:47.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:47.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:47.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:47.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:47.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:47.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:47.993 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:03:48.480 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:03:48.968 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:03:49.453 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:03:49.940 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:03:50.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:03:50.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:50.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:50.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:50.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:50.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:50.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:50.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:50.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:50.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:50.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:50.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:50.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:50.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:50.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:50.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:50.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:50.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:50.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:50.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:50.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:50.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:50.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:50.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:50.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:50.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:50.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:50.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:03:51.398 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:03:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:03:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:52.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:52.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:52.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:52.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:52.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:52.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:52.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:52.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:52.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:52.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:52.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:52.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:52.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:52.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:52.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:52.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:52.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:52.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:52.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:52.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:52.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:52.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:52.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:52.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:52.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:52.371 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:03:52.858 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:03:53.345 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:03:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:03:54.319 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:03:54.806 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:03:55.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:55.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:55.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:55.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:55.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:55.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:55.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:55.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:55.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:55.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:55.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:55.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:55.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:55.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.292 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:03:55.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:55.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:55.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:55.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:55.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:55.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:55.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:55.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:55.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:55.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:55.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:55.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:55.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:55.778 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:03:56.264 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:03:56.751 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:03:57.238 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:03:57.725 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:03:58.213 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:03:58.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:58.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:58.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:58.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:58.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:03:58.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:03:58.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:03:58.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:58.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:58.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:58.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:03:58.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:03:58.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:03:58.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:03:58.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:03:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:58.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:03:58.698 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:03:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:03:59.671 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:04:00.157 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:04:00.644 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:04:01.130 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:04:01.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:01.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:01.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:01.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:01.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:01.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:01.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:01.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:01.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:01.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:01.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:01.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:01.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:01.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.616 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:04:01.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:01.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:01.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:01.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:01.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:01.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:01.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:01.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:01.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:01.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:01.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:01.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:01.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:01.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:01.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:04:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:04:02.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:02.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:02.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:02.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:02.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:02.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:02.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:02.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:02.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:02.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:02.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:02.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:02.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:02.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:02.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:02.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:03.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:03.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:03.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:03.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:03.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:03.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:03.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:03.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:03.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:03.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:03.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:03.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:03.073 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:04:03.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:03.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:03.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:03.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:03.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:04:04.044 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:04:04.529 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:04:05.014 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:04:05.498 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:04:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:04:06.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:06.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:06.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:06.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:06.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:06.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:06.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:06.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:06.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:06.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:06.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:06.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:06.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:06.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:06.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:06.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:06.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:06.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:06.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:06.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:06.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:06.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:06.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:06.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:06.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:06.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:06.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:06.469 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:04:06.956 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:04:07.442 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:04:07.926 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:04:08.411 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:04:08.895 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:04:09.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:09.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:09.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:09.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:09.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:09.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:09.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:09.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:09.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:09.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:09.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:09.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:09.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:09.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:09.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:09.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:09.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:09.382 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:04:09.866 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:04:10.353 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:04:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:04:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:04:11.809 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:04:12.294 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:04:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:12.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:12.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:12.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:12.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:12.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:12.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:12.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:12.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:12.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:12.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:12.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:12.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:12.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:12.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:12.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:12.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:12.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:12.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:12.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:12.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:12.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:12.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:12.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:12.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:12.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:12.779 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:04:13.263 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:04:13.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:13.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:13.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:13.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:13.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:13.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:13.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:13.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:13.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:13.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:13.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:13.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:13.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:13.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:13.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:13.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:13.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:13.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:13.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:13.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:13.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:13.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:13.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:13.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:13.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:13.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:13.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:13.749 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:04:14.234 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:04:14.720 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:04:15.206 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:04:15.692 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:04:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:04:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:16.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:16.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:16.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:16.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:16.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:16.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:16.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:16.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:16.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:16.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:16.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:16.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:16.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:16.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:16.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:16.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:16.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:16.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:16.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:16.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:16.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:16.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:16.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:16.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:04:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:04:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:04:18.117 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:04:18.604 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:04:19.091 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:04:19.577 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:04:19.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:19.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:19.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:19.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:19.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:19.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:19.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:19.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:19.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:19.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:19.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:19.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:19.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:19.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:19.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:19.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:19.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:20.061 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:04:20.548 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:04:21.033 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:04:21.519 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:04:22.005 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:04:22.491 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:04:22.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:22.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:22.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:22.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:22.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:22.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:22.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:22.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:22.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:22.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:22.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:22.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:22.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:22.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:22.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:22.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:22.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:22.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:22.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:22.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:22.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:22.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:22.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:22.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:22.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:22.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:22.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:22.975 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:04:23.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:23.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:23.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:23.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:23.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:23.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:23.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:23.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:23.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:23.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:23.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:23.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:23.447 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8977 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:23.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8977 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:23.447 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8978 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:28.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:28.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:28.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:28.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:28.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:28.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:28.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:28.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:28.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:28.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:28.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:04:28.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:04:28.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:04:28.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:28.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:28.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:28.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:04:28.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:28.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:04:28.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:04:28.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:04:28.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:28.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:28.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:28.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:04:28.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:28.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:04:28.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:04:28.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:04:28.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:28.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:28.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:28.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:04:28.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:28.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:04:28.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:04:28.480 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:04:28.480 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:28.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:04:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:04:28.997 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:04:28.998 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:04:28.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:28.998 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:04:29.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:29.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:29.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:29.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:29.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:29.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:29.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:29.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:29.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:29.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:29.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:29.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:29.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:29.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.451 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:04:29.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:29.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:29.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:29.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:29.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:29.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:29.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:29.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:29.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:29.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:29.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:29.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:29.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:29.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:29.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:29.552 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:04:34.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:34.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:34.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:34.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:34.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:34.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:34.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:34.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:34.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:34.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:34.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:04:34.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:04:34.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:04:34.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:34.579 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:34.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:34.581 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:04:34.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:34.581 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:04:34.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:04:34.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:04:34.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:34.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:34.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:34.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:04:34.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:34.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:04:34.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:04:34.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:04:34.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:34.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:34.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:34.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:04:34.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:34.593 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:04:34.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:04:34.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:04:34.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:04:34.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:04:34.598 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:04:34.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:04:34.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:34.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:34.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:04:35.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:04:35.115 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:04:35.116 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:04:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:35.117 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:04:35.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:35.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:35.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:35.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:35.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:35.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:35.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:35.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:35.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:35.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:35.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.565 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:04:35.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:35.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:35.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:35.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:35.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:35.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:35.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:35.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:35.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:35.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:35.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:35.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:35.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:35.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:35.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:35.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:35.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.044 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:04:36.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:36.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:36.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:36.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:36.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:36.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:36.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:36.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:36.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:36.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:36.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:36.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:36.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:36.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:36.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:36.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:36.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:36.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:36.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:36.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:36.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:36.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:36.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:36.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:36.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:36.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:36.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.521 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:04:36.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:36.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:36.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:36.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:36.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:36.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:36.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:36.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:36.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:36.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:36.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:36.924 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:04:36.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:36.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:36.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:36.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:36.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:36.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:41.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:41.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:41.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:41.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:41.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:41.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:41.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:41.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:41.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:04:41.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:04:41.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:04:41.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:41.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:41.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:41.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:04:41.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:41.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:04:41.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:04:41.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:04:41.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:41.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:41.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:41.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:04:41.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:41.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:04:41.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:04:41.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:04:41.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:41.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:41.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:41.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:04:41.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:41.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:04:41.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:04:41.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:04:41.956 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:04:41.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:41.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:41.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:41.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:04:42.445 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:04:42.471 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:04:42.471 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:04:42.472 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:04:42.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:42.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:42.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:42.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:42.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:42.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:42.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:42.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:42.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:42.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:42.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:42.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:42.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:42.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:42.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:42.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:42.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:42.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:42.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:42.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:42.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:42.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:42.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:42.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:42.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:42.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:04:42.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:42.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:42.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:42.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:43.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:43.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:43.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:43.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:43.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:43.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:43.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:43.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:43.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:43.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:43.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:43.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:43.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:43.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:43.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:43.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:43.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:43.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:43.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:43.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:43.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:43.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:43.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:04:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:43.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:43.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:43.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:43.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:43.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:43.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:43.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:43.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:43.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:43.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:43.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:43.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:43.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:43.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:43.803 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:04:43.803 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:43.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:43.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:43.803 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:43.803 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:43.803 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:43.804 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:43.804 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:04:48.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:48.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:48.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:48.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:48.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:48.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:48.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:48.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:48.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:48.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:48.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:04:48.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:04:48.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:04:48.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:48.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:48.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:48.824 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:04:48.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:48.824 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:04:48.825 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:04:48.825 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:04:48.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:48.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:48.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:48.826 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:04:48.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:48.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:48.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:04:48.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:48.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:04:48.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:04:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:04:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:04:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:04:48.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:04:48.832 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:04:48.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:48.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:48.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:04:49.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:04:49.353 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:04:49.355 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:04:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.356 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:04:49.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:49.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:49.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:49.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:49.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:49.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:49.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:49.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:49.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:49.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:49.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:49.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:49.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:04:49.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:49.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:49.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:49.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:49.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:49.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:49.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:49.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:49.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:49.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:49.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:49.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:49.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:49.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:49.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:49.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:50.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:50.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:50.279 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:04:50.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:50.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:50.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:50.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:50.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:50.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:50.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:50.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:50.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:50.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:50.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:50.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:50.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:50.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:50.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:50.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:50.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:50.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:50.680 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:04:50.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:55.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:04:55.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:04:55.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:55.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:55.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:55.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:55.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:04:55.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:55.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:55.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:04:55.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:04:55.695 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:04:55.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:04:55.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:55.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:55.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:04:55.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:04:55.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:04:55.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:04:55.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:04:55.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:04:55.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:55.697 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:55.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:04:55.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:04:55.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:04:55.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:04:55.699 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:04:55.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:04:55.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:55.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:04:55.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:04:55.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:04:55.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:04:55.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:04:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:04:55.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:04:55.703 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:04:55.703 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:04:55.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:04:55.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:04:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:04:56.217 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:04:56.218 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:04:56.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:56.219 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:04:56.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:56.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:56.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:56.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:56.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:56.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:56.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:56.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:56.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:56.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:56.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:56.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:56.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:04:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:56.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:56.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:57.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:04:57.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:04:57.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:57.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:58.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:04:58.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:58.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:58.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:58.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:58.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:04:58.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:04:58.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:04:58.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:58.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:58.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:58.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:04:58.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:04:58.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:04:58.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:04:58.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:04:58.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:58.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:04:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:04:58.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:58.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:58.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:58.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:59.026 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:04:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:04:59.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:04:59.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:04:59.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:04:59.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:04:59.967 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:05:00.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:00.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:00.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:00.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:00.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:00.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:00.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:00.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:00.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:00.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:00.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:00.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:00.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:00.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:00.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:00.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:00.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:00.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:00.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:00.909 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:05:01.386 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:05:01.865 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:05:01.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:01.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:01.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:01.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:01.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:01.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:01.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:01.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:01.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:01.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:01.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:01.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:01.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:01.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:01.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:01.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:01.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:02.334 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:05:02.805 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:05:03.275 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:05:03.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:03.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:03.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:03.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:03.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:05:03.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:03.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:03.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:03.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:03.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:03.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:03.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:03.756 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:05:03.756 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.756 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.757 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.757 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.757 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.757 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:03.757 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:08.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:08.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:08.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:08.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:08.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:08.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:08.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:08.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:08.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:08.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:08.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:05:08.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:05:08.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:05:08.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:08.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:08.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:08.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:05:08.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:08.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:05:08.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:05:08.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:05:08.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:08.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:08.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:08.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:05:08.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:08.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:05:08.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:05:08.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:05:08.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:08.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:08.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:08.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:05:08.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:08.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:05:08.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:05:08.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:05:08.795 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:05:08.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:08.800 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:05:09.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:05:09.317 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:05:09.319 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:05:09.320 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:05:09.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:09.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:09.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:09.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:09.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:09.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:09.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:09.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:09.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:09.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:09.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:09.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:09.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:09.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:09.760 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:05:09.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:09.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:09.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:09.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:05:10.717 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:05:10.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:10.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:10.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:10.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:11.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:05:11.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:11.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:11.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:11.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:11.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:11.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:11.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:11.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:11.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:11.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:11.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:11.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:11.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:11.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:11.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:11.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:11.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:11.671 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:05:11.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:11.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:11.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:11.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:12.149 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:05:12.623 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:05:12.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:12.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:12.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:12.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:13.093 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:05:13.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:13.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:13.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:13.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:13.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:13.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:13.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:13.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:13.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:13.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:13.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:13.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:13.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:13.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:13.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:13.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:13.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:05:13.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:13.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:13.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:13.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:14.039 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:05:14.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:05:14.988 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:05:15.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:15.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:15.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:15.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:15.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:15.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:15.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:15.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:15.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:15.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:15.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:15.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:15.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:15.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:15.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:15.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:05:15.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:05:16.417 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:05:16.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:16.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:16.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:16.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:16.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:16.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:16.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:16.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:16.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:16.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:16.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:16.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:16.893 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:05:16.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:16.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:21.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:21.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:21.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:21.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:21.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:21.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:21.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:21.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:21.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:21.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:21.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:05:21.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:05:21.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:05:21.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:21.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:21.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:21.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:05:21.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:21.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:05:21.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:05:21.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:05:21.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:21.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:21.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:21.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:05:21.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:21.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:05:21.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:05:21.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:05:21.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:21.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:21.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:21.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:05:21.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:21.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:05:21.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:05:21.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.931 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:05:21.931 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:05:21.931 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:05:21.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:21.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:21.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:05:22.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:05:22.448 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:05:22.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:22.451 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:05:22.453 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:05:22.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:22.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:22.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:22.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:22.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:22.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:22.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:22.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:22.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:22.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:22.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:22.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:22.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:22.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:22.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:22.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:22.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:22.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:22.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:22.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:22.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:22.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:22.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:05:22.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:22.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:22.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:22.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:05:23.857 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:05:23.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:23.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:23.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:23.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:24.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:05:24.801 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:05:24.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:24.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:24.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:24.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:24.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:24.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:24.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:24.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:24.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:24.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:24.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:24.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:24.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:24.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:24.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:24.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:24.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:24.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:24.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:24.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:24.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:25.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:25.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:25.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:25.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:25.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:25.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:25.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:25.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:25.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:25.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:25.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:25.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:25.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:25.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:25.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:25.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:25.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:25.277 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:05:25.757 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:05:25.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:26.236 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:05:26.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:05:26.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:27.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:05:27.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:27.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:27.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:27.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:27.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:27.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:27.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:27.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:27.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:27.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:27.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:27.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:27.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:27.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:27.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:27.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:27.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:27.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:27.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:27.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:27.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:27.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:27.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:27.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:27.661 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:05:27.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:27.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:27.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:27.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:28.136 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:05:28.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:05:29.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:05:29.567 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:05:29.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:29.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:29.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:29.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:29.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:29.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:29.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:29.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:29.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:29.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:29.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:29.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:29.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:29.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:29.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:29.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:29.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:30.047 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:05:30.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:30.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:30.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:30.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:30.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:30.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:30.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:30.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:30.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:30.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:30.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:30.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:30.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:30.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:30.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:30.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:30.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:30.525 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:05:31.004 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:05:31.473 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:05:31.950 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:05:32.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:32.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:32.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:32.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:32.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:32.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:32.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:32.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:32.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:32.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:32.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:32.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:32.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:32.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:32.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:32.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:32.428 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:05:32.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:32.905 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:05:33.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:33.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:33.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:33.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:33.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:33.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:33.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:33.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:33.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:33.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:33.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:33.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:33.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:33.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:33.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:33.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:33.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:33.376 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:05:33.856 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:05:34.336 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:05:34.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:34.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:34.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:34.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:34.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:34.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:34.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:34.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:34.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:34.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:34.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:34.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:34.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:34.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:34.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:34.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:34.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:34.815 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:05:35.294 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:05:35.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:35.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:35.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:35.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:35.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:35.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:35.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:35.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:35.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:35.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:35.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:35.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:35.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:35.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:35.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:35.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:35.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:05:36.241 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:05:36.720 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:05:37.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:37.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:37.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:37.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:37.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:37.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:37.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:37.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:37.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:37.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:37.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:37.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:37.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:37.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.199 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:05:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:05:37.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:37.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:37.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:37.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:37.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:37.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:37.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:37.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:37.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:37.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:37.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:37.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:37.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:37.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:38.158 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:05:38.635 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:05:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:05:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:39.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:39.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:39.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:39.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:39.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:39.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:39.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:39.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:39.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:39.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:39.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:39.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:39.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:39.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:39.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:39.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:39.593 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:05:40.074 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:05:40.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:40.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:40.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:40.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:40.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:40.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:40.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:40.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:40.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:40.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:40.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:40.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:40.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:40.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:40.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:40.552 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:05:41.032 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:05:41.509 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:05:41.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:41.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:41.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:41.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:41.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:41.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:41.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:41.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:41.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:41.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:41.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:41.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:41.920 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:05:41.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:46.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:46.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:46.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:46.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:46.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:46.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:46.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:46.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:46.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:46.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:46.939 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:05:46.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:05:46.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:05:46.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:46.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:46.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:46.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:05:46.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:46.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:05:46.952 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:05:46.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:05:46.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:46.953 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:46.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:46.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:05:46.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:46.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:05:46.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:05:46.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:05:46.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:46.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:46.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:46.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:05:46.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:46.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:05:46.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:05:46.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:05:46.967 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:05:46.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:05:46.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:46.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:46.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:46.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:05:47.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:05:47.489 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:05:47.491 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:05:47.493 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:05:47.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:47.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:47.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:47.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:47.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:47.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:47.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:47.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:47.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:47.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:47.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:47.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:47.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:47.926 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:05:47.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:47.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:47.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:47.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:47.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:47.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:47.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:47.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:48.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:48.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:48.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:48.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:48.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:48.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:48.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:05:48.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:48.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:48.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:48.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:48.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:48.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:48.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:48.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:48.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:05:48.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:48.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:48.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:48.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:48.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:48.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:48.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:48.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:48.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:48.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:48.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:48.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:48.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:48.984 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:05:48.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:48.985 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:48.985 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:48.985 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:48.985 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:48.985 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:53.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:53.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:53.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:53.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:53.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:53.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:53.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:53.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:53.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:53.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:05:53.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:05:53.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:05:53.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:05:53.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:53.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:53.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:53.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:05:53.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:05:53.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:05:53.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:05:53.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:05:53.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:53.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:53.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:54.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:05:54.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:05:54.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:05:54.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:05:54.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:05:54.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:54.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:05:54.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:54.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:05:54.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:05:54.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:05:54.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:05:54.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:05:54.005 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:05:54.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:05:54.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:05:54.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:05:54.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:05:54.518 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:05:54.518 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:05:54.519 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:05:54.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:54.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:54.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:54.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:54.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:54.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:54.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:54.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:54.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:54.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:54.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:54.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:54.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:05:54.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:54.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:54.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:54.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:54.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:54.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:54.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:54.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:54.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:54.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:54.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:54.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:55.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:55.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:55.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:55.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:55.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:55.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:55.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:55.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.446 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:05:55.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:55.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:55.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:55.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:55.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:55.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:55.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:55.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:55.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:55.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:55.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:55.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:55.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:55.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:05:56.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:56.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:56.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:56.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:56.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:56.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:56.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:56.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:05:56.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:56.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:56.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:56.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:56.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:56.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:56.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:56.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:56.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:56.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:56.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:56.862 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:05:56.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:57.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:57.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:57.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:57.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:57.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:57.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:57.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:57.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:57.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:57.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:57.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:57.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:57.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:57.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:57.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:57.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:57.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.335 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:05:57.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:57.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:57.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:57.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:57.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:57.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:05:57.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:57.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:57.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:05:57.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:05:57.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:57.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:05:57.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:05:57.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:57.809 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:05:58.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:58.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:58.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:58.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:05:58.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:05:58.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:05:58.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:05:58.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:05:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:05:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:05:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:05:58.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:05:58.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:05:58.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:05:58.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:05:58.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:05:58.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:05:58.212 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:05:58.213 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=906 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:03.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:03.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:03.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:03.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:03.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:03.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:03.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:03.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:03.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:03.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:03.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:03.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:03.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:03.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:03.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:03.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:03.229 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:03.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:03.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:03.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:03.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:03.230 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:03.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:03.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:03.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:03.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:03.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:03.235 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:03.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:03.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:03.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:03.753 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:03.754 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:03.755 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:03.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:03.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:03.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:03.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:03.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:03.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:03.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:03.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:03.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:03.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:03.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:03.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:03.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:03.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:03.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:03.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:03.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:03.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:03.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:03.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:03.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:03.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:03.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:03.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:03.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:03.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:03.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:03.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:03.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:03.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:03.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:03.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:03.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:03.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:04.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:04.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:04.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:04.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:04.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:04.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:04.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:04.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:04.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:04.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:04.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:04.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:04.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:04.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:04.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:04.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:04.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:04.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:04.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:04.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:04.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:04.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:05.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:05.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:05.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:05.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:05.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:05.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:05.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:05.071 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:05.072 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:10.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:10.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:10.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:10.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:10.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:10.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:10.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:10.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:10.093 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:10.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:10.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:10.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:10.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:10.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:10.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:10.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:10.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:10.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:10.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:10.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:10.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:10.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:10.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:10.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:10.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:10.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:10.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:10.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:10.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:10.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:10.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:10.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:10.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:10.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:10.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:10.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:10.119 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:10.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:10.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:10.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:10.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:10.124 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:10.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:10.640 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:10.641 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:10.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:10.643 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:10.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:10.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:10.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:10.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:10.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:10.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:10.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:10.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:10.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:10.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:10.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:10.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:10.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:11.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:11.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:11.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:11.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:11.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:11.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:11.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:11.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:11.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:11.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:11.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:11.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:11.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:11.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:11.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:11.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:11.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:11.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:11.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:11.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:11.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:12.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:06:12.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:12.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:12.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:12.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:06:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:12.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:12.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:12.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:12.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:12.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:12.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:12.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:12.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:12.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:12.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:12.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:12.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:12.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:12.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:12.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:12.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:12.977 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:06:13.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:13.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:13.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:13.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:13.450 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:06:13.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:13.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:13.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:13.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:13.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:13.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:13.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:13.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:13.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:13.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:13.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:13.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:13.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:13.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:13.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:13.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:13.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:13.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:06:14.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:14.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:14.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:14.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:14.399 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:06:14.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:14.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:14.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:14.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:14.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:14.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:14.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:14.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:14.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:14.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:14.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:14.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:14.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:14.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:14.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:14.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:14.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:14.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:06:15.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:15.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:15.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:15.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:15.357 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:06:15.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:15.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:15.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:15.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:15.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:15.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:15.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:15.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:15.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:15.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:15.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:15.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:15.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:15.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:15.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:15.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:15.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:15.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:06:16.317 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:06:16.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:16.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:16.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:16.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:16.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:16.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:16.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:16.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:16.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:16.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:16.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:16.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:16.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:16.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:16.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:16.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:16.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:16.796 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:06:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:17.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:17.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:17.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:17.270 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:06:17.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:17.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:17.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:17.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:17.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:17.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:17.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:17.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:17.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:17.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:17.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:17.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:17.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:17.740 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:06:18.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:18.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:18.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:18.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:18.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:06:18.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:18.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:18.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:18.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:18.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:18.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:18.223 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:18.223 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.225 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.225 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.225 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:18.225 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:23.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:23.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:23.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:23.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:23.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:23.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:23.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:23.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:23.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:23.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:23.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:23.239 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:23.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:23.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:23.241 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:23.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:23.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:23.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:23.242 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:23.243 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:23.244 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:23.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:23.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:23.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:23.245 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:23.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:23.245 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:23.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:23.247 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:23.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:23.247 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:23.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:23.247 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:23.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:23.247 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:23.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:23.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:23.252 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:23.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:23.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:23.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:23.772 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:23.774 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:23.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:23.776 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:23.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:23.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:23.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:23.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:23.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:23.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:23.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:23.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:23.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:23.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:23.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:23.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:23.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:23.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:23.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:23.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:23.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:23.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:23.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:23.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:23.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:23.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:23.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:23.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:24.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:24.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:24.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:24.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:24.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:24.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:24.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:24.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:24.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:24.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:24.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:24.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:24.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:24.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.211 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:24.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:24.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:24.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:24.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:24.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:24.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:24.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:24.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:24.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:24.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:24.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:24.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:24.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:24.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:24.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:24.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.683 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:24.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:24.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:24.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:24.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:24.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:24.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:24.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:24.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:24.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:24.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:24.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:24.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:24.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:24.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:24.849 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:29.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:29.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:29.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:29.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:29.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:29.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:29.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:29.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:29.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:29.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:29.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:29.864 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:29.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:29.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:29.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:29.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:29.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:29.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:29.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:29.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:29.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:29.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:29.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:29.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:29.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:29.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:29.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:29.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:29.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:29.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:29.871 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:29.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:29.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:30.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:30.386 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:30.386 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:30.387 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:30.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:30.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:30.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:30.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:30.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:30.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:30.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:30.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:30.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:30.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:30.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:30.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:30.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:30.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:30.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:30.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:30.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:30.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:30.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:30.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:30.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:30.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:30.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:30.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:30.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:30.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:30.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:30.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:31.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:31.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:31.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:31.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:31.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:31.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:31.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:31.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:31.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:31.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:31.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:31.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:31.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:31.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:31.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:31.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:31.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:31.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:31.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:31.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:31.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:31.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:31.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:31.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:31.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:31.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:31.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:31.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:31.465 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:31.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:36.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:36.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:36.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:36.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:36.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:36.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:36.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:36.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:36.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:36.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:36.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:36.483 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:36.483 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:36.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:36.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:36.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:36.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:36.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:36.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:36.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:36.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:36.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:36.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:36.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:36.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:36.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:36.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:36.489 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:36.489 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:36.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:36.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:36.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:36.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:36.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:36.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:36.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:36.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:36.494 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:36.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:36.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:36.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:37.012 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:37.012 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:37.013 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:37.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:37.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:37.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:37.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:37.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:37.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:37.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:37.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:37.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:37.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:37.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:37.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:37.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:37.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:37.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:37.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:37.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:37.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:37.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:37.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:38.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:38.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:38.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:38.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:38.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:38.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:38.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:38.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:38.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:38.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:38.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:38.119 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:38.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:38.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.119 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.120 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.120 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.120 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:38.120 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:43.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:43.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:43.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:43.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:43.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:43.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:43.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:43.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:43.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:43.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:43.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:43.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:43.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:43.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:43.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:43.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:43.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:43.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:43.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:43.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:43.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:43.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:43.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:43.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:43.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:43.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:43.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:43.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:43.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:43.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:43.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:43.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:43.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:43.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:43.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:43.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:43.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:43.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:43.163 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:43.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:43.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:43.163 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:43.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:43.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:43.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:43.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:43.685 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:43.687 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:43.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:43.689 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:43.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:43.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:43.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:43.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:43.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:43.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:43.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:43.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:43.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:43.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:43.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:43.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:43.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:43.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:43.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:43.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:43.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:43.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:43.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:43.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:43.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:43.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:43.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:43.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:43.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:44.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:44.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:44.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:44.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:44.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:44.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:44.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:44.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:44.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:44.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:44.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.134 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:44.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:44.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:44.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:44.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:44.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:44.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:44.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:44.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:44.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:44.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:44.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:44.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:44.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:44.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:44.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:44.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:44.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:44.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:44.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:44.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:44.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:44.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:44.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:44.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:44.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:44.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:44.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:44.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:44.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:44.786 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:44.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.787 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.788 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.789 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:44.790 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:06:49.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:49.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:49.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:49.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:49.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:49.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:49.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:49.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:49.797 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:49.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:49.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:49.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:49.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:49.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:49.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:49.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:49.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:49.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:49.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:49.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:49.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:49.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:49.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:49.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:49.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:49.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:49.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:49.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:49.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:49.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:49.817 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:49.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:49.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:50.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:50.330 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:50.331 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:50.331 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:50.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:50.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:50.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:50.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:50.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:50.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:50.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:50.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:50.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:50.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:50.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:50.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:50.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:50.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:50.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:50.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:50.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:50.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:50.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:50.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:50.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:50.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:50.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:50.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:50.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:50.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:50.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:50.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:50.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:51.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:51.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:51.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:51.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:51.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:51.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:51.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:51.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:51.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:51.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:51.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:51.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:51.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:51.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:51.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:51.274 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:06:51.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:06:51.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:51.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:51.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:51.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:52.231 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:06:52.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:52.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:52.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:52.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:52.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:52.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:52.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:52.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:52.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:52.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:52.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:52.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:52.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:52.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:52.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:52.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:52.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:52.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:06:52.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:52.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:52.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:52.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:53.193 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:06:53.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:53.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:53.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:53.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:53.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:53.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:53.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:06:53.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:53.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:53.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:53.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:53.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:53.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:53.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:53.520 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:06:58.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:06:58.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:06:58.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:58.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:58.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:58.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:58.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:06:58.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:58.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:58.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:06:58.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:06:58.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:06:58.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:06:58.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:58.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:58.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:06:58.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:06:58.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:06:58.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:58.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:06:58.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:06:58.544 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:06:58.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:06:58.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:06:58.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:58.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:06:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:06:58.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:06:58.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:06:58.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:06:58.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:06:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:06:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:06:58.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:06:58.550 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:06:58.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:06:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:06:58.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:06:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:06:59.038 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:06:59.067 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:06:59.068 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:06:59.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:59.069 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:06:59.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:59.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:59.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:59.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:59.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:59.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:59.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:59.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:59.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:59.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:59.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:59.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:59.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:06:59.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:06:59.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:06:59.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:59.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:59.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:06:59.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:06:59.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:06:59.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:06:59.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:06:59.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:06:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:06:59.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:06:59.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:06:59.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:06:59.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:00.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:00.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:07:00.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:00.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:00.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:00.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:00.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:00.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:00.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:00.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:00.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:00.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:00.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:00.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:00.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:00.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:00.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:00.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:00.491 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:07:00.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:00.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:00.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:00.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:07:01.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:01.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:01.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:01.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:01.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:01.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:01.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:01.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:01.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:01.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:01.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:01.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:01.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:01.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:01.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:01.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:01.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:01.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:07:01.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:01.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:01.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:01.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:01.945 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:07:02.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:02.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:02.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:02.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:02.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:02.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:02.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:02.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:02.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:02.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:02.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:02.279 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.279 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:02.280 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:07.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:07.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:07.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:07.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:07.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:07.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:07.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:07.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:07.295 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:07.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:07.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:07.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:07.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:07.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:07.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:07.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:07.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:07.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:07.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:07.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:07.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:07.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:07.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:07.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:07.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:07.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:07.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:07.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:07.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:07.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:07.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:07.307 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:07.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:07.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:07.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:07.823 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:07.824 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:07.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:07.826 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:07.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:07.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:07.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:07.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:07.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:07.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:07.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:07.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:07.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:07.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:07.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:07.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:07.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:08.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:08.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:08.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:08.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:08.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:08.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:08.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:08.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:08.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:08.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:08.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:08.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.279 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:07:08.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:08.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:08.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:08.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:08.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:08.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:07:08.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:08.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:08.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:08.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:08.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:08.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:08.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:08.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:08.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:08.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:08.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:08.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:08.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:08.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:09.248 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:07:09.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:09.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:09.733 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:07:09.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:09.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:09.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:09.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:09.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:09.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:09.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:09.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:09.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:09.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:09.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:09.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:09.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:09.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:09.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:09.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:09.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:10.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:07:10.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:10.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:10.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:10.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:10.704 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:07:11.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:11.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:11.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:11.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:11.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:11.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:11.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:11.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:11.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:11.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:11.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:11.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:11.044 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:11.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:11.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:11.045 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.047 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:11.048 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:16.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:16.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:16.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:16.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:16.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:16.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:16.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:16.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:16.060 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:16.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:16.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:16.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:16.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:16.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:16.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:16.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:16.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:16.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:16.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:16.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:16.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:16.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:16.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:16.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:16.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:16.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:16.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:16.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:16.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:16.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:16.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:16.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:16.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:16.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:16.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:16.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:16.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:16.082 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:16.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:16.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:16.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:16.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:16.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:16.607 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:16.608 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:16.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:16.611 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:16.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:16.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:16.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:16.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:16.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:16.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:16.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:16.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:16.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:16.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:16.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:16.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:16.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:16.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:16.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:17.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:17.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:17.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:17.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:17.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:17.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:17.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:17.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:17.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:17.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:17.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:07:17.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:17.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:17.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:17.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:17.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:07:17.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:17.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:17.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:17.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:17.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:17.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:17.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:17.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:17.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:17.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:17.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:17.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:17.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:17.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:17.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:18.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:07:18.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:18.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:18.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:18.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:18.510 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:07:18.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:18.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:18.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:18.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:18.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:18.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:18.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:18.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:18.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:18.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:18.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:18.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:18.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:18.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:18.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:18.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:18.994 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:07:19.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:19.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:19.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:19.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:19.477 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:07:19.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:19.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:19.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:19.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:19.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:19.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:19.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:19.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:19.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:19.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:19.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:19.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:19.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:19.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:19.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:19.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:24.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:24.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:24.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:24.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:24.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:24.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:24.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:24.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:24.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:24.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:24.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:24.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:24.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:24.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:24.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:24.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:24.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:24.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:24.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:24.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:24.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:24.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:24.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:24.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:24.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:24.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:24.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:24.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:24.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:24.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:24.849 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:24.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:24.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:24.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:24.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:24.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:24.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:24.855 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:24.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:24.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:24.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:25.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:25.382 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:25.384 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:25.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:25.386 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:25.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:25.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:25.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:25.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:25.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:25.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:25.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:25.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:25.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:25.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:25.436 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:25.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:25.437 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:30.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:30.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:30.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:30.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:30.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:30.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:30.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:30.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:30.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:30.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:30.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:30.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:30.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:30.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:30.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:30.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:30.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:30.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:30.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:30.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:30.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:30.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:30.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:30.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:30.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:30.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:30.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:30.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:30.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:30.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:30.476 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:30.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:30.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:30.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:30.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:30.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:30.482 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:30.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:30.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:30.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:31.004 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:31.006 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:31.008 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:31.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:31.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:31.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:31.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:31.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:31.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:31.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:31.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:31.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:31.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:31.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:31.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:31.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:31.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:31.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:31.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:31.109 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:36.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:36.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:36.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:36.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:36.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:36.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:36.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:36.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:36.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:36.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:36.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:36.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:36.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:36.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:36.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:36.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:36.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:36.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:36.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:36.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:36.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:36.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:36.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:36.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:36.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:36.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:36.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:36.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:36.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:36.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:36.138 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:36.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:36.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:36.143 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:36.625 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:36.665 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:36.669 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:36.672 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:36.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:36.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:36.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:36.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:36.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:36.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:36.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:36.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:36.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:36.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:36.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:36.719 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:36.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:36.720 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:41.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:41.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:41.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:41.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:41.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:41.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:41.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:41.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:41.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:41.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:41.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:41.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:41.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:41.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:41.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:41.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:41.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:41.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:41.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:41.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:41.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:41.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:41.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:41.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:41.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:41.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:41.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:41.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:41.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:41.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:41.748 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:41.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:41.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:41.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:41.751 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:46.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:07:46.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:07:46.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:46.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:46.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:46.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:46.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:07:46.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:46.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:46.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:07:46.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:07:46.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:07:46.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:07:46.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:46.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:46.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:07:46.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:07:46.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:07:46.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:07:46.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:07:46.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:07:46.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:46.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:46.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:07:46.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:07:46.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:07:46.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:07:46.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:07:46.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:07:46.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:46.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:07:46.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:07:46.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:07:46.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:07:46.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:07:46.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:07:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:07:46.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:07:46.793 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:07:46.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:07:46.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:07:46.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:07:47.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:07:47.316 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:07:47.317 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:07:47.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:47.319 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:07:47.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:47.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:47.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:47.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:47.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:47.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:47.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:47.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:47.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:47.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:47.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:47.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:47.751 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:07:47.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:47.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:47.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:47.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:48.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:07:48.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:48.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:48.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:48.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:48.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:48.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:48.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:48.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:48.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:48.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:48.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:48.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:48.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:48.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:48.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:48.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:07:48.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:48.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:48.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:48.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:49.165 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:07:49.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:49.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:49.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:49.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:49.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:49.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:49.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:49.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:49.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:49.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:49.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:49.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:49.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:49.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:49.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:49.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:49.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:07:49.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:49.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:49.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:49.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:07:50.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:50.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:50.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:50.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:50.264 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=750 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:50.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:50.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:50.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:50.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:50.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:50.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:50.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:50.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:50.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:50.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:50.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:50.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:07:50.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:50.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:50.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:50.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:51.059 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:07:51.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:51.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:51.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:51.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:51.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:51.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:51.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:51.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:51.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:51.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:51.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:51.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:51.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:51.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.528 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:07:51.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:07:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:07:51.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:07:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:07:51.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:51.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:51.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:51.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:51.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:51.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:51.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:51.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:51.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:51.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:51.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:51.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:51.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:51.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:51.998 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:07:52.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:52.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:52.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:52.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:52.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:52.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:52.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:52.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:52.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:52.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:52.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:52.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:52.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:52.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:52.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:52.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:52.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:07:52.940 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:07:53.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:53.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:53.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:53.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:53.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:53.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:53.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:53.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:53.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:53.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:53.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:53.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:07:53.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:53.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:53.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:53.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:53.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:53.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:53.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:53.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:53.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:53.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:53.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:53.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:53.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:53.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:07:54.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:54.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:54.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:54.287 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1620 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:54.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:54.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:54.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:54.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:54.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:54.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:54.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:54.353 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:07:54.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:07:54.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:54.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:54.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:54.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:07:54.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:54.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:54.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:54.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:54.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:54.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:54.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:54.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:54.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:54.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:54.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:54.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:54.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:54.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:54.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:55.308 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:07:55.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:55.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:55.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:55.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:55.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:55.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:55.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:55.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:55.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:55.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:55.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:55.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:55.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:55.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:55.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:55.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:55.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:55.787 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:07:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:56.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:56.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:56.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:56.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:56.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:56.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:56.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:56.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:56.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:56.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:56.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:56.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:56.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:56.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:56.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:56.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:56.267 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:07:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:07:57.213 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:07:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:57.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:57.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:57.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:57.221 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=2248 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:07:57.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:57.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:57.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:57.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:57.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:57.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:57.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:57.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:57.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:57.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:57.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:57.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:57.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:57.692 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:07:58.172 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:07:58.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:58.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:58.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:58.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:58.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:58.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:58.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:58.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:58.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:58.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:58.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:58.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:58.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:58.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:58.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:58.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:58.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:58.650 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:07:59.130 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:07:59.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:59.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:59.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:59.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:59.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:07:59.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:07:59.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:07:59.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:59.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:59.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:59.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:07:59.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:07:59.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:07:59.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:07:59.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:07:59.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:07:59.603 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:08:00.074 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:08:00.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:00.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:00.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:00.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:00.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:00.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:00.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:00.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:00.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:00.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:00.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:00.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:00.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:00.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:00.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:00.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:00.545 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:08:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:08:01.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:01.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:01.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:01.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:01.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:01.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:01.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:01.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:01.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:01.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:01.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:01.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:01.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:01.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:01.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:01.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:01.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:08:01.964 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:08:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:02.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:02.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:02.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:02.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:02.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:02.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:02.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:02.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:02.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:02.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:02.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:02.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:02.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:02.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:02.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:02.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:02.438 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:08:02.908 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:08:03.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:03.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:03.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:03.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:03.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:03.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:03.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:03.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:03.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:03.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:03.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:03.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:03.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:03.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:03.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:03.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:03.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:03.385 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:08:03.858 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:08:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:03.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:03.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:03.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:04.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:08:04.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:08:04.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:08:04.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:08:04.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:04.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:04.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:04.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:04.006 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:08:04.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:04.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:04.006 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:04.006 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:04.006 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:04.006 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:04.006 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:04.007 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:09.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:09.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:09.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:09.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:09.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:09.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:09.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:09.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:09.027 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:09.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:09.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:08:09.031 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:08:09.031 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:08:09.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:09.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:09.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:09.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:08:09.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:09.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:08:09.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:08:09.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:08:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:09.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:09.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:09.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:08:09.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:09.037 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:08:09.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:08:09.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:08:09.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:09.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:09.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:09.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:08:09.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:09.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:08:09.042 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.043 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:08:09.043 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:08:09.043 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:08:09.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:09.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:09.048 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:08:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:08:09.564 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:08:09.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:09.567 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:08:09.570 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:08:09.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:09.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:09.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:09.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:09.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:09.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:09.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:09.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:09.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:09.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:09.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:09.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:09.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:09.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:09.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:09.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:09.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:09.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:09.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:09.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:09.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:09.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:09.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:08:10.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:08:10.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:08:10.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:08:10.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:08:10.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:10.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:10.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:10.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:10.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:10.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:10.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:10.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:10.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:10.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:10.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:10.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:10.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:10.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:10.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:10.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:10.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:10.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:10.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:08:10.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:10.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:10.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:08:10.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:08:10.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:10.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:08:10.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:08:10.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:08:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:08:10.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:08:10.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:08:10.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:08:10.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:08:10.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:08:10.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:08:10.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:08:10.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:10.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:10.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:10.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:10.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:10.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:10.676 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:08:15.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:15.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:15.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:15.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:15.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:15.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:15.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:15.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:15.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:15.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:15.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:08:15.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:08:15.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:08:15.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:15.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:15.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:15.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:08:15.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:15.694 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:08:15.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:08:15.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:08:15.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:15.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:15.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:15.696 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:08:15.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:15.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:08:15.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:08:15.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:08:15.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:15.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:15.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:15.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:08:15.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:15.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:08:15.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:08:15.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:08:15.704 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:08:15.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:15.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:15.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:08:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:08:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:08:17.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:08:17.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:08:18.098 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:08:18.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:08:19.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:08:19.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:08:20.011 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:08:20.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:08:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:08:21.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:08:21.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:08:22.390 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:08:22.861 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:08:23.336 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:08:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:08:24.283 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:08:24.753 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:08:25.228 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:08:25.701 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:08:26.176 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:08:26.645 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:08:27.115 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:08:27.585 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:08:28.064 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:08:28.542 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:08:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:08:29.485 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:08:29.988 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:08:30.464 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:08:30.933 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:08:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:08:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:08:32.353 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:08:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:08:33.307 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:08:33.783 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:08:34.260 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:08:34.736 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:08:35.215 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:08:35.695 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:08:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:08:36.652 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:08:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:08:37.610 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:08:38.090 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:08:38.569 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:08:39.048 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:08:39.528 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:08:39.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:39.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:39.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:39.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:39.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:39.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:39.735 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:08:39.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:39.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:08:44.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:08:44.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:08:44.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:44.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:44.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:44.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:44.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:08:44.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:44.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:44.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:08:44.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:08:44.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:08:44.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:08:44.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:44.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:44.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:08:44.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:08:44.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:08:44.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:08:44.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:08:44.758 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:08:44.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:44.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:44.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:08:44.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:08:44.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:08:44.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:08:44.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:08:44.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:08:44.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:44.761 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:08:44.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:08:44.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:08:44.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:08:44.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:08:44.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:08:44.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:08:44.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:08:44.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:08:44.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:08:44.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:08:44.765 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:08:44.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:08:44.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:08:44.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:08:45.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:08:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:08:46.211 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:08:46.691 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:08:47.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:08:47.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:08:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:08:48.611 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:08:49.088 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:08:49.561 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:08:50.031 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:08:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:08:50.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:08:51.459 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:08:51.927 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:08:52.397 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:08:52.868 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:08:53.339 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:08:53.811 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:08:54.283 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:08:54.757 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:08:55.238 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:08:55.719 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:08:56.199 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:08:56.679 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:08:57.158 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:08:57.638 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:08:58.118 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:08:58.598 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:08:59.077 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:08:59.557 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:09:00.048 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:09:00.528 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:09:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:09:01.487 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:09:01.967 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:09:02.447 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:09:02.927 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:09:03.405 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:09:03.885 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:09:04.364 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:09:04.839 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:09:05.317 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:09:05.796 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:09:06.275 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:09:06.755 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:09:07.235 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:09:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:09:08.194 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:09:08.673 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:09:09.152 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:09:09.632 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:09:10.112 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:09:10.592 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:09:11.072 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:09:11.551 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:09:12.030 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:09:12.510 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:09:12.984 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:09:13.453 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:09:13.923 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:09:14.396 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:09:14.867 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:09:15.340 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:09:15.814 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:09:16.293 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:09:16.769 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:09:17.242 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:09:17.714 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:09:18.189 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:09:18.658 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:09:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:09:19.610 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:09:20.096 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:09:20.565 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:09:21.038 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:09:21.510 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:09:21.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:21.978 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:09:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:09:22.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:09:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:09:23.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:23.880 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:09:24.360 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:09:24.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:24.840 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:09:25.320 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:09:25.800 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:09:25.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:09:26.759 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:09:26.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:26.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:26.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:26.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:26.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:26.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:09:26.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:09:26.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:09:26.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:26.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8988 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:09:31.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:09:31.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:09:31.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:31.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:31.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:31.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:31.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:31.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:09:31.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:31.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:09:31.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:09:31.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:09:31.823 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:09:31.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:09:31.824 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:31.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:31.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:09:31.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:09:31.825 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:09:31.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:09:31.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:09:31.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:09:31.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:31.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:31.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:09:31.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:09:31.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:09:31.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:09:31.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:09:31.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:09:31.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:31.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:31.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:09:31.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:09:31.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:09:31.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:09:31.833 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:09:31.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:31.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:31.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:09:32.324 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:09:32.351 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:09:32.353 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:32.354 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:09:32.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:32.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:32.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:32.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:09:32.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:32.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:32.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:32.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:09:32.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:09:32.417 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:32.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:32.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:32.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:32.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:32.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:32.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:09:32.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:32.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:32.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:32.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:09:33.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:09:33.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:33.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:33.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:33.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:09:34.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:09:34.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:34.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:34.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:34.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:35.167 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:09:35.647 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:09:35.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:35.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:35.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:35.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:36.127 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:09:36.606 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:09:36.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:36.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:36.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:36.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:36.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:36.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:36.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:09:36.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:36.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:36.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:36.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:09:36.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:09:36.745 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:36.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:36.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:36.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:36.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:36.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:36.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:36.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:36.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:36.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:37.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:09:37.565 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:09:38.044 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:09:38.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:09:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:09:39.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:09:39.962 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:09:40.437 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:09:40.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:40.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:40.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:40.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:40.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:40.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:40.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:09:40.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:40.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:40.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:40.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:09:40.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:09:40.905 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:40.915 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:09:40.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:40.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:40.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:40.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:40.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:41.395 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:09:41.875 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:09:42.355 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:09:42.837 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:09:43.318 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:09:43.798 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:09:44.278 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:09:44.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:44.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:44.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:44.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:44.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:44.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:44.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:09:44.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:44.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:44.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:44.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:09:44.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:09:44.746 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:44.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:44.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:44.758 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:09:45.237 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:09:45.717 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:09:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:09:46.676 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:09:47.154 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:09:47.635 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:09:48.115 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:09:48.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:48.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:48.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:48.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:48.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:48.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:48.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:48.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:48.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:48.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:48.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:48.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:48.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:09:48.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:09:48.523 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:09:53.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:09:53.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:09:53.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:53.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:53.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:53.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:53.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:09:53.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:09:53.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:53.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:09:53.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:09:53.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:09:53.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:09:53.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:09:53.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:09:53.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:09:53.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:09:53.543 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:09:53.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:09:53.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:09:53.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:09:53.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:53.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:09:53.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:09:53.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:09:53.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:09:53.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:09:53.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:09:53.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:09:53.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:09:53.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:09:53.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:09:53.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:09:53.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:09:53.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:09:53.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:09:53.557 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:09:53.557 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:09:53.562 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:09:54.052 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:09:54.081 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:09:54.082 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:54.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:54.084 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:09:54.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:09:54.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:09:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:09:54.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:54.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:54.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:54.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:09:54.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:09:54.146 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:54.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:09:54.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:09:54.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:09:54.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:54.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:09:54.531 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:09:54.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:54.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:54.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:54.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:55.011 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:09:55.027 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:09:55.516 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:55.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:55.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:55.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:55.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:55.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:09:55.996 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:56.436 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:09:56.476 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:56.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:56.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:56.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:56.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:56.911 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:09:56.964 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:57.391 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:09:57.453 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:57.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:57.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:57.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:57.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:57.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:09:57.942 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:58.350 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:09:58.430 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:58.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:09:58.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:09:58.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:09:58.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:09:58.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:09:58.919 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:59.308 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:09:59.407 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:09:59.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:09:59.895 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:00.266 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:10:00.384 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:00.744 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:10:00.871 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:01.219 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:10:01.350 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:01.693 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:10:01.838 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:10:02.318 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:02.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:02.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:02.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:02.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:02.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:02.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:02.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:02.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:02.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:02.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:02.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:02.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:02.345 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:02.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:02.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:02.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:02.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:02.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:02.637 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:10:03.039 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:03.107 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:10:03.518 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:03.583 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:10:04.006 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:04.052 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:10:04.481 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:04.523 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:10:04.961 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:04.993 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:10:05.441 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:05.469 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:10:05.928 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:05.947 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:10:06.416 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:06.427 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:10:06.905 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:06.906 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:10:07.385 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:10:07.402 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:07.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:10:07.882 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:08.330 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:10:08.362 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:08.805 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:10:08.849 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:10:09.338 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:09.764 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:10:09.827 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:10.242 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:10:10.314 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:10.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:10.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:10.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:10.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:10.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:10.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:10.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:10.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:10.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:10.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:10.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:10.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:10.331 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:10.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:10.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:10.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:10.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:10.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:10.678 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:10:11.157 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:11.201 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:10:11.637 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:10:12.116 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:12.160 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:10:12.596 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:12.641 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:10:13.077 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:13.120 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:10:13.556 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:13.600 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:10:14.036 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:14.080 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:10:14.516 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:14.559 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:10:14.995 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:15.040 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:10:15.475 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:15.519 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:10:15.955 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:15.999 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:10:16.435 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:16.478 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:10:16.914 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:16.958 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:10:17.394 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:10:17.874 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:17.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:17.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:17.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:17.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:17.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:17.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:17.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:17.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:17.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:17.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:17.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:17.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:17.906 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:17.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:17.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:17.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:17.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:17.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:17.917 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:10:18.308 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:18.398 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:10:18.788 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:18.878 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:10:19.268 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:19.357 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:10:19.748 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:19.837 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:10:20.228 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:10:20.708 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:20.796 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:10:21.187 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:10:21.666 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:21.756 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:10:22.146 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:22.235 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:10:22.625 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:22.714 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:10:23.104 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:23.192 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:10:23.582 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:23.671 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:10:24.063 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:24.151 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:10:24.542 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:24.631 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:10:25.022 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:25.111 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:10:25.502 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:25.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:25.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:25.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:25.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:25.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:25.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:25.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:25.511 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:10:30.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:30.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:30.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:30.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:30.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:30.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:30.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:30.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:30.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:30.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:30.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:10:30.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:10:30.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:10:30.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:30.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:30.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:30.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:10:30.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:30.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:10:30.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:10:30.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:10:30.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:30.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:30.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:30.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:10:30.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:30.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:10:30.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:10:30.556 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:10:30.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:30.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:30.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:30.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:10:30.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:30.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:10:30.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:10:30.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:10:30.564 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:10:30.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:10:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:30.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:30.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:30.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:10:31.054 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:10:31.083 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:10:31.084 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:31.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:31.084 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:10:31.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:31.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:31.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:31.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:31.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:31.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:31.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:31.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:31.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:31.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:31.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:31.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:31.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:10:31.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:31.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:31.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:32.000 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:10:32.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:10:32.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:32.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:32.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:32.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:10:33.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:33.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:33.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:33.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:33.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:33.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:33.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:33.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:33.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:33.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:33.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:33.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:33.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:33.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:33.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:33.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:10:33.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:33.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:33.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:10:34.396 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:10:34.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:34.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:34.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:34.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:10:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:10:35.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:35.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:35.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:35.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:35.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:35.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:35.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:35.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:35.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:35.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:35.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:35.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:35.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:35.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:35.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:35.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:35.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:35.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:35.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:35.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:35.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:35.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:10:36.315 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:10:36.794 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:10:37.274 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:10:37.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:37.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:37.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:37.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:37.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:37.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:37.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:37.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:37.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:37.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:37.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:37.567 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:10:37.567 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:37.568 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.568 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.568 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.568 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.568 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.569 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:37.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:42.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:42.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:42.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:42.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:42.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:42.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:42.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:42.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:42.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:42.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:42.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:10:42.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:10:42.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:10:42.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:42.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:42.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:42.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:10:42.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:42.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:10:42.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:10:42.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:10:42.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:42.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:42.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:10:42.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:42.594 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:10:42.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:10:42.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:10:42.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:42.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:42.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:42.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:10:42.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:42.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:10:42.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:10:42.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:10:42.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:10:42.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:10:42.605 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:10:42.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:10:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:42.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:42.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:10:43.094 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:10:43.124 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:10:43.126 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:43.127 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:10:43.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:43.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:43.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:43.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:43.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:43.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:43.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:43.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:43.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:43.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:43.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:43.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:43.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:43.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:10:43.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:43.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:43.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:43.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:44.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:10:44.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:10:44.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:44.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:44.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:44.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:44.975 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:10:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:45.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:45.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:45.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:45.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:45.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:45.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:45.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:45.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:45.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:45.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:45.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:45.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:45.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:45.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:45.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:45.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:45.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:10:45.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:45.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:45.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:45.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:45.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:10:46.387 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:10:46.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:46.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:46.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:46.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:46.858 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:10:47.329 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:10:47.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:47.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:47.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:47.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:47.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:47.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:47.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:47.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:47.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:47.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:47.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:47.464 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:10:47.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:47.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:47.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.465 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.466 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.466 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.466 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.466 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.467 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.467 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.467 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.467 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.467 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:47.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:52.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:52.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:52.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:52.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:52.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:52.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:52.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:52.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:52.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:10:52.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:10:52.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:10:52.483 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:10:52.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:52.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:52.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:52.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:10:52.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:10:52.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:10:52.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:10:52.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:10:52.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:52.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:52.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:52.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:10:52.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:10:52.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:10:52.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:10:52.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:10:52.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:52.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:10:52.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:52.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:10:52.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:10:52.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:10:52.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:10:52.497 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:10:52.497 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:10:52.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:10:52.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:10:52.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:10:52.502 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:10:52.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:10:53.017 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:10:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:53.019 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:10:53.022 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:10:53.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:53.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:53.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:53.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:53.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:53.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:53.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:53.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:53.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:53.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:53.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:53.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:53.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:53.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:10:53.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:53.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:53.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:53.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:53.952 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:10:54.437 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:10:54.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:54.922 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:10:55.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:55.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:55.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:55.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:55.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:55.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:55.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:55.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:55.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:55.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:55.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:55.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:55.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:55.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:55.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:55.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:55.402 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:10:55.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:55.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:55.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:55.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:55.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:10:56.346 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:10:56.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:56.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:56.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:56.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:56.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:10:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:10:57.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:57.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:57.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:57.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:57.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:57.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:57.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:10:57.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:57.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:57.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:57.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:10:57.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:10:57.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:57.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:10:57.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:10:57.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:57.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:57.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:57.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:57.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:57.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:57.768 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:10:58.250 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:10:58.728 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:10:59.207 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:10:59.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:10:59.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:10:59.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:10:59.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:10:59.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:10:59.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:10:59.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:10:59.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:10:59.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:10:59.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:10:59.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:10:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:10:59.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:10:59.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:10:59.463 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:10:59.463 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:04.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:04.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:04.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:04.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:04.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:04.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:04.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:04.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:04.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:04.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:04.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:04.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:04.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:04.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:04.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:04.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:04.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:04.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:04.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:04.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:04.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:04.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:04.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:04.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:04.493 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:04.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:04.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:04.495 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:04.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:04.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:04.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:04.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:04.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:04.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:04.496 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:04.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:04.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:04.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:04.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:04.502 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:04.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:04.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:04.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:04.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:05.021 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:05.022 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:05.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:05.024 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:05.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:05.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:05.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:05.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:05.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:05.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:05.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:05.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:05.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:05.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:05.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:05.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:05.479 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:05.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:05.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:05.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:05.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:05.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:06.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:11:06.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:06.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:06.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:06.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:06.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:11:07.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:07.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:07.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:07.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:07.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:07.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:07.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:07.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:07.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:07.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:07.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:07.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:07.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:07.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:07.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:07.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:07.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:07.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:11:07.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:07.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:07.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:07.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:07.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:11:08.370 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:11:08.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:08.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:08.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:08.853 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:11:09.335 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:11:09.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:09.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:09.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:09.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:09.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:09.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:09.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:09.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:09.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:09.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:09.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:09.360 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:09.360 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1027 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:14.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:14.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:14.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:14.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:14.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:14.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:14.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:14.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:14.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:14.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:14.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:14.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:14.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:14.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:14.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:14.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:14.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:14.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:14.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:14.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:14.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:14.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:14.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:14.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:14.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:14.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:14.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:14.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:14.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:14.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:14.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:14.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:14.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:14.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:14.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:14.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:14.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:14.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:14.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:14.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:14.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:14.406 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:14.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:14.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:14.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:14.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:14.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:14.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:14.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:14.931 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:14.933 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:14.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:14.935 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:14.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:14.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:14.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:14.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:14.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:14.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:14.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:14.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:14.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:15.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:15.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:15.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:15.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:15.378 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:15.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:15.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:15.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:15.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:15.864 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:16.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:11:16.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:16.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:16.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:11:17.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:17.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:17.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:17.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:17.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:17.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:17.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:17.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:17.185 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:17.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:17.186 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:17.187 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.187 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.187 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.188 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.188 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=587 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.188 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.188 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.189 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.189 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.189 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.189 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.189 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:17.190 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=588 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:22.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:22.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:22.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:22.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:22.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:22.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:22.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:22.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:22.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:22.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:22.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:22.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:22.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:22.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:22.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:22.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:22.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:22.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:22.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:22.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:22.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:22.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:22.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:22.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:22.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:22.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:22.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:22.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:22.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:22.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:22.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:22.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:22.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:22.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:22.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:22.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:22.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:22.210 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:22.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:22.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:22.724 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:22.725 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:22.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:22.726 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:22.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:22.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:22.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:22.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:22.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:22.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:22.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:22.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:22.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:22.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:22.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:22.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:22.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:23.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:23.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:23.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:23.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:23.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:23.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:24.161 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:11:24.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:24.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:24.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:24.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:24.645 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:11:24.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:24.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:24.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:24.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:24.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:24.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:24.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:24.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:24.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:24.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:24.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:24.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:24.974 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:24.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:24.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:24.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=582 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:24.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=583 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:29.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:29.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:29.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:29.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:29.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:29.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:29.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:29.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:29.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:29.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:29.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:29.994 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:29.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:29.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:29.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:29.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:29.997 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:29.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:29.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:29.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:29.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:29.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:29.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:29.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:30.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:30.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:30.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:30.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:30.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:30.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:30.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:30.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:30.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:30.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:30.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:30.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:30.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:30.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:30.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:30.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:30.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:30.007 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:30.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:30.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:30.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:30.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:30.523 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:30.524 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:30.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:30.525 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:30.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:30.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:30.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:30.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:30.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:30.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:30.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:30.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:30.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:30.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:30.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:30.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:30.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:30.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:30.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:30.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:30.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:30.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:30.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:31.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:31.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:31.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:31.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:31.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:31.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:31.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:31.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:31.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:31.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:31.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:31.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:31.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:31.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:31.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:31.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:31.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:31.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:31.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:31.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:31.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:31.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:31.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:31.425 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:31.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:31.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:31.425 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:36.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:36.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:36.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:36.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:36.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:36.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:36.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:36.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:36.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:36.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:36.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:36.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:36.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:36.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:36.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:36.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:36.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:36.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:36.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:36.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:36.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:36.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:36.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:36.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:36.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:36.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:36.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:36.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:36.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:36.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:36.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:36.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:36.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:36.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:36.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:36.454 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:36.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:36.456 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:36.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:36.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:36.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:36.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:36.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:36.979 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:36.980 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:36.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:36.981 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:36.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:36.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:36.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:37.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:37.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:37.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:37.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:37.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:37.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:37.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:37.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.428 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:37.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:37.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:37.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:37.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:37.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:37.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:37.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:37.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:37.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:37.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:37.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:37.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:37.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:37.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:37.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:37.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:37.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:37.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:37.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:37.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:37.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:37.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:37.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:37.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:37.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:37.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:37.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:37.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:37.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:37.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:37.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:37.910 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:42.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:42.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:42.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:42.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:42.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:42.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:42.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:42.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:42.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:42.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:42.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:42.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:42.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:42.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:42.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:42.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:42.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:42.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:42.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:42.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:42.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:42.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:42.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:42.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:42.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:42.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:42.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:42.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:42.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:42.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:42.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:42.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:42.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:42.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:42.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:42.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.953 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:42.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:42.954 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:42.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:42.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:42.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:42.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:42.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:43.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:43.471 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:43.472 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:43.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:43.474 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:43.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:43.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:43.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:43.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:43.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:43.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:43.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:43.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:43.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:43.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:43.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:43.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:43.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:43.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:43.922 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:43.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:43.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:43.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:43.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:43.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:43.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:43.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:43.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:43.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:43.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:43.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:43.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:43.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:43.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:43.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:44.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:44.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:44.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:44.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:44.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:44.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:44.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:44.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:44.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:44.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:44.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:44.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:44.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:44.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:44.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:44.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:44.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:44.454 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:44.454 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:44.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:44.455 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.455 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.455 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.456 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.456 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.456 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.456 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:44.456 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:11:49.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:49.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:49.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:49.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:49.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:49.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:49.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:49.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:49.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:49.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:49.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:49.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:49.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:49.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:49.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:49.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:49.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:49.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:49.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:49.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:49.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:49.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:49.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:49.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:49.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:49.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:49.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:49.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:49.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:49.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:49.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:49.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:49.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:49.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:49.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:49.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:49.477 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:49.965 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:49.992 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:49.993 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:49.994 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:49.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:50.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:50.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:50.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:50.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:50.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:50.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:50.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:50.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:50.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:50.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:50.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:50.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:50.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:11:50.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:50.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:50.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:50.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:50.916 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:11:51.394 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:11:51.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:51.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:51.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:51.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:11:52.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:11:52.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:52.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:52.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:11:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:11:53.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:53.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:53.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:53.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:11:54.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:54.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:54.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:11:54.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:11:54.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:11:54.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:11:54.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:54.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:54.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:54.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:54.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:54.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:54.121 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:11:59.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:11:59.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:11:59.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:59.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:59.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:59.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:59.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:11:59.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:59.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:59.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:11:59.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:11:59.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:11:59.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:11:59.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:59.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:59.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:11:59.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:11:59.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:11:59.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:11:59.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:11:59.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:11:59.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:59.151 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:59.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:11:59.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:11:59.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:11:59.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:11:59.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:11:59.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:11:59.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:59.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:11:59.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:11:59.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:11:59.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:11:59.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:11:59.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:11:59.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:11:59.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:11:59.162 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:11:59.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:11:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:11:59.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:11:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:11:59.685 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:11:59.686 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:11:59.688 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:11:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:59.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:11:59.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:11:59.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:11:59.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:59.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:59.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:59.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:11:59.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:11:59.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:11:59.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:11:59.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:11:59.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:11:59.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:00.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:00.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:00.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:00.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:00.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:00.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:00.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:00.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:00.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:00.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:00.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:00.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:00.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:00.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:00.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:00.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:00.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:00.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:00.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:00.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:00.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:00.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:00.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:00.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:00.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:00.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:00.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:00.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:00.308 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:00.308 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:00.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:00.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:00.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:00.308 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:00.308 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:00.308 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:00.308 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:00.309 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=244 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:05.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:05.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:05.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:05.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:05.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:05.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:05.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:05.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:05.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:05.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:05.338 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:05.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:05.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:05.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:05.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:05.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:05.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:05.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:05.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:05.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:05.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:05.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:05.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:05.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:05.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:05.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:05.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:05.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:05.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:05.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:05.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:05.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:05.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:05.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:05.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:05.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:05.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:05.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:05.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:05.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:05.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:05.356 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:05.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:05.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:05.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:05.876 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:05.878 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:05.880 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:05.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:05.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:05.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:05.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:05.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:05.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:05.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:05.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:05.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:05.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:05.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:05.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:05.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:05.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:06.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:06.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:06.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:06.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:06.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:06.802 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:12:07.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:12:07.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:07.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:07.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:07.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:07.763 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:12:08.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:12:08.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:08.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:08.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:08.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:08.717 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:12:09.197 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:12:09.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:09.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:09.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:09.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:09.677 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:12:09.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:09.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:09.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:10.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:10.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:10.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:10.000 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:10.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:10.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:10.001 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:15.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:15.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:15.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:15.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:15.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:15.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:15.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:15.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:15.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:15.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:15.024 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:15.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:15.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:15.027 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:15.030 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:15.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:15.030 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:15.033 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:15.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:15.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:15.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:15.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:15.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:15.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:15.038 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:15.038 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:15.038 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:15.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:15.043 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:15.526 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:15.556 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:15.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:15.558 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:15.559 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:15.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:15.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:15.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:15.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:15.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:15.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:15.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:15.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:15.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:15.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:15.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:15.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:15.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:16.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:16.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:16.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:16.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:16.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:16.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:16.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:16.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:16.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:16.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:16.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:16.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:16.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:16.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:16.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:16.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:16.402 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:16.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:16.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:16.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:21.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:21.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:21.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:21.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:21.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:21.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:21.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:21.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:21.419 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:21.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:21.419 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:21.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:21.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:21.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:21.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:21.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:21.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:21.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:21.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:21.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:21.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:21.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:21.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:21.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:21.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:21.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:21.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:21.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:21.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:21.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:21.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:21.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:21.433 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:21.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:21.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:21.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:21.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:21.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:21.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:21.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:21.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:21.438 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:21.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:21.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:21.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:21.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:21.963 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:21.965 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:21.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:21.967 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:21.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:21.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:21.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:22.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:22.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:22.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:22.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:22.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:22.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:22.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:22.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:22.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:22.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:22.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:22.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:22.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:22.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:22.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:22.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:22.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:22.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:22.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:22.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:22.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:22.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:22.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:22.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:22.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:22.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:22.805 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:22.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.805 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:22.806 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:27.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:27.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:27.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:27.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:27.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:27.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:27.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:27.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:27.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:27.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:27.827 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:27.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:27.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:27.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:27.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:27.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:27.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:27.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:27.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:27.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:27.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:27.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:27.840 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:27.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:27.840 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:27.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:27.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:27.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:27.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:27.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:27.845 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:27.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:27.845 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:27.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:27.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:27.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:27.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:27.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:27.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:27.852 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:27.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:27.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:27.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:27.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:28.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:28.373 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:28.374 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:28.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:28.375 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:28.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:28.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:28.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:28.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:28.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:28.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:28.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:28.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:28.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:28.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:28.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:28.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:28.820 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:28.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:28.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:28.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:28.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:29.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:29.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:29.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:29.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:29.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:29.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:29.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:29.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:29.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:29.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:29.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:29.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:29.230 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:29.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:29.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:29.231 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.231 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.231 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.231 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.232 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.232 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:29.232 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:34.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:34.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:34.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:34.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:34.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:34.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:34.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:34.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:34.241 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:34.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:34.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:34.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:34.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:34.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:34.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:34.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:34.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:34.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:34.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:34.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:34.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:34.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:34.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:34.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:34.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:34.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:34.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:34.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:34.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:34.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:34.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:34.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:34.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:34.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:34.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:34.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:34.255 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:34.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:34.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:34.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:34.801 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:34.802 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:34.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:34.803 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:34.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:34.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:34.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:34.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:34.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:34.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:34.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:34.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:34.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:34.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:34.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:34.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:34.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:35.218 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:35.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:35.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:35.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:35.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:35.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:12:35.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:35.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:35.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:35.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:35.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:35.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:35.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:35.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:35.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:35.751 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:35.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:35.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:35.751 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=321 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:40.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:40.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:40.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:40.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:40.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:40.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:40.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:40.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:40.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:40.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:40.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:40.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:40.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:40.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:40.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:40.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:40.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:40.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:40.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:40.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:40.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:40.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:40.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:40.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:40.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:40.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:40.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:40.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:40.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:40.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:40.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:40.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:40.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:40.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:40.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:40.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:40.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:40.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:40.786 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:40.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:41.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:41.310 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:41.312 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:41.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:41.314 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:41.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:41.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:41.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:41.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:41.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:41.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:41.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:41.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:41.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:41.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:41.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:41.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:41.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:41.747 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:41.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:41.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:41.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:41.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:42.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:42.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:42.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:42.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:42.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:42.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:42.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:42.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:42.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:42.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:42.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:42.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:42.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:42.154 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:42.155 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:42.155 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:42.155 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:42.156 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:42.156 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:42.156 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:47.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:47.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:47.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:47.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:47.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:47.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:47.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:47.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:47.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:47.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:47.165 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:47.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:47.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:47.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:47.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:47.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:47.170 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:47.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:47.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:47.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:47.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:47.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:47.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:47.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:47.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:47.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:47.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:47.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:47.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:47.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:47.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:47.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:47.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:47.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:47.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:47.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:47.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:47.180 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:47.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:47.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:47.668 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:47.694 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:47.695 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:47.696 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:47.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:47.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:47.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:47.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:47.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:47.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:47.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:47.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:47.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:47.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:47.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:47.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:47.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:47.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:48.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:48.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:48.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:12:48.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:48.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:48.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:48.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:48.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:48.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:48.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:48.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:48.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:48.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:48.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:48.677 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:48.677 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:48.677 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:12:48.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:48.678 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:12:53.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:53.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:53.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:53.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:53.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:53.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:53.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:53.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:53.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:53.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:12:53.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:12:53.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:12:53.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:12:53.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:53.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:53.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:53.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:12:53.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:12:53.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:12:53.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:12:53.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:12:53.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:53.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:53.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:12:53.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:12:53.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:12:53.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:12:53.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:12:53.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:53.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:12:53.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:53.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:12:53.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:12:53.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:12:53.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:12:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:12:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:12:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:12:53.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:12:53.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:12:53.721 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:12:53.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:12:53.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:12:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:12:53.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:12:53.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:12:53.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:12:54.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:12:54.245 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:12:54.247 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:12:54.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:54.249 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:12:54.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:54.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:54.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:54.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:54.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:54.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:54.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:54.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:54.689 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:12:54.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:54.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:54.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:54.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:55.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:12:55.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:55.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:12:55.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:55.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:55.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:55.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:55.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:12:55.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:12:55.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:12:55.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:12:55.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:12:55.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:12:55.648 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:12:55.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:55.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:55.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:55.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:56.128 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:12:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:12:56.608 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:12:56.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:12:56.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:12:56.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:12:56.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:12:56.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:12:56.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:12:56.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:12:56.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:12:56.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:12:56.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:12:56.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:12:56.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:12:56.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:12:56.661 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:13:01.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:01.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:01.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:01.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:01.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:01.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:01.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:01.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:01.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:01.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:01.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:13:01.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:13:01.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:13:01.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:01.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:01.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:01.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:13:01.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:01.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:13:01.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:13:01.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:13:01.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:01.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:01.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:01.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:13:01.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:01.685 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:13:01.687 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:13:01.687 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:13:01.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:01.688 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:01.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:01.688 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:13:01.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:01.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:13:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:13:01.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:13:01.692 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:13:01.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:01.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:01.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:01.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:13:02.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:13:02.208 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:13:02.209 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:13:02.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:13:02.210 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:13:02.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:02.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:02.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:13:02.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:13:02.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:02.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:02.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:02.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:03.139 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:13:03.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:13:03.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:03.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:03.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:03.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:04.097 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:13:04.577 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:13:04.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:04.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:04.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:04.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:05.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:13:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:13:05.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:05.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:05.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:05.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:06.013 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:13:06.492 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:13:06.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:06.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:06.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:06.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:06.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:13:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:13:07.929 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:13:08.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:08.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:08.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:08.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:13:08.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:13:08.406 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:13:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:08.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:08.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:08.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:08.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:13:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:13:09.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:13:10.286 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:13:10.757 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:13:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:13:11.698 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:13:12.169 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:13:12.640 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:13:13.110 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:13:13.581 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:13:14.052 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:13:14.523 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:13:14.993 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:13:15.464 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:13:15.935 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:13:16.406 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:13:16.877 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:13:17.347 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:13:17.818 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:13:18.289 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:13:18.759 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:13:19.230 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:13:19.702 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:13:20.172 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:13:20.643 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:13:21.113 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:13:21.584 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:13:22.055 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:13:22.526 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:13:22.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:22.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:22.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:22.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:22.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:22.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:22.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:22.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:22.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:22.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:22.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:22.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:22.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:22.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:22.890 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:13:22.890 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.890 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.891 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.892 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.892 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:22.892 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:27.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:27.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:27.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:27.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:27.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:27.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:27.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:27.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:27.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:27.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:27.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:13:27.895 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:13:27.895 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:13:27.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:27.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:27.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:27.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:13:27.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:27.896 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:27.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:13:27.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:27.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:27.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:13:27.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:27.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:13:27.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:13:27.902 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:13:27.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:27.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:27.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:27.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:13:28.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:13:28.420 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:13:28.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:13:28.423 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:13:28.425 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:13:28.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:28.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:28.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:13:28.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:13:28.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:28.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:28.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:28.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:29.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:13:29.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:13:29.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:29.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:29.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:29.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:30.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:13:30.784 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:13:30.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:30.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:30.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:30.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:31.263 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:13:31.742 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:13:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:31.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:32.221 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:13:32.700 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:13:32.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:32.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:32.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:32.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:33.179 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:13:33.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:13:34.136 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:13:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:34.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:34.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:34.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:13:34.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:13:34.613 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:13:34.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:34.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:34.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:34.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:34.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:13:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:13:36.023 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:13:36.493 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:13:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:13:37.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:13:37.906 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:13:38.376 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:13:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:13:39.318 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:13:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:13:40.259 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:13:40.730 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:13:41.201 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:13:41.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:41.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:41.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:41.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:41.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:41.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:41.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:41.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:41.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:41.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:41.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:41.403 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:41.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2902 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:46.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:46.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:46.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:46.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:46.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:46.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:46.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:46.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:46.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:46.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:13:46.423 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:13:46.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:13:46.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:13:46.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:46.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:46.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:46.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:13:46.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:13:46.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:13:46.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:13:46.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:13:46.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:46.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:46.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:46.431 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:13:46.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:13:46.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:13:46.433 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:13:46.433 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:13:46.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:46.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:13:46.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:46.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:13:46.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:13:46.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:13:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:13:46.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:13:46.440 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:13:46.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:13:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:13:46.956 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:13:46.957 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:13:46.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:13:46.958 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:13:46.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:46.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:46.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:13:47.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:13:47.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:47.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:13:48.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:13:48.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:48.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:48.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:48.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:48.868 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:13:49.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:13:49.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:49.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:49.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:49.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:49.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:13:50.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:13:50.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:50.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:50.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:50.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:50.788 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:13:51.273 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:13:51.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:51.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:51.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:51.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:51.758 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:13:52.243 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:13:52.724 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:13:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:52.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:52.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:52.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:13:52.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:13:53.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:13:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:53.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:13:53.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:13:53.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:53.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:53.690 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:13:54.168 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:13:54.649 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:13:55.134 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:13:55.620 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:13:56.107 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:13:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:13:57.078 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:13:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:13:57.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:13:57.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:13:57.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:13:57.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:13:57.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:13:57.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:13:57.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:13:57.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:13:57.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:13:57.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:13:57.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:13:57.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:13:57.226 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:13:57.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:13:57.226 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:02.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:02.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:02.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:02.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:02.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:02.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:02.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:02.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:02.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:02.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:02.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:14:02.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:14:02.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:14:02.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:02.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:02.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:02.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:14:02.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:02.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:14:02.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:14:02.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:14:02.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:02.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:02.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:02.250 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:14:02.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:02.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:02.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:14:02.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:02.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:14:02.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:14:02.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:14:02.256 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:14:02.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:14:02.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:02.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:14:02.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:14:02.771 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:14:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:14:02.772 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:14:02.773 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:14:02.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:14:02.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:14:02.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:14:03.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:14:03.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:03.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:03.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:14:04.195 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:14:04.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:04.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:04.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:04.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:04.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:14:05.164 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:14:05.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:05.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:05.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:05.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:05.648 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:14:06.132 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:14:06.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:06.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:14:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:14:07.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:07.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:07.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:07.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:07.585 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:14:08.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:14:08.551 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:14:08.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:08.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:14:08.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:14:08.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:14:08.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:14:09.036 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:14:09.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:14:09.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:14:09.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:14:09.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:09.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:09.519 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:14:10.005 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:14:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:14:10.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:14:11.459 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:14:11.943 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:14:12.427 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:14:12.913 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:14:13.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:14:13.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:13.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:14:13.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:14:13.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:13.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:13.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:13.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:13.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:13.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:13.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:13.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:13.072 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:14:13.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:13.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.074 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:13.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:18.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:18.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:18.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:18.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:18.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:18.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:18.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:18.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:18.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:18.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:18.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:14:18.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:14:18.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:14:18.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:18.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:18.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:18.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:14:18.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:18.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:14:18.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:14:18.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:14:18.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:18.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:18.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:18.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:14:18.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:18.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:14:18.100 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:14:18.100 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:14:18.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:18.100 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:18.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:18.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:14:18.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:18.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:14:18.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:14:18.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:14:18.107 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:14:18.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:18.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:18.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:18.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:14:18.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:14:18.626 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:14:18.627 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:14:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:14:18.628 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:14:18.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:14:18.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:14:18.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:14:19.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:14:19.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:19.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:19.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:19.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:19.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:14:20.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:14:20.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:20.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:20.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:20.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:20.552 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:14:21.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:14:21.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:21.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:14:22.006 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:14:22.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:22.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:22.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:22.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:22.490 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:14:22.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:14:23.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:23.460 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:14:23.944 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:14:24.431 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:14:24.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:24.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:14:24.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:14:24.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:14:24.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:14:24.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:14:24.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:14:24.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:14:24.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:24.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:24.912 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:14:25.397 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:14:25.881 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:14:26.364 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:14:26.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:14:27.333 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:14:27.818 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:14:28.297 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:14:28.775 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:14:28.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:14:28.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:28.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:14:28.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:14:28.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:28.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:28.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:28.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:28.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:28.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:28.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:28.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:28.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:28.932 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:14:28.932 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.932 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.932 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.933 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.933 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.933 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.933 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.933 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:28.934 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:33.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:33.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:33.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:33.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:33.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:33.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:33.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:33.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:33.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:33.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:33.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:14:33.948 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:14:33.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:14:33.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:33.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:33.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:33.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:14:33.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:33.951 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:14:33.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:14:33.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:14:33.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:33.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:33.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:33.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:14:33.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:33.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:14:33.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:14:33.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:14:33.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:33.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:33.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:33.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:14:33.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:33.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:14:33.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:14:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:14:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:14:33.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:14:33.966 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:14:33.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:14:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:33.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:14:34.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:14:34.483 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:14:34.483 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:14:34.483 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:14:34.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:14:34.939 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:14:34.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:34.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:35.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:14:35.905 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:14:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:35.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:35.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:36.388 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:14:36.871 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:14:36.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:36.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:36.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:36.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:37.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:14:37.838 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:14:37.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:37.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:37.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:37.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:38.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:14:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:14:38.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:38.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:38.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:38.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:14:39.769 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:14:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:14:40.737 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:14:41.220 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:14:41.704 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:14:42.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:14:42.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:14:43.152 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:14:43.637 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:14:44.119 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:14:44.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:44.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:44.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:44.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:44.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:44.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:44.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:44.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:44.503 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:14:44.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.505 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.506 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.506 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2226 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.506 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.506 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.506 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.507 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.507 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.507 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.507 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:44.507 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:14:49.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:49.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:49.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:49.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:49.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:49.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:49.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:49.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:49.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:49.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:49.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:14:49.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:14:49.521 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:14:49.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:49.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:49.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:49.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:14:49.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:49.523 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:14:49.524 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:14:49.525 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:14:49.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:49.525 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:49.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:49.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:14:49.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:49.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:14:49.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:14:49.528 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:14:49.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:49.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:49.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:49.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:14:49.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:49.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:14:49.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:14:49.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:14:49.534 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:14:49.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:14:49.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:49.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:49.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:49.537 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:14:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:14:54.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:14:54.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:54.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:54.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:54.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:54.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:14:54.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:54.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:54.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:14:54.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:14:54.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:14:54.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:14:54.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:54.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:54.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:14:54.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:14:54.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:14:54.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:54.561 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:14:54.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:14:54.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:14:54.563 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:14:54.563 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:14:54.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:54.564 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:14:54.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:14:54.564 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:14:54.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:14:54.564 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:14:54.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:14:54.568 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:14:54.568 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:14:54.568 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:14:54.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:14:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:14:54.573 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:14:55.062 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:14:55.082 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:14:55.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:14:55.083 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:14:55.085 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:14:55.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:14:55.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:14:55.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:14:55.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:14:55.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:14:55.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:14:55.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:14:55.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:14:55.547 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:14:55.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:55.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:55.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:55.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:14:56.519 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:14:56.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:56.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:56.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:56.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:57.004 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:14:57.488 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:14:57.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:57.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:57.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:57.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:57.971 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:14:58.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:14:58.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:58.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:58.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:58.944 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:14:59.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:14:59.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:14:59.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:14:59.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:14:59.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:14:59.910 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:15:00.395 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:15:00.881 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:15:01.364 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:15:01.849 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:15:02.334 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:15:02.820 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:15:03.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:03.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:03.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:03.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:03.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:03.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:03.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:03.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:03.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:03.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:03.115 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:03.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:03.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:03.115 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1800 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:08.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:08.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:08.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:08.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:08.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:08.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:08.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:08.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:08.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:08.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:08.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:08.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:08.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:08.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:08.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:08.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:08.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:08.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:08.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:08.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:08.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:08.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:08.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:08.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:08.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:08.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:08.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:08.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:08.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:08.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:08.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:08.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:08.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:08.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:08.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:08.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:08.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:08.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:08.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:08.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:08.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:08.160 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:08.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:08.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:08.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:08.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:08.164 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:13.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:13.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:13.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:13.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:13.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:13.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:13.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:13.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:13.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:13.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:13.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:13.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:13.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:13.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:13.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:13.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:13.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:13.184 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:13.186 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:13.186 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:13.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:13.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:13.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:13.187 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:13.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:13.187 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:13.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:13.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:13.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:13.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:13.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:13.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:13.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:13.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:13.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:13.194 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:13.194 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:13.194 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:13.199 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:15:13.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:15:13.707 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:15:13.708 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:15:13.708 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:15:13.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:15:13.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:13.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:13.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:15:13.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:15:13.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:15:13.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:15:13.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:15:13.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:15:14.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:15:14.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:14.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:14.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:14.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:14.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:15:15.096 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:15:15.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:15.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:15.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:15.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:15.567 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:15:16.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:15:16.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:16.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:16.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:16.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:16.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:15:16.979 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:15:17.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:17.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:17.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:17.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:15:17.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:15:18.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:18.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:18.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:18.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:18.406 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:15:18.883 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:15:19.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:15:19.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:15:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:15:20.799 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:15:21.272 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:15:21.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:21.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:21.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:21.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:21.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:21.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:21.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:21.729 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:21.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:21.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:21.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:26.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:26.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:26.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:26.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:26.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:26.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:26.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:26.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:26.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:26.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:26.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:26.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:26.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:26.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:26.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:26.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:26.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:26.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:26.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:26.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:26.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:26.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:26.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:26.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:26.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:26.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:26.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:26.781 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:26.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:26.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:26.784 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:26.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:31.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:31.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:31.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:31.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:31.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:31.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:31.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:31.812 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:31.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:31.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:31.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:31.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:31.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:31.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:31.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:31.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:31.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:31.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:31.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:31.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:31.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:31.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:31.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:31.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:31.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:31.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:31.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:31.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:31.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:31.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:31.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:31.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:31.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:31.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:31.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:31.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:31.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:31.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:31.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:31.830 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:31.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:31.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:31.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:15:32.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:15:32.351 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:15:32.352 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:15:32.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:15:32.354 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:15:32.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:32.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:32.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:15:32.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:15:32.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:15:32.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:15:32.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:15:32.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:15:32.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:15:32.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:32.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:32.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:32.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:33.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:15:33.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:15:33.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:33.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:33.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:33.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:15:34.686 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:15:34.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:34.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:34.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:34.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:35.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:15:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:15:35.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:35.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:35.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:35.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:36.099 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:15:36.572 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:15:36.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:36.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:36.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:36.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:37.045 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:15:37.520 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:15:37.998 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:15:38.478 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:15:38.956 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:15:39.436 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:15:39.910 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:15:40.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:40.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:40.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:40.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:40.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:40.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:40.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:40.378 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:40.379 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:40.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.380 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.382 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.382 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.382 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.382 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:40.382 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:45.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:45.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:45.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:45.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:45.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:45.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:45.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:45.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:45.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:45.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:45.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:45.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:45.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:45.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:45.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:45.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:45.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:45.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:45.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:45.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:45.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:45.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:45.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:45.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:45.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:45.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:45.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:45.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:45.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:45.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:45.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:45.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:45.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:45.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:45.411 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:45.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:45.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:45.414 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:45.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:50.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:50.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:50.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:50.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:50.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:50.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:50.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:50.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:50.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:50.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:15:50.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:15:50.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:15:50.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:15:50.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:50.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:50.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:50.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:15:50.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:15:50.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:15:50.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:15:50.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:15:50.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:50.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:50.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:15:50.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:15:50.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:15:50.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:15:50.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:15:50.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:50.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:15:50.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:50.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:15:50.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:15:50.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:15:50.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:15:50.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:15:50.451 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:15:50.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:15:50.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:15:50.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:15:50.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:15:50.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:15:50.972 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:15:50.973 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:15:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:15:50.975 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:15:50.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:50.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:50.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:15:50.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:15:50.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:15:50.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:15:50.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:15:50.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:15:51.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:15:51.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:51.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:51.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:51.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:51.898 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:15:52.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:15:52.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:52.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:52.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:52.859 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:15:53.339 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:15:53.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:53.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:53.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:53.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:53.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:15:54.298 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:15:54.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:54.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:54.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:54.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:54.778 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:15:55.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:15:55.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:55.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:55.739 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:15:56.219 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:15:56.699 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:15:57.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:15:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:15:58.138 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:15:58.618 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:15:58.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:15:58.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:15:58.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:15:58.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:15:58.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:15:58.996 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:15:58.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:58.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:58.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:58.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:15:58.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:03.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:03.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:04.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:04.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:04.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:04.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:04.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:04.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:04.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:04.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:04.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:04.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:04.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:04.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:04.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:04.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:04.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:04.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:04.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:04.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:04.019 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:04.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:04.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:04.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:04.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:04.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:04.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:04.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:04.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:04.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:04.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:04.025 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:04.025 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:04.025 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:04.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:04.027 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:04.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:09.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:09.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:09.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:09.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:09.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:09.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:09.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:09.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:09.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:09.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:09.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:09.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:09.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:09.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:09.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:09.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:09.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:09.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:09.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:09.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:09.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:09.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:09.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:09.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:09.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:09.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:09.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:09.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:09.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:09.066 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:09.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:09.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:09.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:09.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:09.067 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:09.067 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.067 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:09.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:09.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:09.072 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:16:09.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:16:09.580 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:16:09.581 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:16:09.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:16:09.581 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:16:09.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:16:09.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:16:09.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:16:10.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:16:10.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:10.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:10.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:10.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:10.492 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:16:10.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:16:11.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:11.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:11.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:11.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:11.436 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:16:11.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:16:12.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:12.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:12.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:12.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:12.382 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:16:12.855 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:16:13.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:13.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:13.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:13.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:13.327 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:16:13.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:16:14.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:14.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:14.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:14.277 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:16:14.752 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:16:15.229 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:16:15.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:16:16.177 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:16:16.650 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:16:17.122 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:16:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:16:18.064 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:16:18.533 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:16:19.003 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:16:19.474 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:16:19.945 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:16:20.416 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:16:20.886 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:16:21.356 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:16:21.828 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:16:22.298 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:16:22.770 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:16:23.240 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:16:23.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:16:23.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:16:23.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:23.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:23.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:23.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:23.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:23.602 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:16:23.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:23.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:28.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:28.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:28.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:28.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:28.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:28.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:28.623 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:28.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:28.623 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:28.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:28.626 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:28.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:28.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:28.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:28.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:28.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:28.627 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:28.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:28.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:28.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:28.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:28.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:28.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:28.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:28.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:28.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:28.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:28.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:28.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:28.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:28.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:28.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:28.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:28.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:28.636 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:28.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:28.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:28.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:28.638 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:28.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:33.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:33.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:33.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:33.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:33.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:33.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:33.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:33.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:33.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:33.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:33.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:33.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:33.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:33.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:33.668 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:33.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:33.669 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:33.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:33.669 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:33.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:33.672 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:33.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:33.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:33.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:33.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:33.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:33.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:33.674 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:33.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:33.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:33.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:33.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:33.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:33.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:33.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:33.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:33.678 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:33.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:16:34.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:16:34.193 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:16:34.194 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:16:34.194 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:16:34.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:16:34.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:16:34.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:16:34.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:16:34.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:16:34.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:16:34.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:16:34.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:16:34.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:16:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:16:34.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:34.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:34.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:34.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:35.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:16:35.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:16:35.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:35.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:16:36.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:16:36.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:36.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:36.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:36.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:36.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:16:37.446 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:16:37.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:37.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:37.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:37.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:37.916 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:16:38.388 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:16:38.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:38.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:38.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:38.859 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:16:39.330 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:16:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:16:40.271 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:16:40.742 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:16:41.213 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:16:41.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:16:42.154 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:16:42.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:16:42.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:16:42.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:42.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:42.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:42.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:42.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:42.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:42.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:42.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:42.260 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:16:42.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:42.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:42.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.263 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.264 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.264 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.264 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.264 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.264 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.265 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:42.265 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:16:47.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:47.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:47.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:47.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:47.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:47.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:47.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:47.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:47.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:47.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:47.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:47.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:47.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:47.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:47.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:47.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:47.269 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:47.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:47.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:47.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:47.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:47.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:47.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:47.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:47.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:47.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:47.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:47.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:47.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:47.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:47.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:47.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:47.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:47.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:47.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:47.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:47.282 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:47.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:47.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:47.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:47.284 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:16:47.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:47.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:52.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:16:52.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:16:52.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:52.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:52.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:52.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:52.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:16:52.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:52.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:52.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:16:52.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:16:52.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:16:52.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:16:52.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:52.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:52.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:16:52.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:16:52.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:16:52.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:16:52.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:16:52.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:16:52.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:52.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:52.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:16:52.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:16:52.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:16:52.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:16:52.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:16:52.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:16:52.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:52.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:16:52.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:16:52.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:16:52.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:16:52.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:16:52.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:16:52.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:16:52.338 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:16:52.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:16:52.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:16:52.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:16:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:16:52.855 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:16:52.855 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:16:52.856 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:16:52.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:16:52.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:16:52.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:16:52.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:16:53.283 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:16:53.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:53.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:53.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:53.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:53.753 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:16:54.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:16:54.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:54.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:54.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:54.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:54.693 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:16:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:16:55.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:55.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:55.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:55.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:55.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:16:56.106 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:16:56.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:56.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:16:57.048 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:16:57.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:16:57.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:16:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:16:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:16:57.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:16:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:16:58.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:16:58.931 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:16:59.402 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:16:59.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:17:00.344 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:17:00.815 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:17:01.285 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:17:01.755 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:17:02.227 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:17:02.697 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:17:02.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:17:02.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:17:02.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:02.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:02.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:02.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:02.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:02.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:02.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:02.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:02.923 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:17:02.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:02.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:02.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.924 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.925 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:02.926 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:07.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:07.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:07.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:07.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:07.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:07.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:07.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:07.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:07.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:07.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:07.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:17:07.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:17:07.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:17:07.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:07.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:07.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:07.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:17:07.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:07.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:17:07.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:17:07.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:17:07.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:07.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:07.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:07.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:17:07.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:07.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:17:07.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:17:07.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:17:07.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:07.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:07.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:07.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:17:07.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:07.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:17:07.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:07.958 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:17:07.958 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:17:07.958 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:17:07.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:17:07.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:07.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:07.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:07.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:07.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:07.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:07.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:07.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:07.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:07.961 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:17:07.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:07.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:07.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:12.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:12.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:12.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:12.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:12.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:12.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:12.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:12.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:12.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:12.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:17:12.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:17:12.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:17:12.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:12.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:12.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:12.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:17:12.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:12.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:12.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:17:12.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:12.976 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:17:12.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:17:12.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:17:12.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:12.978 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:12.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:12.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:17:12.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:12.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:17:12.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:17:12.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:17:12.981 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:17:12.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:12.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:12.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:17:13.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:17:13.497 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:17:13.498 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:17:13.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:17:13.498 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:17:13.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:17:13.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:17:13.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:17:13.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:17:13.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:17:13.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:17:13.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:17:13.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:17:13.929 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:17:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:13.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:13.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:14.398 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:17:14.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:17:14.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:14.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:14.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:14.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:15.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:17:15.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:17:15.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:15.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:15.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:15.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:16.285 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:17:16.754 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:17:16.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:16.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:16.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:16.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:17:17.691 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:17:17.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:17.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:17.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:17.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:18.160 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:17:18.633 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:17:19.101 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:17:19.572 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:17:20.044 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:17:20.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:17:20.985 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:17:21.454 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:17:21.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:17:22.390 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:17:22.858 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:17:23.326 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:17:23.795 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:17:24.264 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:17:24.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:17:24.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:17:24.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:24.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:24.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:24.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:24.554 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:17:24.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2513 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:24.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2513 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:24.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2513 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:24.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2513 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:17:29.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:29.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:29.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:29.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:29.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:29.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:29.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:29.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:29.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:29.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:29.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:17:29.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:17:29.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:17:29.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:29.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:29.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:29.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:17:29.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:29.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:17:29.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:17:29.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:17:29.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:29.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:29.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:29.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:17:29.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:29.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:17:29.588 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:17:29.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:17:29.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:29.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:29.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:29.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:17:29.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:29.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:17:29.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:17:29.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:17:29.596 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:17:29.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:29.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:29.599 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:17:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:34.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:34.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:34.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:34.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:34.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:34.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:34.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:34.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:34.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:17:34.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:17:34.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:17:34.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:17:34.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:34.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:34.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:34.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:17:34.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:17:34.612 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:17:34.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:17:34.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:17:34.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:34.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:34.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:34.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:17:34.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:17:34.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:34.616 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:17:34.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:17:34.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:17:34.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:17:34.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:17:34.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:17:34.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:17:34.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:17:34.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:17:34.620 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:17:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:17:34.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:17:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:17:35.134 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:17:35.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:17:35.135 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:17:35.135 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:17:35.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:17:35.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:17:35.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:17:35.572 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:17:35.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:35.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:35.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:35.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:36.046 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:17:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:17:36.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:36.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:36.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:36.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:36.985 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:17:37.456 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:17:37.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:37.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:37.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:37.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:37.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:17:38.398 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:17:38.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:38.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:38.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:38.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:38.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:17:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:17:39.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:39.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:39.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:39.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:39.824 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:17:40.294 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:17:40.768 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:17:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:17:41.717 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:17:42.192 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:17:42.666 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:17:43.136 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:17:43.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:17:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:17:44.546 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:17:45.021 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:17:45.500 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:17:45.972 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:17:46.445 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:17:46.919 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:17:47.393 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:17:47.866 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:17:48.336 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:17:48.804 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:17:49.275 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:17:49.747 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:17:50.217 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:17:50.688 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:17:51.159 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:17:51.632 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:17:52.101 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:17:52.570 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:17:53.041 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:17:53.509 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:17:53.977 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:17:54.447 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:17:54.916 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:17:55.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:17:55.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:17:55.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:17:55.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:17:55.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:17:55.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:17:55.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:17:55.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:17:55.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:17:55.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:17:55.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:17:55.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:17:55.148 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:00.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:00.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:00.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:00.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:00.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:00.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:00.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:00.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:00.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:00.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:00.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:00.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:00.169 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:00.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:00.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:00.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:00.169 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:00.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:00.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:00.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:00.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:00.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:00.172 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:00.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:00.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:00.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:00.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:00.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:00.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:00.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:00.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:00.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:00.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:00.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:00.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:00.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:00.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:00.180 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:00.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:00.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:00.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:00.184 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:00.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:00.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:05.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:05.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:05.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:05.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:05.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:05.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:05.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:05.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:05.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:05.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:05.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:05.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:05.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:05.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:05.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:05.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:05.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:05.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:05.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:05.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:05.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:05.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:05.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:05.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:05.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:05.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:05.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:05.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:05.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:05.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:05.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:05.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:05.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:05.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:05.204 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:05.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:05.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:05.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:18:05.682 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:18:05.719 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:18:05.720 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:18:05.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:18:05.720 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:18:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:18:06.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:06.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:06.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:06.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:18:07.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:18:07.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:07.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:07.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:07.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:07.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:18:08.040 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:18:08.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:08.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:08.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:08.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:08.517 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:18:08.998 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:18:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:09.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:09.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:18:09.962 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:18:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:10.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:10.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:10.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:10.446 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:18:10.929 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:18:11.414 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:18:11.899 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:18:12.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:18:12.868 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:18:13.352 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:18:13.837 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:18:14.321 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:18:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:18:15.289 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:18:15.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:15.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:15.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:15.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:15.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:15.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:15.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:15.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:15.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:15.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:15.735 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:15.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.735 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:15.736 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2240 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:20.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:20.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:20.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:20.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:20.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:20.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:20.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:20.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:20.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:20.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:20.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:20.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:20.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:20.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:20.757 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:20.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:20.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:20.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:20.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:20.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:20.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:20.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:20.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:20.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:20.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:20.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:20.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:20.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:20.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:20.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:20.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:20.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:20.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:20.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:20.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:20.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:20.769 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:20.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:20.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:20.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:20.772 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:25.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:25.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:25.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:25.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:25.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:25.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:25.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:25.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:25.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:25.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:25.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:25.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:25.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:25.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:25.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:25.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:25.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:25.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:25.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:25.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:25.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:25.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:25.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:25.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:25.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:25.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:25.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:25.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:25.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:25.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:25.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:25.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:25.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:25.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:25.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:25.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:25.800 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:25.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:25.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:18:26.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:18:26.318 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:18:26.319 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:18:26.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:18:26.321 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:18:26.757 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:18:26.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:26.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:26.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:26.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:27.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:18:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:18:27.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:27.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:27.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:27.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:18:28.645 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:18:28.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:28.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:28.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:28.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:29.118 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:18:29.587 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:18:29.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:30.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:18:30.536 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:18:30.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:30.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:31.010 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:18:31.479 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:18:31.950 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:18:32.420 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:18:32.891 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:18:33.362 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:18:33.838 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:18:34.310 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:18:34.781 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:18:35.252 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:18:35.722 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:18:36.193 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:18:36.664 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:18:37.135 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:18:37.606 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:18:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:18:38.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:38.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:38.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:38.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:38.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:38.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:38.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:38.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:38.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:38.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:38.337 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:38.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2710 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:18:43.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:43.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:43.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:43.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:43.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:43.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:43.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:43.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:43.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:43.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:43.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:43.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:43.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:43.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:43.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:43.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:43.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:43.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:43.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:43.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:43.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:43.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:43.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:43.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:43.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:43.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:43.365 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:43.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:43.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:43.368 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:43.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:48.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:48.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:48.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:48.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:48.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:48.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:48.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:48.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:48.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:48.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:18:48.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:18:48.383 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:18:48.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:18:48.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:48.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:48.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:48.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:18:48.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:18:48.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:48.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:18:48.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:18:48.386 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:48.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:18:48.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:18:48.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:18:48.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:18:48.392 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:18:48.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:18:48.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:18:48.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:18:48.908 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:18:48.910 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:18:48.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:18:48.911 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:18:48.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:18:48.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:18:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:18:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:18:48.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:18:48.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:18:48.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:18:48.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:18:48.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:18:48.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:18:48.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:18:48.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:18:49.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:18:49.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:49.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:49.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:49.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:49.834 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:18:50.335 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:18:50.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:50.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:50.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:50.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:50.815 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:18:51.294 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:18:51.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:51.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:51.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:51.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:51.773 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:18:52.253 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:18:52.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:52.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:52.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:52.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:52.733 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:18:53.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:18:53.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:53.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:53.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:53.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:53.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:18:54.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:18:54.651 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:18:55.131 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:18:55.612 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:18:56.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:18:56.572 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:18:56.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:18:56.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:18:56.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:18:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:18:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:18:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:18:56.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:18:56.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:18:56.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:18:56.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:18:56.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:18:56.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:18:56.936 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:01.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:01.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:01.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:01.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:01.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:01.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:01.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:01.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:01.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:01.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:01.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:01.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:01.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:01.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:01.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:01.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:01.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:01.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:01.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:01.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:01.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:01.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:01.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:01.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:01.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:01.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:01.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:01.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:01.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:01.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:01.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:01.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:01.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:01.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:01.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:01.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:01.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:01.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:01.979 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:01.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:01.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:01.981 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:01.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:06.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:06.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:06.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:06.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:06.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:06.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:06.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:06.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:06.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:06.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:06.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:07.002 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:07.003 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:07.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:07.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:07.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:07.004 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:07.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:07.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:07.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:07.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:07.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:07.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:07.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:07.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:07.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:07.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:07.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:07.010 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:07.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:07.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:07.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:07.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:07.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:07.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:07.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:07.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:07.014 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:07.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:07.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:07.019 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:19:07.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:19:07.532 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:19:07.533 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:19:07.535 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:19:07.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:19:07.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:07.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:07.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:19:07.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:07.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:07.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:07.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:19:07.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:19:07.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:07.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:07.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:07.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:19:08.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:08.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:08.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:08.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:08.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:19:08.942 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:19:09.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:09.422 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:19:09.903 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:19:10.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:10.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:10.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:10.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:10.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:19:10.864 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:19:11.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:11.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:11.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:11.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:11.345 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:19:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:19:12.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:12.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:12.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:12.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:12.305 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:19:12.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:19:13.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:19:13.747 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:19:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:19:14.707 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:19:15.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:19:15.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:15.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:15.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:15.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:15.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:15.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:15.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:15.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:15.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:15.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:15.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:15.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:15.562 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1816 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1816 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:15.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1817 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:20.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:20.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:20.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:20.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:20.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:20.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:20.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:20.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:20.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:20.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:20.578 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:20.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:20.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:20.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:20.581 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:20.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:20.582 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:20.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:20.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:20.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:20.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:20.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:20.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:20.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:20.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:20.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:20.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:20.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:20.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:20.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:20.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:20.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:20.592 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:20.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:20.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:20.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:20.595 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:20.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:25.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:25.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:25.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:25.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:25.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:25.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:25.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:25.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:25.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:25.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:25.623 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:25.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:25.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:25.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:25.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:25.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:25.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:25.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:25.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:25.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:25.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:25.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:25.633 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:25.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:25.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:25.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:25.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:25.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:25.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:25.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:25.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:25.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:25.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:25.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:25.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:25.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:25.642 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:25.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:25.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:25.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:19:26.131 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:19:26.162 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:19:26.164 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:19:26.165 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:19:26.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:19:26.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:26.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:26.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:19:26.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:26.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:26.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:26.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:19:26.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:19:26.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:26.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:26.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:26.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:26.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:19:26.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:26.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:26.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:26.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:27.091 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:19:27.569 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:19:27.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:28.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:19:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:19:28.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:28.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:28.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:28.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:28.997 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:19:29.471 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:19:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:29.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:29.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:29.947 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:19:30.416 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:19:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:30.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:30.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:30.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:19:31.359 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:19:31.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:19:32.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:19:32.791 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:19:33.264 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:19:33.736 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:19:34.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:34.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:34.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:34.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:34.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:34.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:34.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:34.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:34.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:34.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:34.183 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:34.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:34.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:34.184 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:39.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:39.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:39.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:39.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:39.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:39.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:39.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:39.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:39.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:39.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:39.203 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:39.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:39.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:39.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:39.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:39.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:39.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:39.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:39.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:39.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:39.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:39.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:39.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:39.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:39.211 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:39.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:39.212 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:39.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:39.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:39.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:39.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:39.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:39.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:39.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:39.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:39.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:39.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:39.221 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:39.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:39.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:39.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:39.224 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:39.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:44.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:44.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:44.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:44.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:44.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:44.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:44.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:44.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:44.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:44.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:44.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:44.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:44.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:44.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:44.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:44.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:44.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:44.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:44.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:44.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:44.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:44.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:44.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:44.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:44.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:44.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:44.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:44.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:44.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:44.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:44.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:44.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:44.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:44.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:44.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:44.255 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:44.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:44.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:19:44.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:19:44.770 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:19:44.770 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:19:44.771 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:19:44.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:19:44.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:44.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:19:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:44.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:44.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:44.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:19:44.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:19:44.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:19:44.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:19:44.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:44.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:19:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:19:45.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:45.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:45.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:45.705 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:19:46.186 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:19:46.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:46.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:46.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:46.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:46.665 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:19:47.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:19:47.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:47.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:47.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:47.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:47.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:19:48.106 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:19:48.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:48.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:48.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:48.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:48.586 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:19:49.066 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:19:49.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:49.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:49.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:49.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:19:50.027 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:19:50.507 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:19:51.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:19:51.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:19:51.965 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:19:52.446 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:19:52.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:19:52.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:19:52.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:19:52.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:19:52.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:19:52.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:19:52.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:52.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:52.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:52.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:52.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:52.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:52.807 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.808 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:52.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1814 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:19:57.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:57.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:57.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:57.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:57.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:57.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:57.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:57.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:57.818 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:57.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:19:57.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:19:57.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:19:57.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:19:57.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:57.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:57.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:57.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:19:57.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:19:57.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:57.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:19:57.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:19:57.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:57.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:19:57.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:19:57.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:19:57.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:19:57.828 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:19:57.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:19:57.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:19:57.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:19:57.830 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:19:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:02.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:02.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:02.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:02.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:02.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:02.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:02.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:02.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:02.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:02.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:20:02.850 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:20:02.850 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:20:02.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:02.851 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:02.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:02.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:20:02.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:02.852 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:20:02.855 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:20:02.855 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:20:02.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:02.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:02.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:02.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:20:02.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:02.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:20:02.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:20:02.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:20:02.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:02.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:02.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:02.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:20:02.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:02.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:20:02.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:20:02.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:20:02.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:20:02.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:20:02.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:20:02.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:20:02.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:20:02.868 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:20:02.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:20:02.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:20:03.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:20:03.391 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:20:03.392 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:20:03.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:20:03.394 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:20:03.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:03.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:03.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:20:03.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:03.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:20:03.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:20:03.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:20:03.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:20:03.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:20:03.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:20:03.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:03.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:20:03.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:03.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:03.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:03.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:04.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:20:04.767 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:20:04.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:04.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:04.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:04.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:05.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:20:05.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:20:05.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:05.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:05.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:05.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:06.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:20:06.650 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:20:06.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:06.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:06.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:06.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:07.121 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:20:07.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:20:07.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:07.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:07.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:07.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:08.062 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:20:08.533 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:20:09.004 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:20:09.474 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:20:09.945 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:20:10.416 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:20:10.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:20:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:20:11.828 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:20:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:20:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:20:13.241 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:20:13.711 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:20:14.182 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:20:14.653 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:20:15.124 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:20:15.594 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:20:16.065 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:20:16.536 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:20:17.007 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:20:17.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:17.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:17.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:17.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:17.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:17.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:17.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:17.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:17.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:17.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:17.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:17.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:17.468 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3161 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.468 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:17.469 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3162 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:22.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:22.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:22.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:22.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:22.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:22.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:22.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:22.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:22.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:22.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:22.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:20:22.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:20:22.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:20:22.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:22.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:22.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:22.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:20:22.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:22.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:20:22.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:20:22.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:20:22.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:22.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:22.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:22.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:20:22.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:22.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:22.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:20:22.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:22.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:20:22.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:20:22.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:20:22.495 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:20:22.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:22.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:22.498 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:22.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:27.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:27.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:27.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:27.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:27.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:27.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:27.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:27.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:27.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:27.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:20:27.522 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:20:27.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:20:27.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:27.523 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:27.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:27.524 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:20:27.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:27.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:20:27.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:20:27.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:20:27.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:27.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:27.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:27.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:20:27.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:27.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:20:27.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:20:27.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:20:27.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:27.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:27.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:27.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:20:27.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:27.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:20:27.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:20:27.537 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:20:27.537 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:20:27.537 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:27.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:27.542 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:20:28.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:20:28.053 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:20:28.053 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:20:28.054 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:20:28.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:20:28.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:28.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:28.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:20:28.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:28.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:20:28.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:20:28.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:20:28.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:20:28.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:20:28.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:20:28.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:28.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:28.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:20:28.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:28.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:28.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:28.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:28.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:20:29.482 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:20:29.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:29.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:29.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:29.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:29.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:20:30.447 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:20:30.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:30.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:30.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:30.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:30.929 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:20:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:20:31.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:31.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:31.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:31.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:31.903 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:20:32.388 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:20:32.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:32.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:32.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:32.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:20:33.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:20:33.829 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:20:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:20:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:20:35.281 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:20:35.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:20:36.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:36.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:36.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:36.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:36.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:36.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:36.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:36.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:36.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:36.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:36.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:36.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:36.085 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:36.085 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1805 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:41.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:41.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:41.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:41.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:41.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:41.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:41.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:41.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:41.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:41.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:41.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:20:41.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:20:41.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:20:41.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:41.108 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:41.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:41.109 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:20:41.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:41.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:20:41.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:20:41.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:20:41.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:41.112 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:41.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:41.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:20:41.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:41.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:20:41.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:20:41.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:20:41.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:41.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:41.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:41.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:20:41.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:41.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:20:41.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:20:41.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:20:41.119 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:20:41.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:41.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:41.122 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:41.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:46.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:46.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:46.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:46.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:46.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:46.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:46.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:46.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:46.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:46.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:20:46.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:20:46.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:20:46.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:20:46.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:46.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:46.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:46.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:20:46.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:20:46.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:20:46.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:20:46.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:20:46.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:46.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:46.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:46.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:20:46.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:20:46.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:20:46.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:20:46.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:20:46.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:46.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:20:46.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:46.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:20:46.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:20:46.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:20:46.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:20:46.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:20:46.164 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:20:46.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:20:46.164 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:20:46.164 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:20:46.164 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:20:46.165 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:20:46.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:20:46.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:20:46.658 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:20:46.687 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:20:46.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:20:46.690 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:20:46.692 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:20:46.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:46.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:46.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:20:46.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:20:46.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:20:46.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:20:46.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:20:46.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:20:47.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:20:47.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:47.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:47.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:47.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:47.623 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:20:48.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:20:48.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:48.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:48.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:48.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:20:49.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:20:49.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:49.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:49.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:49.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:49.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:20:50.061 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:20:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:50.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:50.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:50.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:50.546 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:20:51.032 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:20:51.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:51.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:51.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:51.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:20:52.000 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:20:52.479 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:20:52.963 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:20:53.447 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:20:53.933 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:20:54.413 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:20:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:20:55.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:20:55.857 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:20:56.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:20:56.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:20:56.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:20:56.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:20:56.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:20:56.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:20:56.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:20:56.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:20:56.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:20:56.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:20:56.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:20:56.713 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:20:56.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:20:56.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:20:56.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:01.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:01.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:01.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:01.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:01.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:01.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:01.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:01.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:01.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:01.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:01.732 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:01.734 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:01.734 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:01.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:01.735 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:01.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:01.736 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:01.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:01.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:01.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:01.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:01.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:01.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:01.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:01.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:01.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:01.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:01.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:01.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:01.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:01.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:01.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:01.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:01.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:01.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:01.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:01.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:01.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:01.751 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:01.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:01.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:01.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:01.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:01.755 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:21:01.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:01.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:06.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:06.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:06.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:06.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:06.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:06.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:06.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:06.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:06.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:06.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:06.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:06.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:06.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:06.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:06.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:06.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:06.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:06.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:06.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:06.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:06.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:06.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:06.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:06.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:06.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:06.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:06.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:06.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:06.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:06.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:06.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:06.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:06.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:06.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:06.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:06.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:06.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:06.786 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:06.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:06.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:21:07.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:21:07.302 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:21:07.304 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:21:07.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:21:07.305 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:21:07.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:21:07.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:21:07.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:21:07.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:21:07.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:21:07.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:21:07.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:21:07.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:21:07.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:21:07.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:21:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:21:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:21:07.767 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:21:07.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:07.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:07.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:07.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:08.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:21:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:21:08.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:08.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:08.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:08.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:09.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:21:09.709 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:21:09.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:09.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:09.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:09.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:10.196 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:21:10.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:21:10.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:10.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:10.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:10.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:11.168 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:21:11.653 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:21:11.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:11.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:11.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:11.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:12.138 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:21:12.625 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:21:13.111 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:21:13.596 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:21:14.082 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:21:14.568 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:21:15.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:21:15.537 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:21:16.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:21:16.509 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:21:16.995 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:21:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:21:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:21:18.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:21:18.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:21:18.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:18.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:18.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:18.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:18.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:18.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:18.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:18.337 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:21:18.337 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2427 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:18.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:18.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2427 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2427 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2427 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2427 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:18.338 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2428 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:21:23.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:23.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:23.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:23.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:23.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:23.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:23.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:23.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:23.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:23.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:23.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:23.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:23.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:23.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:23.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:23.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:23.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:23.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:23.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:23.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:23.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:23.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:23.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:23.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:23.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:23.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:23.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:23.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:23.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:23.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:23.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:23.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:23.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:23.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:23.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:23.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:23.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:23.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:23.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:23.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:23.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:23.372 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:23.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:23.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:23.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:23.375 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:21:23.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:23.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:28.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:28.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:28.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:28.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:28.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:28.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:28.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:28.394 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:28.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:28.395 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:28.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:28.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:28.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:28.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:28.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:28.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:28.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:28.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:28.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:28.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:28.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:28.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:28.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:28.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:28.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:28.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:28.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:28.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:28.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:28.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:28.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:28.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:28.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:28.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:28.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:28.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:28.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:28.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:28.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:28.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:28.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:28.421 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:28.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:21:28.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:21:28.939 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:21:28.940 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:21:28.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:21:28.942 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:21:29.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:21:29.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:29.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:29.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:29.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:29.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:21:30.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:21:30.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:30.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:30.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:30.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:30.849 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:21:31.333 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:21:31.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:31.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:31.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:31.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:31.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:21:32.300 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:21:32.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:32.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:32.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:32.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:32.784 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:21:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:21:33.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:33.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:33.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:33.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:33.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:21:34.234 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:21:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:21:35.200 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:21:35.683 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:21:36.166 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:21:36.649 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:21:37.130 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:21:37.612 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:21:38.097 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:21:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:21:38.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:38.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:38.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:38.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:38.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:38.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:38.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:38.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:38.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:38.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:38.954 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:21:43.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:43.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:43.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:43.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:43.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:43.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:43.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:43.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:43.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:43.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:43.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:44.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:44.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:44.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:44.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:44.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:44.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:44.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:44.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:44.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:44.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:44.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:44.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:44.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:44.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:44.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:44.010 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:44.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:44.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:44.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:44.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:44.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:44.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:44.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:44.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:44.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:44.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:44.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:44.019 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:44.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:44.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:44.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:44.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:44.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:44.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:44.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:44.021 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:21:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:21:49.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:21:49.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:49.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:49.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:49.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:49.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:21:49.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:49.059 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:49.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:21:49.060 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:21:49.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:21:49.063 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:21:49.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:49.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:49.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:21:49.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:21:49.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:21:49.065 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:21:49.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:21:49.066 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:21:49.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:49.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:49.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:21:49.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:21:49.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:21:49.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:21:49.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:21:49.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:21:49.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:49.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:21:49.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:21:49.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:21:49.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:21:49.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:21:49.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:21:49.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:21:49.073 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:21:49.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:21:49.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:21:49.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:21:49.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:21:49.592 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:21:49.593 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:21:49.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:21:49.595 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:21:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:21:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:50.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:50.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:50.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:21:51.000 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:21:51.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:51.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:51.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:51.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:51.480 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:21:51.959 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:21:52.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:52.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:52.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:52.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:52.439 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:21:52.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:21:53.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:53.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:53.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:53.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:53.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:21:53.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:21:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:21:54.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:21:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:21:54.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:21:54.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:21:54.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:21:55.310 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:21:55.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:21:56.255 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:21:56.727 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:21:57.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:21:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:21:58.149 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:21:58.620 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:21:59.091 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:21:59.563 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:22:00.038 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:22:00.510 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:22:00.978 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:22:01.447 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:22:01.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:01.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:01.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:01.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:01.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:01.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:01.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:01.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:01.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:01.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:01.613 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:01.613 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2690 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:06.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:06.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:06.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:06.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:06.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:06.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:06.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:06.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:06.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:06.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:06.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:22:06.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:22:06.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:22:06.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:06.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:06.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:06.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:22:06.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:06.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:06.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:22:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:06.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:06.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:22:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:06.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:22:06.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:22:06.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:22:06.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:22:06.624 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:22:06.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:22:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:22:07.137 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:22:07.138 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:22:07.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:07.138 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:22:07.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:07.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:07.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:07.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:07.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:07.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:07.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:07.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:22:07.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:07.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:07.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:07.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:08.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:22:08.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:22:08.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:08.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:08.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:08.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:08.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:22:09.458 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:22:09.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:09.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:09.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:09.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:09.928 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:22:10.399 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:22:10.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:10.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:10.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:10.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:10.869 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:22:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:22:11.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:11.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:11.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:11.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:11.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:22:12.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:22:12.758 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:22:13.228 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:22:13.699 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:22:14.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:22:14.648 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:22:15.123 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:22:15.595 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:22:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:22:16.537 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:22:17.009 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:22:17.485 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:22:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:22:18.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:18.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:18.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:18.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:18.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:18.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:18.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:18.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:18.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:18.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:18.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:18.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:18.148 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:22:23.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:23.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:23.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:23.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:23.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:23.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:23.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:23.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:23.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:23.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:23.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:22:23.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:22:23.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:22:23.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:23.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:23.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:23.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:22:23.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:23.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:22:23.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:22:23.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:22:23.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:23.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:23.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:23.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:22:23.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:23.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:22:23.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:22:23.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:22:23.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:23.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:23.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:22:23.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:23.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:23.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:22:23.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:22:23.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:22:23.197 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:22:23.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:23.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:23.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:22:23.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:22:23.718 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:22:23.720 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:22:23.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:23.721 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:22:23.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:23.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:23.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:23.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:23.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:23.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:23.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:23.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:24.149 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:22:24.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:24.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:24.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:24.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:24.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:22:25.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:22:25.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:25.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:25.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:25.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:25.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:22:26.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:22:26.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:26.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:26.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:26.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:26.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:22:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:22:27.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:27.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:27.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:27.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:27.453 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:22:27.927 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:22:28.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:28.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:28.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:28.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:28.396 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:22:28.869 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:22:29.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:22:29.821 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:22:30.295 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:22:30.763 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:22:31.236 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:22:31.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:22:32.177 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:22:32.647 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:22:33.121 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:22:33.597 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:22:34.069 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:22:34.541 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:22:35.010 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:22:35.477 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:22:35.946 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:22:36.415 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:22:36.886 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:22:37.359 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:22:37.832 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:22:38.303 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:22:38.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:38.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:38.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:38.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:38.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:38.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:38.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:38.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:38.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:38.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:38.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:38.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:38.772 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:38.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:43.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:43.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:43.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:43.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:43.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:43.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:43.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:43.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:43.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:43.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:43.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:22:43.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:22:43.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:22:43.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:43.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:43.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:43.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:22:43.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:43.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:22:43.794 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:22:43.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:22:43.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:43.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:43.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:43.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:22:43.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:43.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:22:43.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:22:43.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:22:43.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:43.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:43.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:43.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:22:43.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:43.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:22:43.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:22:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:22:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:22:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:22:43.801 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:22:43.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:22:43.802 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:22:43.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:43.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:22:44.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:22:44.324 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:22:44.325 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:22:44.326 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:22:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:44.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:44.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:44.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:44.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:44.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:44.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:44.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:44.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:44.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:44.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:44.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:44.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:44.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:44.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:44.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:44.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:44.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:44.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:44.399 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:22:44.399 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:44.400 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.400 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.400 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.403 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:44.404 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:49.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:49.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:49.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:49.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:49.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:49.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:49.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:49.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:49.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:49.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:49.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:22:49.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:22:49.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:22:49.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:49.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:49.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:49.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:22:49.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:49.416 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:22:49.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:22:49.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:22:49.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:49.418 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:49.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:49.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:22:49.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:49.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:22:49.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:22:49.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:22:49.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:49.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:49.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:49.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:22:49.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:49.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:22:49.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:22:49.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:22:49.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:22:49.425 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:22:49.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:49.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:49.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:49.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:22:49.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:22:49.939 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:22:49.939 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:22:49.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:49.940 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:22:49.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:49.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:49.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:49.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:49.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:49.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:49.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:49.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:49.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:49.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:49.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:49.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:49.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:49.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:49.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:49.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:50.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:50.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:50.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:50.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:22:50.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:50.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:50.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:50.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:50.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:50.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:50.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:50.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:50.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:50.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:50.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:50.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:50.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:22:51.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:51.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:51.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:51.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:51.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:51.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:51.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:51.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:51.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:51.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:51.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:51.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:51.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:51.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:51.177 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:22:51.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=377 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:51.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=377 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:51.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=377 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:51.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=377 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:51.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=377 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:22:56.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:22:56.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:22:56.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:56.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:56.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:56.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:56.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:22:56.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:56.200 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:56.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:22:56.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:22:56.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:22:56.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:22:56.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:56.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:56.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:22:56.203 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:22:56.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:22:56.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:22:56.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:22:56.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:22:56.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:56.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:56.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:22:56.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:22:56.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:22:56.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:56.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:22:56.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:22:56.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:22:56.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:22:56.210 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:22:56.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:22:56.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:22:56.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:22:56.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:22:56.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:22:56.725 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:22:56.725 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:22:56.725 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:22:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:56.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:56.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:56.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:56.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:22:56.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:22:56.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:22:56.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:22:56.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:56.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:56.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:56.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:22:56.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:22:56.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:22:56.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:22:56.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:56.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:22:57.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:22:57.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:57.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:57.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:57.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:57.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:22:58.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:22:58.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:58.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:58.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:22:59.049 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:22:59.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:22:59.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:22:59.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:22:59.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:22:59.518 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:22:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:23:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:00.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:00.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:00.459 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:23:00.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:23:01.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:01.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:01.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:01.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:01.402 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:23:01.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:01.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:01.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:01.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:01.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:01.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:01.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:01.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:01.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:01.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:01.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:01.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:01.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:01.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:01.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:01.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:01.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:01.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:01.872 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:23:02.343 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:23:02.814 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:23:03.285 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:23:03.755 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:23:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:23:04.700 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:23:05.170 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:23:05.646 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:23:06.116 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:23:06.593 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:23:06.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:06.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:06.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:06.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:06.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:06.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:06.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:06.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:06.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:06.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:06.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:06.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:06.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:06.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:06.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:06.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:06.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:06.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:06.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:06.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:07.069 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:23:07.544 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:23:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:23:08.497 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:23:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:23:09.445 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:23:09.919 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:23:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:23:10.859 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:23:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:23:11.804 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:23:11.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:11.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:11.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:11.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:11.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:11.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:11.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:11.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:11.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:11.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:11.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:11.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:11.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:11.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:11.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:11.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:11.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:11.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:11.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:11.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:12.280 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:23:12.755 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:23:13.224 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:23:13.698 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:23:14.174 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:23:14.647 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:23:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:23:15.591 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:23:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:23:16.536 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:23:16.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:16.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:16.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:17.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:17.006 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:23:17.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:17.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:17.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:17.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:17.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:17.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:17.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:17.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:17.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:23:17.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:23:17.024 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:23:17.024 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:17.025 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:17.025 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:17.025 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:22.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:23:22.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:23:22.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:22.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:22.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:22.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:22.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:22.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:23:22.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:22.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:23:22.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:23:22.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:23:22.034 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:23:22.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:23:22.034 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:22.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:22.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:23:22.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:23:22.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:23:22.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:23:22.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:23:22.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:23:22.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:22.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:22.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:23:22.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:23:22.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:23:22.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:23:22.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:23:22.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:23:22.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:22.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:22.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:23:22.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:23:22.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:23:22.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:23:22.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:23:22.046 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:23:22.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:22.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:22.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:22.051 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:23:22.529 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:23:22.559 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:23:22.559 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:23:22.560 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:23:22.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:22.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:22.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:22.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:22.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:22.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:22.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:22.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:22.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:22.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:22.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:22.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:22.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:22.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:22.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:22.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:22.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:23.002 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:23:23.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:23.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:23:23.951 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:23:24.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:24.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:24.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:24.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:24.422 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:23:24.893 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:23:25.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:25.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:25.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:25.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:25.364 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:23:25.835 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:23:26.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:26.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:26.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:26.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:26.307 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:23:26.781 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:23:27.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:27.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:27.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:27.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:27.252 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:23:27.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:27.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:27.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:27.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:27.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:27.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:27.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:27.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:27.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:27.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:27.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:27.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:27.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:27.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:27.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:27.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:27.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:27.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:27.720 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:23:28.192 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:23:28.666 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:23:29.135 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:23:29.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:23:30.076 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:23:30.545 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:23:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:23:31.485 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:23:31.959 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:23:32.431 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:23:32.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:32.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:32.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:32.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:32.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:32.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:32.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:32.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:32.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:32.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:32.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:32.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:32.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:32.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:32.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:32.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:32.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:32.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:32.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:32.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:32.903 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:23:33.374 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:23:33.844 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:23:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:23:34.786 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:23:35.263 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:23:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:23:36.207 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:23:36.677 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:23:37.148 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:23:37.619 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:23:37.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:37.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:37.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:37.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:37.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:37.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:37.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:37.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:37.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:37.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:37.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:37.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:37.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:37.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:37.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:37.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:37.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:37.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:37.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:37.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:38.094 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:23:38.572 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:23:39.053 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:23:39.533 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:23:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:23:40.491 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:23:40.971 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:23:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:23:41.930 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:23:42.408 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:23:42.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:42.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:42.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:42.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:42.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:42.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:42.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:42.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:23:42.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:23:42.780 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:23:42.780 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:42.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:42.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:42.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:42.781 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:42.781 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:42.781 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:23:47.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:23:47.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:23:47.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:47.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:47.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:47.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:47.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:23:47.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:23:47.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:47.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:23:47.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:23:47.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:23:47.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:23:47.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:23:47.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:47.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:23:47.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:23:47.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:23:47.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:23:47.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:23:47.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:23:47.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:23:47.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:23:47.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:23:47.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:23:47.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:23:47.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:23:47.789 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:23:47.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:23:47.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:23:47.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:23:48.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:23:48.302 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:23:48.303 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:23:48.303 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:23:48.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:48.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:48.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:48.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:48.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:48.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:48.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:48.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:48.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:48.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:48.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:48.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:48.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:48.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:48.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:48.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:48.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:48.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:23:48.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:48.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:48.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:48.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:49.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:23:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:23:49.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:49.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:49.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:49.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:50.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:23:50.632 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:23:50.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:50.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:50.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:50.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:51.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:23:51.573 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:23:51.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:51.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:51.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:51.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:23:52.514 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:23:52.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:23:52.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:23:52.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:23:52.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:23:52.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:23:53.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:53.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:53.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:53.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:53.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:53.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:53.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:53.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:53.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:53.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:53.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:53.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:53.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:53.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:53.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:53.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:53.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:53.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:53.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:53.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:53.451 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:23:53.921 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:23:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:23:54.861 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:23:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:23:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:23:56.272 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:23:56.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:23:57.216 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:23:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:23:58.165 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:23:58.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:58.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:58.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:58.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:58.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:58.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:58.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:58.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:23:58.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:23:58.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:23:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:23:58.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:58.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:58.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:58.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:23:58.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:23:58.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:23:58.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:23:58.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:58.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:23:58.637 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:23:59.106 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:23:59.574 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:24:00.045 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:24:00.515 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:24:00.993 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:24:01.465 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:24:01.936 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:24:02.407 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:24:02.877 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:24:03.344 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:24:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:03.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:03.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:03.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:03.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:03.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:03.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:03.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:03.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:03.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:03.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:03.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:03.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:03.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:03.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:03.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:03.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:03.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:03.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:03.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:03.812 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:24:04.281 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:24:04.752 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:24:05.222 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:24:05.693 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:24:06.164 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:24:06.635 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:24:07.105 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:24:07.575 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:24:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:24:08.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:08.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:08.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:08.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:08.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:08.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:08.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:08.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:08.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:08.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:08.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:08.488 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:24:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:08.488 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:08.489 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:08.489 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:08.489 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:08.489 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:08.489 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:13.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:13.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:13.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:13.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:13.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:13.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:13.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:13.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:13.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:13.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:13.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:13.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:24:13.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:13.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:13.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:24:13.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:13.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:13.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:24:13.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:13.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:24:13.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:24:13.507 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:24:13.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:13.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:13.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:13.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:13.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:24:13.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:24:14.019 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:24:14.019 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:24:14.020 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:24:14.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:14.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:14.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:14.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:14.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:14.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:14.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:14.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:14.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:14.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:14.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:14.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:14.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:14.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:14.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:14.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:14.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:14.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:24:14.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:14.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:24:15.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:24:15.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:15.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:15.857 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:24:16.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:24:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:16.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:16.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:16.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:24:17.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:24:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:17.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:17.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:17.738 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:24:18.208 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:24:18.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:18.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:18.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:18.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:18.677 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:24:19.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:19.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:19.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:19.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:19.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:19.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:19.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:19.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:19.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:19.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:19.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:19.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:19.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:19.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:19.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:19.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:19.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:19.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:19.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:19.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:19.148 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:24:19.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:24:20.088 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:24:20.558 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:24:21.030 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:24:21.500 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:24:21.970 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:24:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:24:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:24:23.377 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:24:23.848 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:24:24.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:24.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:24.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:24.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:24.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:24.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:24.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:24.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:24.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:24.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:24.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:24.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:24.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:24.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:24.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:24.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:24.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:24.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:24.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:24.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:24.318 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:24:24.786 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:24:25.255 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:24:25.729 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:24:26.200 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:24:26.668 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:24:27.137 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:24:27.605 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:24:28.075 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:24:28.545 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:24:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:24:29.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:29.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:29.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:29.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:29.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:29.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:29.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:29.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:29.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:29.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:29.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:29.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:29.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:29.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:29.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:29.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:29.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:29.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:29.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:29.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:29.484 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:24:29.952 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:24:30.425 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:24:30.894 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:24:31.365 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:24:31.835 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:24:32.306 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:24:32.777 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:24:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:24:33.725 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:24:34.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:34.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:34.199 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:24:34.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:34.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:34.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:34.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:34.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:34.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:34.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:34.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:34.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:34.218 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:24:39.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:39.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:39.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:39.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:39.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:39.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:39.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:39.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:39.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:39.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:39.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:24:39.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:24:39.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:24:39.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:39.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:39.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:39.233 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:24:39.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:39.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:24:39.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:24:39.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:24:39.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:39.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:39.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:39.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:24:39.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:39.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:39.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:24:39.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:39.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:24:39.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:24:39.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:24:39.241 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:24:39.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:39.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:39.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:24:39.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:24:39.756 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:24:39.757 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:24:39.758 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:24:39.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:39.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:39.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:39.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:39.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:39.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:39.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:39.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:39.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:39.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:39.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:39.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:39.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:39.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:39.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:39.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:40.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:40.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:40.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:40.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:40.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:40.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:40.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:40.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:40.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:40.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.198 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:24:40.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:40.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:40.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:40.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:40.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:40.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:40.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:40.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:40.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:40.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:40.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:40.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:40.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:40.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:40.669 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:24:41.139 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:24:41.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:41.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:41.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:41.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:41.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:41.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:41.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:41.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:41.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:41.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:41.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:41.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:41.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:41.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:41.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:41.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:41.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:41.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:41.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:41.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:41.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:41.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:41.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:41.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:41.610 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:24:42.081 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:24:42.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:42.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:42.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:42.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:42.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:42.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:42.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:42.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:42.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:42.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:42.175 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=634 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:42.176 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:24:47.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:24:47.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:24:47.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:47.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:47.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:47.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:47.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:24:47.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:47.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:47.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:24:47.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:24:47.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:24:47.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:24:47.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:47.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:47.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:24:47.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:24:47.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:24:47.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:24:47.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:24:47.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:24:47.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:47.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:47.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:24:47.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:24:47.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:24:47.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:24:47.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:24:47.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:24:47.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:47.209 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:24:47.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:24:47.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:24:47.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:24:47.210 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:24:47.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:24:47.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:24:47.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:24:47.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:24:47.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:24:47.216 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:24:47.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:24:47.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:24:47.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:24:47.703 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:24:47.733 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:24:47.733 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:24:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:47.734 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:24:47.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:47.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:47.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:47.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:24:47.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:24:47.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:24:47.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:24:47.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:47.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:47.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:47.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:24:47.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:24:47.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:24:47.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:24:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:24:48.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:24:48.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:48.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:48.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:48.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:24:49.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:24:49.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:49.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:49.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:49.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:49.585 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:24:50.055 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:24:50.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:50.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:50.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:50.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:50.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:24:50.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:24:51.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:51.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:51.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:51.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:51.468 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:24:51.939 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:24:52.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:24:52.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:24:52.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:24:52.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:24:52.409 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:24:52.880 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:24:53.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:24:53.821 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:24:54.292 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:24:54.763 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:24:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:24:55.705 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:24:56.175 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:24:56.646 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:24:57.117 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:24:57.588 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:24:58.058 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:24:58.529 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:24:59.000 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:24:59.471 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:24:59.942 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:25:00.412 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:25:00.883 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:25:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:25:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:25:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:25:02.766 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:25:03.237 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:25:03.708 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:25:04.179 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:25:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:25:05.120 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:25:05.591 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:25:06.061 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:25:06.532 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:25:07.003 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:25:07.474 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:25:07.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:07.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:07.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:07.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:07.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:07.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:07.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:07.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:07.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:07.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:07.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:07.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:07.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:07.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:07.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:25:07.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:25:07.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:07.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:07.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:07.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:07.945 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:25:08.415 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:25:08.886 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:25:09.357 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:25:09.828 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:25:10.298 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:25:10.769 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:25:11.240 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:25:11.711 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:25:12.182 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:25:12.652 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:25:13.123 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:25:13.594 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:25:14.065 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:25:14.535 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:25:15.006 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:25:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:25:15.948 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:25:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:25:16.889 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:25:17.360 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:25:17.831 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:25:18.302 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:25:18.772 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:25:19.243 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:25:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:25:20.185 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:25:20.655 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:25:21.126 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:25:21.597 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:25:22.068 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:25:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:25:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:25:23.480 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:25:23.951 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:25:24.422 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:25:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:25:25.363 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:25:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:25:26.305 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:25:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:25:27.246 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:25:27.717 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:25:27.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:27.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:27.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:27.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:27.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:27.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:27.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:27.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:27.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:27.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:27.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:27.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:27.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:27.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:27.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:25:27.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:25:27.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:27.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:27.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:27.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:25:28.658 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:25:29.129 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:25:29.600 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:25:30.071 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:25:30.542 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:25:31.012 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:25:31.483 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:25:31.954 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:25:32.424 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:25:32.895 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:25:33.366 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:25:33.837 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:25:34.308 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:25:34.778 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:25:35.249 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:25:35.720 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:25:36.191 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:25:36.662 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:25:37.132 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:25:37.603 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:25:38.073 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:25:38.544 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:25:39.015 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:25:39.486 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:25:39.957 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:25:40.428 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:25:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:25:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:25:41.840 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:25:42.311 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:25:42.781 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:25:43.252 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:25:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:25:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:25:44.664 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:25:45.135 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:25:45.606 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:25:46.077 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:25:46.548 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:25:47.018 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:25:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:25:47.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:47.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:47.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:47.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:47.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:47.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:47.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:47.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:25:47.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:25:47.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:25:47.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:25:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:47.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:47.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:47.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:25:47.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:25:47.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:25:47.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:25:47.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:47.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:25:47.960 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:25:48.431 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:25:48.902 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:25:49.372 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 04:25:49.843 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 04:25:50.314 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 04:25:50.785 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 04:25:51.255 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 04:25:51.726 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 04:25:52.197 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 04:25:52.668 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 04:25:53.139 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 04:25:53.609 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 04:25:54.080 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 04:25:54.551 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 04:25:55.020 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 04:25:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 04:25:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 04:25:56.434 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 04:25:56.905 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 04:25:57.375 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 04:25:57.846 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 04:25:58.317 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 04:25:58.788 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 04:25:59.258 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 04:25:59.729 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 04:26:00.200 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 04:26:00.671 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 04:26:01.142 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 04:26:01.612 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 04:26:02.083 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 04:26:02.554 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 04:26:03.024 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 04:26:03.495 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 04:26:03.966 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 04:26:04.437 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 04:26:04.908 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 04:26:05.378 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 04:26:05.849 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 04:26:06.320 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 04:26:06.791 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 04:26:07.262 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 04:26:07.732 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 04:26:07.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:07.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:07.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:07.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:07.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:07.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:07.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:07.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:07.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:07.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:07.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:07.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:07.975 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:26:07.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:07.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:07.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:12.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:12.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:12.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:12.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:12.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:12.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:12.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:12.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:12.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:12.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:12.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:26:12.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:26:12.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:26:12.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:13.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:13.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:13.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:26:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:13.002 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:26:13.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:26:13.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:26:13.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:13.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:13.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:13.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:26:13.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:13.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:26:13.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:26:13.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:26:13.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:13.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:13.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:13.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:26:13.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:13.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:26:13.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:26:13.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:26:13.013 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:26:13.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:13.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:13.016 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:13.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:18.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:18.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:18.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:18.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:18.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:18.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:18.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:18.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:26:18.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:26:18.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:26:18.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:18.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:18.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:18.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:26:18.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:18.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:26:18.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:26:18.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:26:18.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:18.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:18.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:18.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:26:18.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:18.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:18.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:26:18.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:18.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:26:18.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:26:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:26:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:26:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:26:18.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:26:18.051 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:26:18.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:26:18.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:26:18.568 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:26:18.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:18.570 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:26:18.571 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:26:18.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:18.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:18.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:18.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:18.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:18.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:18.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:18.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:18.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:18.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:18.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:18.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:18.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:18.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:18.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:18.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:18.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:18.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:18.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:18.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:18.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:18.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:18.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:18.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:18.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:18.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:18.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:18.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:26:19.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:19.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:19.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:19.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:19.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:19.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:19.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:19.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:19.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:19.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:19.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:19.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.493 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:26:19.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:19.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:19.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:19.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:19.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:19.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:19.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:19.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:19.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:19.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:19.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:19.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:19.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:26:20.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:20.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:20.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:20.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:20.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:20.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:20.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:20.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:20.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:20.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:20.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:20.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:20.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:20.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:20.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:20.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:20.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:20.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:20.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:20.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:20.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:20.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:20.460 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:26:20.939 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:26:21.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:21.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:21.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:21.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:21.418 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:26:21.895 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:26:22.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:22.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:22.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:22.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:22.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:26:22.858 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:26:23.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:23.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:23.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:23.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:23.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:23.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:23.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:23.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:23.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:23.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:23.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:23.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:23.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:23.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:23.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:23.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:23.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:23.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:23.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:23.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:23.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:26:23.816 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:26:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:26:24.783 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:26:25.266 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:26:25.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:25.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:25.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:25.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:25.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:25.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:25.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:25.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:25.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:25.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:25.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:25.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:25.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:25.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:25.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:25.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:25.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:25.749 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:26:26.234 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:26:26.721 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:26:27.200 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:26:27.683 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:26:28.164 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:26:28.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:28.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:28.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:28.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:28.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:28.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:28.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:28.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:28.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:28.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:28.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:28.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:28.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:28.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:28.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:28.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:28.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:28.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:28.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:28.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:28.648 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:26:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:26:29.616 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:26:30.098 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:26:30.584 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:26:30.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:30.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:30.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:30.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:30.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:30.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:30.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:30.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:30.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:30.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:30.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:30.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:30.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:30.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:30.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:30.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:31.067 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:26:31.553 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:26:32.038 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:26:32.522 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:26:33.001 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:26:33.485 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:26:33.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:33.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:33.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:33.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:33.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:33.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:33.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:33.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:33.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:33.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:33.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:33.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:33.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:33.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:33.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:33.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:33.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:33.961 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:26:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:26:34.931 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:26:35.418 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:26:35.902 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:26:36.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:36.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:36.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:36.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:36.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:36.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:36.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:36.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:36.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:36.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:36.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:36.232 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:26:41.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:41.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:41.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:41.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:41.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:41.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:41.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:41.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:41.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:41.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:41.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:26:41.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:26:41.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:26:41.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:41.253 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:41.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:41.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:26:41.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:41.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:41.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:26:41.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:41.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:41.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:26:41.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:41.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:26:41.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:26:41.262 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:26:41.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:41.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:41.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:26:41.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:26:41.779 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:26:41.780 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:26:41.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:41.780 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:26:41.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:41.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:41.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:41.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:41.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:41.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:41.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:41.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:41.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:41.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:41.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:41.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:41.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:41.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:41.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:41.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:42.240 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:26:42.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:42.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:42.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:26:43.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:26:43.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:43.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:43.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:43.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:43.694 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:26:44.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:26:44.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:44.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:44.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:44.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:26:44.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:44.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:44.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:44.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:44.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:44.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:44.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:44.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:44.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:44.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:44.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:44.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:44.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:44.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:44.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:44.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:45.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:45.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:45.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:45.146 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:26:45.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:45.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:45.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:45.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:45.631 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:26:46.115 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:26:46.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:46.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:46.599 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:26:47.083 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:26:47.558 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:26:48.045 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:26:48.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:48.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:48.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:48.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:48.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:48.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:48.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:48.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:48.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:48.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:48.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:48.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:48.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:48.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:48.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:48.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:48.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:48.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:48.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:48.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:48.525 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:26:49.008 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:26:49.487 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:26:49.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:26:50.452 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:26:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:26:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:26:51.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:51.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:51.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:51.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:51.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:51.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:51.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:51.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:51.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:26:51.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:51.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:51.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:51.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:51.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:26:51.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:26:51.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:26:51.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:26:51.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:51.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:51.896 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:26:52.379 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:26:52.861 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:26:53.347 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:26:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:26:54.315 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:26:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:26:54.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:26:54.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:26:54.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:26:54.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:26:54.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:26:54.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:26:54.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:26:54.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:26:54.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:54.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:54.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:54.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:54.823 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:26:54.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:54.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:54.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:26:59.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:26:59.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:26:59.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:59.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:59.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:59.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:59.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:26:59.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:59.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:59.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:26:59.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:26:59.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:26:59.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:26:59.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:59.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:59.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:26:59.849 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:26:59.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:26:59.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:26:59.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:26:59.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:26:59.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:59.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:59.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:26:59.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:26:59.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:26:59.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:26:59.856 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:26:59.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:26:59.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:59.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:26:59.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:26:59.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:26:59.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:26:59.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:26:59.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:26:59.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:26:59.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:26:59.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.862 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:26:59.862 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:26:59.862 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:26:59.862 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:26:59.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:26:59.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:26:59.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:27:00.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:27:00.381 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:27:00.381 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:27:00.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:00.382 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:27:00.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:00.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:00.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:00.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:00.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:00.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:00.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:00.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:00.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:00.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:00.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:00.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:00.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:00.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:00.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:00.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:00.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:00.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:00.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:00.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:00.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:00.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:00.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:00.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:00.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:00.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:00.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:00.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:00.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:27:00.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:00.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:00.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:00.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:01.320 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:27:01.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:01.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:01.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:01.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:01.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:01.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:01.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:01.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:01.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:01.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:01.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:01.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:01.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:01.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:01.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:01.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:01.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:01.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:01.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:01.799 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:27:01.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:01.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:01.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:01.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:02.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:27:02.749 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:27:02.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:02.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:02.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:03.227 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:27:03.714 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:27:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:03.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:03.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:03.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:27:04.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:04.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:04.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:04.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:04.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:04.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:04.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:04.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:04.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:04.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:04.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:04.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:04.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:04.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:04.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:04.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:04.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:04.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:04.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:04.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:04.668 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:27:04.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:05.142 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:27:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:27:06.099 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:27:06.576 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:27:07.050 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:27:07.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:07.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:07.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:07.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:07.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:07.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:07.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:07.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:07.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:07.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:07.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:07.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:07.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:07.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:07.367 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:27:12.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:12.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:12.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:12.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:12.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:12.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:12.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:12.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:12.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:12.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:12.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:27:12.394 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:27:12.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:27:12.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:12.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:12.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:12.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:27:12.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:12.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:27:12.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:27:12.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:27:12.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:12.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:12.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:12.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:27:12.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:12.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:27:12.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:27:12.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:27:12.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:12.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:12.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:12.401 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:27:12.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:12.401 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:27:12.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:27:12.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:27:12.404 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:27:12.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:12.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:27:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:27:12.916 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:27:12.917 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:27:12.917 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:27:12.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:12.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:12.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:12.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:12.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:12.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:12.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:12.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:12.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:12.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:12.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:12.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:12.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:12.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:12.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:12.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:12.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:13.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:27:13.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:13.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:13.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:13.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:13.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:27:14.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:14.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:14.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:14.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:14.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:14.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:14.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:14.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:14.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:14.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:14.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:14.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:14.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:14.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:14.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:14.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:14.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:27:14.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:14.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:14.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:14.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:14.823 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:27:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:27:15.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:15.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:15.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:15.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:15.795 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:27:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:27:16.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:16.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:16.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:16.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:16.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:16.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:16.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:16.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:16.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:16.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:16.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:16.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:16.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:16.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:16.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:16.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:16.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:16.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:16.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:16.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:16.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:16.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:16.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:16.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:27:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:27:17.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:17.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:17.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:17.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:27:18.178 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:27:18.653 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:27:19.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:27:19.613 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:27:20.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:27:20.568 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:27:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:27:21.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:21.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:21.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:21.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:21.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:21.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:21.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:21.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:21.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:21.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:21.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:21.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:21.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:21.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:21.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:21.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:21.519 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:27:21.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:21.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:21.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:21.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:21.994 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:27:22.474 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:27:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:27:23.437 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:27:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:27:24.387 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:27:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:27:25.342 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:27:25.816 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:27:26.291 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:27:26.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:26.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:26.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:26.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:26.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:26.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:26.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:26.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:26.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:26.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:26.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:26.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:26.443 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:27:26.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:26.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:26.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:26.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:26.444 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:26.445 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:26.445 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:26.445 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:31.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:31.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:31.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:31.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:31.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:31.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:31.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:31.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:31.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:31.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:31.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:27:31.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:27:31.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:27:31.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:31.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:31.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:31.467 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:27:31.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:31.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:27:31.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:27:31.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:27:31.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:31.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:31.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:31.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:27:31.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:31.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:31.472 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:27:31.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:31.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:27:31.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:27:31.476 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:27:31.476 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:27:31.476 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:31.481 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:27:31.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:27:31.991 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:27:31.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:31.992 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:27:31.993 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:27:31.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:31.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:31.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:32.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:32.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:32.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:32.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:32.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:32.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:32.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:32.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:32.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:32.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:32.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:27:32.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:32.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:32.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:32.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:32.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:32.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:32.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:32.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:32.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:32.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:32.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:32.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:32.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:32.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:32.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:32.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:32.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:32.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:32.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:32.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:32.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:32.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:27:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:27:33.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:33.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:33.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:33.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:33.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:33.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:33.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:33.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:33.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:33.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:33.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:33.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:33.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:33.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:33.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:33.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:33.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:33.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:33.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:33.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:33.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:33.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:33.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:33.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:27:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:27:34.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:34.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:34.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:34.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:27:35.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:27:35.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:35.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:35.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:35.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:35.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:35.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:35.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:35.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:35.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:35.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:35.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:35.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:35.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:35.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:35.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:35.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:35.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:35.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:35.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:35.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:35.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:35.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:35.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:35.819 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:27:36.302 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:27:36.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:36.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:36.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:36.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:36.784 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:27:37.261 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:27:37.735 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:27:37.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:37.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:37.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:37.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:37.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:37.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:37.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:37.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:37.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:37.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:37.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:37.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:37.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:37.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:37.822 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:27:37.822 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.823 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:37.824 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:27:42.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:42.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:42.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:42.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:42.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:42.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:42.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:42.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:42.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:42.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:27:42.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:27:42.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:27:42.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:27:42.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:42.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:42.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:42.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:27:42.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:27:42.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:27:42.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:27:42.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:27:42.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:42.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:42.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:42.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:27:42.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:27:42.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:27:42.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:27:42.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:27:42.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:42.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:27:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:42.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:27:42.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:27:42.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:27:42.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:27:42.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:27:42.857 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:27:42.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:27:42.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:27:42.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:27:43.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:27:43.370 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:27:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:43.371 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:27:43.371 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:27:43.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:43.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:43.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:43.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:43.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:43.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:43.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:43.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:43.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:43.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:43.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:43.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:43.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:43.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:27:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:43.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:43.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:44.288 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:27:44.771 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:27:44.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:44.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:44.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:44.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:45.256 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:27:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:27:45.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:45.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:45.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:45.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:45.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:45.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:45.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:45.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:45.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:45.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:45.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:45.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:45.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:45.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:45.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:45.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:45.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:45.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:45.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:45.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:45.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:45.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:45.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:46.224 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:27:46.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:27:46.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:46.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:46.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:46.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:47.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:27:47.684 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:27:47.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:47.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:47.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:47.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:48.170 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:27:48.657 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:27:48.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:48.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:48.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:48.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:48.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:48.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:48.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:48.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:48.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:48.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:48.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:48.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:48.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:48.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:48.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:48.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:48.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:48.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:48.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:48.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:49.141 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:27:49.628 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:27:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:27:50.597 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:27:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:27:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:27:52.035 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:27:52.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:52.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:52.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:52.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:52.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:52.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:52.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:52.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:52.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:27:52.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:52.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:52.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:52.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:52.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:27:52.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:27:52.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:27:52.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:27:52.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:52.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:52.504 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:27:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:27:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:27:53.928 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:27:54.403 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:27:54.877 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:27:55.352 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:27:55.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:27:55.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:27:55.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:27:55.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:27:55.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:27:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:27:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:27:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:27:55.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:27:55.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:27:55.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:27:55.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:27:55.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:27:55.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:27:55.670 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:28:00.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:28:00.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:28:00.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:28:00.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:28:00.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:28:00.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:28:00.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:28:00.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:28:00.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:00.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:28:00.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:28:00.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:28:00.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:28:00.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:28:00.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:00.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:28:00.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:28:00.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:28:00.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:28:00.680 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:28:00.680 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:28:00.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:28:00.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:00.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:28:00.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:28:00.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:28:00.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:28:00.683 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:28:00.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:28:00.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:28:00.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:00.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:28:00.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:28:00.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:28:00.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:28:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:28:00.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:28:00.688 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:28:00.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:00.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:28:01.162 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:28:01.204 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:28:01.204 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:28:01.205 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:28:01.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:01.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:01.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:01.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:01.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.631 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:28:01.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:01.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:01.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:01.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:01.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:01.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:01.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:01.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:01.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:01.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:01.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:01.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:01.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:01.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:02.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:28:02.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:02.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:02.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:02.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:02.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:02.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:02.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:02.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:02.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:02.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:02.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:02.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:02.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:02.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:02.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:02.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:02.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:02.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:02.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:02.569 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:28:02.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:02.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:02.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:03.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:28:03.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:03.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:03.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:03.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:03.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:03.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:03.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:03.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:03.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:28:03.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:28:03.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:28:03.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:28:03.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:28:03.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:28:03.123 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:28:08.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:28:08.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:28:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:28:08.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:28:08.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:28:08.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:28:08.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:28:08.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:28:08.130 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:08.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:28:08.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:28:08.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:28:08.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:28:08.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:28:08.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:08.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:28:08.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:28:08.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:28:08.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:28:08.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:28:08.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:28:08.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:28:08.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:08.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:28:08.133 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:28:08.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:28:08.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:28:08.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:28:08.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:28:08.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:28:08.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:28:08.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:28:08.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:28:08.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:28:08.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:28:08.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:28:08.138 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:28:08.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:28:08.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:28:08.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:28:08.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:28:08.649 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:28:08.650 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:28:08.650 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:28:08.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:08.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:08.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:08.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:08.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:08.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:08.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:08.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:08.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:08.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:08.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:08.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:08.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:08.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:08.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:08.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:08.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:09.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:28:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:09.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:09.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:09.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:28:10.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:28:10.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:10.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:10.489 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:28:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:28:11.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:11.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:11.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:11.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:11.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:28:11.901 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:28:12.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:12.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:12.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:12.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:12.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:28:12.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:28:13.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:28:13.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:28:13.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:28:13.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:28:13.307 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:28:13.776 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:28:14.244 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:28:14.712 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:28:15.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:28:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:28:16.119 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:28:16.590 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:28:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:28:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:28:18.003 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:28:18.471 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:28:18.939 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:28:19.411 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:28:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:28:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:28:20.814 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:28:21.285 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:28:21.753 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:28:22.221 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:28:22.691 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:28:23.159 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:28:23.630 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:28:24.105 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:28:24.577 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:28:25.048 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:28:25.520 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:28:25.998 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:28:26.473 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:28:26.940 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:28:27.410 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:28:27.880 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:28:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:28:28.818 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:28:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:28:29.759 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:28:30.228 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:28:30.697 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:28:31.165 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:28:31.634 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:28:32.103 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:28:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:28:33.046 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:28:33.515 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:28:33.986 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:28:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:28:34.925 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:28:35.394 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:28:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:28:36.330 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:28:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:28:37.268 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:28:37.736 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:28:38.204 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:28:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:28:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:28:39.612 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:28:40.083 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:28:40.554 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:28:41.025 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:28:41.496 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:28:41.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:41.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:41.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:41.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:41.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:41.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:41.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:41.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:28:41.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:28:41.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:28:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:28:41.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:41.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:41.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:41.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:28:41.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:28:41.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:28:41.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:28:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:28:41.966 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:28:42.438 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:28:42.914 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:28:43.388 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:28:43.859 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:28:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:28:44.801 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:28:45.271 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:28:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:28:46.209 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:28:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:28:47.147 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:28:47.616 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:28:48.085 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:28:48.554 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:28:49.026 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:28:49.496 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:28:49.967 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:28:50.435 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:28:50.904 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:28:51.371 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:28:51.841 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:28:52.311 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:28:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:28:53.252 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:28:53.721 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:28:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:28:54.665 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:28:55.134 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:28:55.605 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:28:56.074 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:28:56.542 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:28:57.011 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:28:57.478 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:28:57.950 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:28:58.420 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:28:58.891 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:28:59.362 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:28:59.835 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:29:00.308 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:29:00.777 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:29:01.248 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:29:01.718 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:29:02.189 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:29:02.662 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:29:03.135 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:29:03.608 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:29:04.082 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:29:04.555 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:29:05.028 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:29:05.499 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:29:05.968 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:29:06.439 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:29:06.914 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:29:07.386 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:29:07.860 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:29:08.333 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:29:08.805 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:29:09.277 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:29:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:29:10.222 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 04:29:10.692 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 04:29:11.167 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 04:29:11.638 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 04:29:12.107 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 04:29:12.575 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 04:29:13.044 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 04:29:13.517 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 04:29:13.990 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 04:29:14.461 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 04:29:14.933 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 04:29:15.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:15.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:29:15.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:15.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:15.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:15.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:15.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:29:15.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:15.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:15.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:29:15.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:29:15.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:15.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:29:15.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:29:15.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:29:15.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:29:15.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:29:15.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:29:15.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:15.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:15.402 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 04:29:15.872 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 04:29:16.341 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 04:29:16.810 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 04:29:17.282 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 04:29:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 04:29:18.236 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 04:29:18.708 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 04:29:19.183 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 04:29:19.657 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 04:29:20.135 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 04:29:20.609 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 04:29:21.085 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 04:29:21.563 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 04:29:22.040 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 04:29:22.518 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 04:29:22.991 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 04:29:23.465 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 04:29:23.939 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 04:29:24.415 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 04:29:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 04:29:25.370 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 04:29:25.848 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 04:29:26.325 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 04:29:26.800 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 04:29:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 04:29:27.742 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 04:29:28.214 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 04:29:28.683 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 04:29:29.153 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 04:29:29.623 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 04:29:30.095 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 04:29:30.566 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 04:29:31.035 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 04:29:31.503 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 04:29:31.973 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 04:29:32.443 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 04:29:32.919 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 04:29:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 04:29:33.872 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 04:29:34.346 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 04:29:34.823 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 04:29:35.299 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 04:29:35.779 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 04:29:36.257 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-12 04:29:36.732 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2025-12-12 04:29:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2025-12-12 04:29:37.687 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2025-12-12 04:29:38.159 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2025-12-12 04:29:38.636 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2025-12-12 04:29:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2025-12-12 04:29:39.580 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2025-12-12 04:29:40.051 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2025-12-12 04:29:40.521 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2025-12-12 04:29:40.992 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2025-12-12 04:29:41.463 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2025-12-12 04:29:41.934 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2025-12-12 04:29:42.405 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2025-12-12 04:29:42.875 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2025-12-12 04:29:43.346 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2025-12-12 04:29:43.817 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2025-12-12 04:29:44.288 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2025-12-12 04:29:44.759 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2025-12-12 04:29:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2025-12-12 04:29:45.700 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2025-12-12 04:29:46.171 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2025-12-12 04:29:46.642 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2025-12-12 04:29:47.112 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2025-12-12 04:29:47.591 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2025-12-12 04:29:48.073 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2025-12-12 04:29:48.555 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2025-12-12 04:29:49.036 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2025-12-12 04:29:49.518 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2025-12-12 04:29:49.996 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2025-12-12 04:29:50.464 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2025-12-12 04:29:50.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:50.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:29:50.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:50.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:50.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:50.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:50.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:29:50.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:29:50.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:29:50.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:29:50.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:29:50.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:50.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:29:50.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:29:50.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:29:50.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:29:50.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:29:50.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:29:50.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:50.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:29:50.940 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2025-12-12 04:29:51.420 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2025-12-12 04:29:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2025-12-12 04:29:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2025-12-12 04:29:52.831 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2025-12-12 04:29:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2025-12-12 04:29:53.772 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2025-12-12 04:29:54.244 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2025-12-12 04:29:54.718 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2025-12-12 04:29:55.192 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2025-12-12 04:29:55.662 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2025-12-12 04:29:56.133 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2025-12-12 04:29:56.604 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2025-12-12 04:29:57.074 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2025-12-12 04:29:57.545 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2025-12-12 04:29:58.018 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2025-12-12 04:29:58.488 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2025-12-12 04:29:58.958 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2025-12-12 04:29:59.429 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2025-12-12 04:29:59.899 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2025-12-12 04:30:00.370 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2025-12-12 04:30:00.841 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2025-12-12 04:30:01.311 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2025-12-12 04:30:01.788 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2025-12-12 04:30:02.262 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2025-12-12 04:30:02.738 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2025-12-12 04:30:03.212 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2025-12-12 04:30:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2025-12-12 04:30:04.153 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2025-12-12 04:30:04.624 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2025-12-12 04:30:05.095 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2025-12-12 04:30:05.565 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2025-12-12 04:30:06.036 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2025-12-12 04:30:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2025-12-12 04:30:06.978 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2025-12-12 04:30:07.449 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2025-12-12 04:30:07.919 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2025-12-12 04:30:08.390 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2025-12-12 04:30:08.868 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2025-12-12 04:30:09.346 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2025-12-12 04:30:09.826 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2025-12-12 04:30:10.298 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2025-12-12 04:30:10.770 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2025-12-12 04:30:11.241 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2025-12-12 04:30:11.712 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2025-12-12 04:30:12.186 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2025-12-12 04:30:12.666 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2025-12-12 04:30:13.142 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2025-12-12 04:30:13.615 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2025-12-12 04:30:14.087 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2025-12-12 04:30:14.558 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2025-12-12 04:30:15.032 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2025-12-12 04:30:15.504 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2025-12-12 04:30:15.975 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2025-12-12 04:30:16.447 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2025-12-12 04:30:16.915 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2025-12-12 04:30:17.387 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2025-12-12 04:30:17.857 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2025-12-12 04:30:18.331 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2025-12-12 04:30:18.804 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2025-12-12 04:30:19.276 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2025-12-12 04:30:19.748 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2025-12-12 04:30:20.220 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2025-12-12 04:30:20.689 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2025-12-12 04:30:21.165 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2025-12-12 04:30:21.634 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2025-12-12 04:30:22.110 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2025-12-12 04:30:22.588 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2025-12-12 04:30:23.064 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2025-12-12 04:30:23.538 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2025-12-12 04:30:24.017 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2025-12-12 04:30:24.495 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2025-12-12 04:30:24.973 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2025-12-12 04:30:25.447 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2025-12-12 04:30:25.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:25.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:25.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:25.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:25.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:25.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:25.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:25.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:25.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:25.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:25.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:25.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:25.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:25.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:25.686 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:30:30.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:30.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:30.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:30.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:30.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:30.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:30.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:30.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:30.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:30.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:30.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:30.697 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:30:30.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:30.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:30.699 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:30:30.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:30.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:30:30.702 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:30:30.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:30:30.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:30.702 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:30.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:30.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:30:30.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:30.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:30:30.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:30:30.707 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:30:30.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:30.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:30.709 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:30.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:35.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:35.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:35.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:35.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:35.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:35.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:35.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:35.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:35.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:35.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:35.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:30:35.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:30:35.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:30:35.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:35.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:35.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:35.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:30:35.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:35.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:30:35.734 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:30:35.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:30:35.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:35.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:35.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:35.735 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:30:35.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:35.735 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:30:35.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:30:35.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:30:35.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:35.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:35.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:35.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:30:35.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:35.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:30:35.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:30:35.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:30:35.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:30:35.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:30:35.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:30:35.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:30:35.742 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:30:35.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:30:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:35.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:35.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:30:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:30:36.268 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:30:36.270 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:30:36.272 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:30:36.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:36.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:36.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:36.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:36.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:36.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:36.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:36.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:36.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:36.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:36.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:30:36.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:30:36.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:36.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:36.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:36.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:36.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:30:36.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:36.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:36.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:36.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:37.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:30:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:30:37.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:37.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:37.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:37.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:37.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:37.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:37.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:37.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:37.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:37.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:37.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:37.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:37.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:37.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:37.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:37.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:37.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:37.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:37.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:30:37.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:30:37.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:37.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:37.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:37.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:38.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:30:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:30:38.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:38.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:38.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:38.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:39.048 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:30:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:30:39.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:39.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:39.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:30:40.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:40.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:40.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:40.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:40.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:40.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:40.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:40.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:40.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:40.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:40.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:40.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:40.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:40.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:40.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:30:40.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:30:40.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:40.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:40.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:40.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:40.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:30:40.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:40.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:40.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:40.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:30:41.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:30:41.871 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:30:42.341 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:30:42.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:30:43.286 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:30:43.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:43.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:43.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:43.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:43.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:43.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:43.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:43.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:43.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:43.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:43.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:43.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:43.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:43.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:30:43.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:30:43.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:43.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:43.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:43.760 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:30:44.229 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:30:44.701 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:30:45.171 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:30:45.642 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:30:46.115 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:30:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:30:46.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:46.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:46.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:46.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:46.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:46.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:46.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:46.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:46.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:46.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:46.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:46.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:46.936 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:30:46.937 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2420 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:46.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:46.937 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2420 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.937 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2420 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2420 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2420 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.941 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:46.941 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2422 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:30:51.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:30:51.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:30:51.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:51.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:51.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:51.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:51.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:30:51.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:51.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:51.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:30:51.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:30:51.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:30:51.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:30:51.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:51.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:51.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:30:51.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:30:51.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:30:51.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:51.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:30:51.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:30:51.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:30:51.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:30:51.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:30:51.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:51.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:30:51.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:30:51.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:30:51.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:30:51.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:30:51.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:30:51.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:30:51.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:30:51.952 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:30:51.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:30:51.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:30:51.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:30:51.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:30:52.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:30:52.465 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:30:52.466 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:30:52.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:52.467 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:30:52.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:52.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:52.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:52.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:30:52.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:30:52.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:30:52.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:30:52.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:52.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:52.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:52.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:30:52.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:30:52.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:30:52.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:30:52.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:52.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:30:52.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:30:52.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:52.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:52.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:52.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:53.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:30:53.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:30:53.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:53.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:54.307 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:30:54.777 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:30:54.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:54.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:54.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:54.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:55.247 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:30:55.716 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:30:55.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:55.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:55.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:55.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:56.191 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:30:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:30:56.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:30:56.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:30:56.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:30:56.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:30:57.145 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:30:57.616 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:30:58.086 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:30:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:30:59.027 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:30:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:30:59.967 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:31:00.438 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:31:00.909 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:31:01.381 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:31:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:31:02.322 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:31:02.793 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:31:03.263 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:31:03.733 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:31:04.203 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:31:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:31:05.142 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:31:05.613 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:31:06.083 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:31:06.553 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:31:07.025 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:31:07.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:07.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:07.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:07.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:07.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:07.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:07.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:07.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:07.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:07.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:07.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:07.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:07.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:07.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:31:07.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:31:07.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:07.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:07.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:07.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:07.495 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:31:07.973 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:31:08.441 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:31:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:31:09.379 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:31:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:31:10.320 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:31:10.789 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:31:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:31:11.727 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:31:12.199 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:31:12.669 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:31:13.140 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:31:13.610 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:31:14.082 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:31:14.551 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:31:15.021 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:31:15.492 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:31:15.963 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:31:16.433 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:31:16.904 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:31:17.373 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:31:17.843 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:31:18.314 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:31:18.790 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:31:19.263 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:31:19.734 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:31:20.206 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:31:20.676 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:31:21.145 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:31:21.612 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:31:22.082 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:31:22.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:22.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:22.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:22.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:22.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:22.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:22.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:22.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:22.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:22.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:22.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:22.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:22.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:22.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:22.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:31:22.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:31:22.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:22.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:22.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:22.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:22.553 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:31:23.024 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:31:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:31:23.966 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:31:24.438 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:31:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:31:25.384 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:31:25.855 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:31:26.326 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:31:26.798 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:31:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:31:27.747 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:31:28.221 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:31:28.690 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:31:29.160 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:31:29.632 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:31:30.102 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:31:30.579 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:31:31.058 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:31:31.533 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:31:32.010 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:31:32.485 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:31:32.954 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:31:33.423 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:31:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:31:34.364 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:31:34.834 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:31:35.303 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:31:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:31:36.243 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:31:36.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:36.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:36.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:36.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:36.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:36.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:36.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:36.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:36.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:36.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:31:36.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:36.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:36.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:36.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:36.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:31:36.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:31:36.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:31:36.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:31:36.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:36.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:31:37.187 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:31:37.662 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:31:38.134 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:31:38.604 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:31:39.075 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:31:39.546 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:31:40.017 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:31:40.487 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:31:40.958 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:31:41.429 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:31:41.900 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:31:42.370 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:31:42.840 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:31:43.309 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:31:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:31:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:31:44.719 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:31:45.188 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:31:45.657 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:31:46.127 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:31:46.597 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:31:47.066 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:31:47.535 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:31:48.006 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:31:48.476 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:31:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:31:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:31:49.887 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:31:50.356 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:31:50.826 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:31:51.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:31:51.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:31:51.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:31:51.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:31:51.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:31:51.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:31:51.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:31:51.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:31:51.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:31:51.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:31:51.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:31:51.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:31:51.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:31:51.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:31:51.228 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.228 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:51.229 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=12839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:31:56.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:31:56.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:31:56.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:31:56.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:31:56.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:31:56.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:31:56.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:31:56.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:31:56.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:31:56.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:31:56.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:31:56.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:31:56.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:31:56.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:31:56.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:31:56.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:31:56.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:31:56.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:31:56.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:31:56.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:31:56.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:31:56.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:31:56.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:31:56.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:31:56.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:31:56.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:31:56.252 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:31:56.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:31:56.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:31:56.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:31:56.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:31:56.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:31:56.263 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:31:56.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:31:56.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:31:56.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:31:56.266 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:31:56.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:31:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:01.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:32:01.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:32:01.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:01.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:01.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:01.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:01.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:01.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:01.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:01.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:01.280 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:32:01.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:32:01.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:32:01.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:01.284 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:01.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:01.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:32:01.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:01.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:32:01.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:32:01.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:32:01.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:01.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:01.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:01.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:32:01.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:01.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:32:01.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:32:01.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:32:01.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:01.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:01.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:01.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:32:01.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:01.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:32:01.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:32:01.302 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:32:01.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:01.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:01.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:32:01.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:32:01.823 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:32:01.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:01.824 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:32:01.825 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:32:01.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:01.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:01.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:01.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:01.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:01.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:01.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:01.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:01.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:01.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:01.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:01.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:01.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:01.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:01.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:01.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:32:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:02.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:02.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:32:03.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:32:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:03.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:03.658 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:32:04.129 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:32:04.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:04.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:04.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:04.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:04.599 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:32:05.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:32:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:05.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:05.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:05.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:32:06.018 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:32:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:06.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:06.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:06.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:06.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:32:06.959 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:32:07.430 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:32:07.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:32:08.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:32:08.843 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:32:09.312 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:32:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:32:10.253 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:32:10.723 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:32:11.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:32:11.662 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:32:12.132 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:32:12.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:12.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:12.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:12.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:12.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:12.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:12.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:12.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:12.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:12.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:12.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:12.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:12.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:12.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:12.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:12.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:12.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:12.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:12.602 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:32:13.071 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:32:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:32:14.009 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:32:14.478 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:32:14.950 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:32:15.421 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:32:15.888 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:32:16.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:32:16.832 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:32:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:32:17.776 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:32:18.248 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:32:18.719 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:32:19.190 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:32:19.662 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:32:20.134 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:32:20.606 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:32:21.078 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:32:21.548 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:32:22.020 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:32:22.491 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:32:22.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:22.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:22.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:22.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:22.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:22.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:22.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:22.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:22.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:22.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:22.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:22.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:22.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:22.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:22.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:22.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:22.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:22.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:22.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:32:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:32:23.904 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:32:24.374 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:32:24.845 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:32:25.316 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:32:25.787 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:32:26.257 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:32:26.728 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:32:27.197 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:32:27.669 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:32:28.140 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:32:28.612 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:32:29.083 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:32:29.555 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:32:29.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:29.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:29.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:29.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:29.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:29.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:29.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:29.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:29.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:29.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:29.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:29.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:29.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:29.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:29.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:29.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:29.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:29.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:32:30.494 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:32:30.964 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:32:31.435 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:32:31.907 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:32:32.378 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:32:32.849 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:32:33.324 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:32:33.793 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:32:34.263 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:32:34.735 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:32:35.204 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:32:35.676 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:32:36.148 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:32:36.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:36.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:36.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:36.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:36.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:36.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:36.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:36.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:36.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:36.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:32:36.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:32:36.611 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:32:41.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:32:41.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:32:41.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:41.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:41.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:41.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:41.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:41.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:41.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:41.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:41.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:32:41.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:32:41.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:32:41.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:41.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:41.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:41.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:32:41.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:41.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:32:41.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:32:41.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:32:41.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:41.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:41.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:41.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:32:41.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:41.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:41.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:32:41.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:41.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:32:41.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:32:41.629 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:32:41.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:41.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:41.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:32:42.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:32:42.146 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:32:42.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:42.147 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:32:42.149 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:32:42.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:42.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:42.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:42.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:42.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:42.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:42.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:42.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:42.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:42.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:42.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:42.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:42.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:42.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:42.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:42.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:42.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:42.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:42.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:42.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:42.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:42.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:42.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:42.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:42.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:42.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:42.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:42.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:42.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:42.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:32:42.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:42.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:42.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:42.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:43.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:32:43.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:43.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:43.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:43.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:43.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:43.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:43.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:43.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:43.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:43.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:43.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:32:43.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:43.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:43.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:43.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:43.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:43.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:43.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:43.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:43.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:43.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:43.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:43.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:43.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:43.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:43.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:44.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:32:44.475 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:32:44.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:44.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:44.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:44.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:44.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:44.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:44.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:44.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:44.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:44.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:44.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:32:44.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:32:44.813 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:44.813 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:32:49.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:32:49.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:32:49.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:49.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:49.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:49.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:49.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:32:49.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:49.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:49.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:32:49.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:32:49.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:32:49.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:32:49.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:49.840 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:49.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:32:49.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:32:49.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:32:49.841 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:32:49.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:32:49.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:32:49.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:49.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:49.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:32:49.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:32:49.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:32:49.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:32:49.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:32:49.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:32:49.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:49.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:32:49.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:32:49.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:32:49.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:32:49.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:32:49.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:32:49.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:32:49.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:32:49.858 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:32:49.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:32:49.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:32:49.860 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:32:49.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:32:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:32:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:32:49.865 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:32:50.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:32:50.375 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:32:50.375 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:32:50.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:50.376 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:32:50.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:50.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:50.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:50.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:50.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:50.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:50.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:50.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:50.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:50.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:50.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:50.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:50.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:50.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:50.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:50.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:32:50.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:50.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:51.286 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:32:51.755 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:32:51.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:51.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:51.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:51.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:52.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:32:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:32:52.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:52.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:52.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:52.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:53.192 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:32:53.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:53.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:53.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:53.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:53.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:53.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:53.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:53.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:53.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:53.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:53.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:53.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:53.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:53.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:53.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:53.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:53.671 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:32:53.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:53.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:53.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:53.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:53.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:53.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:54.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:32:54.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:32:54.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:32:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:32:54.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:32:54.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:32:55.098 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:32:55.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:32:56.058 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:32:56.537 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:32:57.017 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:32:57.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:57.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:57.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:57.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:57.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:57.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:57.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:57.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:32:57.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:32:57.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:32:57.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:32:57.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:57.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:57.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:57.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:32:57.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:32:57.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:32:57.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:32:57.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:57.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:32:57.494 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:32:57.975 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:32:58.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:32:58.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:32:59.415 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:32:59.895 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:33:00.375 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:33:00.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:00.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:00.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:00.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:00.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:00.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:00.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:00.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:00.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:00.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:00.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:00.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:00.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:00.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:00.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:00.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:00.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:00.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:00.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:00.852 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:33:01.330 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:33:01.809 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:33:02.290 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:33:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:33:03.239 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:33:03.712 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:33:04.188 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:33:04.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:04.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:04.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:04.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:04.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:04.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:04.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:04.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:04.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:04.522 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:33:04.522 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:04.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:04.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:04.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:09.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:09.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:09.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:09.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:09.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:09.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:09.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:09.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:09.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:09.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:09.545 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:33:09.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:33:09.548 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:33:09.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:09.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:09.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:09.548 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:33:09.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:09.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:09.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:33:09.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:09.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:09.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:33:09.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:09.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.555 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:33:09.555 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:33:09.556 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:33:09.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:09.560 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:33:10.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:33:10.070 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:33:10.071 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:33:10.072 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:33:10.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:10.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:10.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:10.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:10.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:10.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:10.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:10.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:10.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:10.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:10.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:10.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:10.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:10.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:10.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:10.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:10.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:10.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:10.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:10.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:10.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:10.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:10.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:10.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:10.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:10.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:10.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:10.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:10.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:33:10.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:10.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:10.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:10.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:10.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:10.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:10.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:10.998 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:33:11.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:11.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:11.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:11.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:11.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:11.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:11.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:11.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:11.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:11.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:11.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:11.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:11.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:11.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:11.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:11.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:11.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:11.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:11.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:11.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:33:11.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:11.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:11.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:11.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:11.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:33:12.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:12.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:12.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:12.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:12.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:12.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:12.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:12.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:12.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:12.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:12.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:12.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:12.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:12.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:12.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:12.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:12.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:12.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:12.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:12.433 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:33:12.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:12.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:12.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:12.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:12.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:33:13.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:13.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:13.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:13.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:13.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:13.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:13.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:13.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:13.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:13.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:13.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:13.241 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:33:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:13.241 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:13.241 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:13.242 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:13.242 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:13.242 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:13.242 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:18.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:18.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:18.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:18.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:18.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:18.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:18.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:18.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:18.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:18.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:18.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:33:18.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:33:18.295 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:33:18.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:18.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:18.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:18.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:33:18.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:18.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:33:18.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:33:18.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:33:18.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:18.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:18.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:18.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:33:18.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:18.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:33:18.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:33:18.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:33:18.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:18.307 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:18.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:18.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:33:18.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:18.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:33:18.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:33:18.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:33:18.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:33:18.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:33:18.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:33:18.315 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:33:18.315 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:33:18.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:33:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:18.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:18.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:18.320 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:33:18.804 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:33:18.835 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:33:18.837 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:33:18.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:18.838 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:33:18.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:18.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:18.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:18.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:18.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:18.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:18.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:18.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:18.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:18.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:18.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:18.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:18.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:18.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:18.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:18.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:33:19.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:19.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:19.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:19.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:19.744 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:33:20.215 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:33:20.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:20.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:20.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:20.686 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:33:21.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:33:21.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:21.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:33:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:21.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:21.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:21.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:21.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:21.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:21.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:21.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:21.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:21.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:21.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:21.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:21.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:21.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:21.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:21.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:21.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:21.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:21.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:21.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:22.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:33:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:22.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:33:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:33:23.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:23.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:23.510 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:33:23.981 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:33:24.452 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:33:24.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:33:25.393 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:33:25.864 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:33:26.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:26.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:26.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:26.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:26.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:26.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:26.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:26.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:26.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:26.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:26.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:26.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:26.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:26.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:26.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:26.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:26.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:26.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:26.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:26.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:26.335 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:33:26.806 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:33:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:33:27.747 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:33:28.218 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:33:28.689 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:33:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:33:29.630 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:33:30.101 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:33:30.572 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:33:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:33:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:33:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:33:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:33:32.925 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:33:33.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:33.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:33.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:33.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:33.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:33.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:33.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:33.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:33.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:33.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:33.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:33.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:33.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:33.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:33.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:33.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:33.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:33.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:33.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:33.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:33:33.867 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:33:34.338 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:33:34.809 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:33:35.279 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:33:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:33:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:33:36.692 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:33:37.162 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:33:37.633 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:33:38.104 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:33:38.575 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:33:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:33:39.515 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:33:39.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:39.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:39.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:39.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:39.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:39.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:39.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:39.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:39.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:39.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:39.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:39.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:39.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:39.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:39.846 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:33:44.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:44.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:44.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:44.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:44.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:44.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:44.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:44.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:44.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:44.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:33:44.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:33:44.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:33:44.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:33:44.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:44.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:44.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:44.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:33:44.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:33:44.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:44.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:33:44.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:33:44.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:33:44.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:33:44.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:33:44.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:44.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:33:44.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:44.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:33:44.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:33:44.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:33:44.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:33:44.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:33:44.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:33:44.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:33:44.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:33:44.882 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:33:44.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:33:44.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:33:44.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:33:45.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:33:45.396 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:33:45.396 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:33:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:45.398 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:33:45.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:45.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:45.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:45.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:45.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:45.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:45.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:45.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:45.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:45.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:45.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:45.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:45.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:45.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:45.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:45.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:45.860 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:33:45.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:45.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:45.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:45.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:33:46.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:33:46.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:46.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:46.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:46.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:47.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:47.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:47.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:47.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:47.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:47.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:47.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:47.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:47.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:47.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:47.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:47.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:47.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:47.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:47.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:47.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:47.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:47.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:47.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:47.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:47.303 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:33:47.783 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:33:47.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:47.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:47.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:47.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:48.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:33:48.740 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:33:48.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:48.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:48.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:48.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:49.224 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:33:49.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:33:49.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:49.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:49.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:49.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:50.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:50.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:50.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:50.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:50.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:50.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:50.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:50.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:50.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:50.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:50.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:50.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:50.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:50.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:50.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:50.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:50.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:50.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:50.183 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:33:50.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:33:51.149 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:33:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:33:52.116 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:33:52.601 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:33:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:33:53.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:33:54.051 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:33:54.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:54.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:54.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:54.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:54.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:54.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:54.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:54.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:54.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:33:54.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:54.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:54.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:54.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:33:54.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:33:54.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:33:54.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:33:54.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:54.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:54.526 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:33:55.002 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:33:55.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:33:55.971 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:33:56.458 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:33:56.935 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:33:57.419 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:33:57.900 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:33:58.383 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:33:58.866 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:33:58.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:33:58.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:33:58.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:33:58.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:33:58.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:33:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:33:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:33:58.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:33:58.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:33:58.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:33:58.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:33:58.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:33:58.973 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:33:58.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:33:58.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:33:58.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.975 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.976 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2982 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.976 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.976 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.976 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.976 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.977 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.977 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.977 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:33:58.977 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2983 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:03.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:03.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:03.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:03.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:03.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:03.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:03.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:03.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:03.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:03.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:03.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:03.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:03.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:03.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:03.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:03.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:03.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:03.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:03.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:03.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:03.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:03.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:03.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:03.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:03.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:03.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:03.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:03.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:03.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:03.999 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:03.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:03.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:04.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:04.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:04.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:04.516 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:04.517 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.518 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:04.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:04.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:05.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:05.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:05.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:05.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:05.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.454 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:05.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:05.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:05.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:05.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:05.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:05.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:05.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:05.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:05.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:05.840 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:05.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:05.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:05.841 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.841 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.841 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:05.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=391 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:10.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:10.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:10.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:10.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:10.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:10.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:10.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:10.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:10.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:10.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:10.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:10.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:10.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:10.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:10.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:10.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:10.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:10.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:10.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:10.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:10.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:10.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:10.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:10.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:10.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:10.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:10.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:10.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:10.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:10.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:10.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:10.854 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:10.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:10.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:11.366 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:11.367 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:11.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.368 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:11.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:11.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:11.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:11.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:11.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:11.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:12.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:12.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:12.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:12.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:12.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:12.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:12.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:12.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:12.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:12.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:12.725 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:12.725 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:12.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:12.726 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.726 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.726 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.727 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.727 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.727 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.727 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:12.729 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:17.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:17.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:17.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:17.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:17.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:17.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:17.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:17.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:17.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:17.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:17.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:17.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:17.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:17.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:17.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:17.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:17.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:17.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:17.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:17.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:17.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:17.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:17.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:17.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:17.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:17.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:17.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:17.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:17.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:17.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:17.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:17.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:17.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:17.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:17.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:17.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:17.749 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:17.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:18.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:18.262 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:18.262 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:18.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.263 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:18.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:18.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:18.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:18.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:18.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:18.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.209 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:19.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:19.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:19.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:19.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:19.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:19.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:19.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:19.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:19.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:19.631 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:19.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:19.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:19.632 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.633 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.633 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.633 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.633 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.633 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:19.634 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:24.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:24.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:24.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:24.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:24.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:24.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:24.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:24.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:24.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:24.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:24.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:24.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:24.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:24.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:24.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:24.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:24.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:24.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:24.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:24.649 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:24.649 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:24.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:24.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:24.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:24.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:24.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:24.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:24.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:24.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:24.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:24.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:24.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:24.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:24.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:24.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:24.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:24.658 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:24.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:24.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:25.154 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:25.171 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.173 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:25.173 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:25.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:25.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:25.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:25.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:25.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:25.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:25.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:26.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:26.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:26.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:26.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:26.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:26.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:26.497 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:26.497 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:26.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:31.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:31.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:31.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:31.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:31.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:31.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:31.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:31.520 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:31.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:31.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:31.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:31.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:31.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:31.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:31.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:31.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:31.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:31.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:31.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:31.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:31.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:31.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:31.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:31.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:31.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:31.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:31.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:31.540 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:31.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:31.541 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:31.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:31.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:31.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:31.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:31.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:31.547 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:31.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:31.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:31.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:32.063 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:32.064 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:32.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.064 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:32.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:32.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:32.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:32.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:32.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:32.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:32.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:32.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:33.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:33.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:33.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:33.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:33.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:33.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:33.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:33.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:33.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:33.414 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:33.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:33.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:33.414 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:33.414 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:33.414 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:33.414 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:33.415 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:33.415 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:38.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:38.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:38.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:38.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:38.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:38.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:38.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:38.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:38.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:38.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:38.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:38.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:38.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:38.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:38.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:38.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:38.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:38.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:38.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:38.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:38.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:38.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:38.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:38.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:38.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:38.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:38.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:38.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:38.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:38.438 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:38.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:38.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:38.446 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:38.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:38.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:38.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:38.963 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:38.964 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:38.964 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:39.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.422 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:39.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:39.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:39.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:39.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:39.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:39.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:39.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:40.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:40.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:40.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:40.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:40.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:40.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:40.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:40.328 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:40.329 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:40.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:40.330 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.330 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.330 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.330 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.331 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.331 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.331 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.331 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.331 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.332 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.333 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.334 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.334 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.334 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:40.334 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:45.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:45.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:45.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:45.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:45.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:45.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:45.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:45.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:45.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:45.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:45.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:45.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:45.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:45.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:45.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:45.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:45.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:45.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:45.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:45.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:45.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:45.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:45.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:45.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:45.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:45.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:45.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:45.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:45.356 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:45.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:45.356 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:45.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:45.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:45.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:45.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:45.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:45.360 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:45.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:45.365 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:45.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:45.875 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:45.876 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:45.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:45.877 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:45.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:45.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.329 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:34:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:46.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:46.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:34:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:46.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:47.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:47.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:47.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:47.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:47.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:47.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:47.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:47.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:47.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:47.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:47.218 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:52.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:52.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:52.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:52.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:52.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:52.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:52.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:52.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:52.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:52.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:52.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:52.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:52.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:52.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:52.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:52.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:52.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:52.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:52.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:52.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:52.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:52.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:52.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:52.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:52.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:52.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:52.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:52.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:52.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:52.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:52.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:52.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:52.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:52.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:52.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:52.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:52.257 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:52.257 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:52.257 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:52.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:52.262 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:52.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:52.776 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:52.776 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:52.777 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:52.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:52.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:52.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:52.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:52.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:52.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:52.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:52.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:52.862 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:52.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:52.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:52.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:52.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:52.862 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:57.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:57.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:57.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:57.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:57.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:57.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:57.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:57.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:57.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:57.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:34:57.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:34:57.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:34:57.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:34:57.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:57.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:57.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:57.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:34:57.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:34:57.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:34:57.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:34:57.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:34:57.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:57.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:57.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:57.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:34:57.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:34:57.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:34:57.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:34:57.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:34:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:57.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:34:57.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:57.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:34:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:34:57.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:34:57.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:34:57.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:34:57.894 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:34:57.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:34:57.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:34:57.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:34:58.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:34:58.413 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:34:58.414 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:34:58.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.415 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:34:58.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:34:58.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:34:58.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:34:58.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:34:58.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:34:58.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:34:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:34:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:34:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:34:58.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:34:58.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:34:58.546 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:34:58.546 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.546 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:34:58.547 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:03.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:03.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:03.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:03.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:03.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:03.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:03.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:03.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:03.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:03.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:03.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:03.574 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:03.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:03.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:03.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:03.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:03.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:03.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:03.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:03.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:03.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:03.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:03.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:03.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:03.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:03.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:03.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:03.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:03.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:03.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:03.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:03.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:03.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:03.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:03.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:03.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.593 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:03.593 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:03.593 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:03.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:03.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:03.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:04.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:04.114 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:04.115 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:04.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.117 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:04.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:04.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:04.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:04.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:04.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:04.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:04.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:04.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:04.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:04.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:04.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:04.233 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:04.233 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:09.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:09.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:09.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:09.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:09.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:09.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:09.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:09.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:09.257 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:09.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:09.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:09.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:09.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:09.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:09.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:09.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:09.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:09.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:09.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:09.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:09.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:09.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:09.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:09.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:09.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:09.266 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:09.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:09.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:09.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:09.784 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:09.784 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:09.785 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:09.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:09.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:09.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:09.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:09.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:09.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:09.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:09.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:09.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:09.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:09.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:09.901 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:14.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:14.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:14.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:14.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:14.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:14.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:14.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:14.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:14.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:14.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:14.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:14.922 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:14.922 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:14.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:14.923 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:14.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:14.923 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:14.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:14.924 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:14.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:14.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:14.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:14.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:14.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:14.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:14.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:14.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:14.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:14.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:14.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:14.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:14.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:14.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:14.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:14.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:14.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:14.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:14.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:14.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:14.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:14.935 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:14.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:14.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:14.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:15.424 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:15.457 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:15.459 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:15.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.461 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:15.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:15.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:15.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:15.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:15.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:15.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:15.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:15.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:15.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:15.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:15.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:15.569 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:15.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:15.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:20.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:20.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:20.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:20.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:20.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:20.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:20.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:20.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:20.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:20.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:20.587 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:20.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:20.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:20.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:20.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:20.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:20.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:20.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:20.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:20.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:20.594 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:20.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:20.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:20.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:20.595 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:20.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:20.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:20.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:20.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:20.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:20.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:20.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:20.598 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:20.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:20.598 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:20.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:20.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:20.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:20.602 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:20.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:20.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:20.607 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:21.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:21.122 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:21.124 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:21.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.125 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:21.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:21.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:21.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:21.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:21.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:21.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:21.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:21.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:21.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:21.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:21.253 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:21.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:21.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:26.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:26.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:26.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:26.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:26.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:26.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:26.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:26.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:26.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:26.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:26.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:26.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:26.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:26.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:26.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:26.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:26.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:26.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:26.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:26.283 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:26.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:26.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:26.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:26.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:26.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:26.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:26.284 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:26.286 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:26.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:26.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:26.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:26.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:26.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:26.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:26.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:26.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:26.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:26.292 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:26.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:26.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:26.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:26.812 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:26.813 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.814 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:26.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:26.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:26.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:26.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:26.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:26.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:26.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:26.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:26.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:26.935 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:26.935 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:31.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:31.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:31.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:31.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:31.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:31.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:31.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:31.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:31.952 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:31.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:31.952 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:31.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:31.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:31.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:31.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:31.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:31.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:31.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:31.957 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:31.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:31.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:31.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:31.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:31.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:31.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:31.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:31.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:31.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:31.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:31.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:31.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:31.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:31.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:31.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:31.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:31.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:31.965 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:31.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:31.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:31.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:32.454 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:32.479 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:32.480 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:32.481 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:32.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:32.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:32.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:35:32.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:32.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:32.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:32.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:35:32.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:35:32.934 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:35:32.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:32.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:32.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:32.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:35:33.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:35:33.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:33.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:33.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:33.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:35:34.856 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:35:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:34.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:34.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:35.335 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:35:35.815 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:35:35.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:35.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:35.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:35.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:35.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:35.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:35.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:35.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:35.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:35.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:35.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:35.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:35.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:35.978 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:35.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:35.978 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:35.978 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:35.978 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:35.978 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:35.978 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:40.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:40.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:40.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:40.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:40.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:40.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:40.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:40.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:40.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:40.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:40.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:40.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:40.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:40.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:40.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:40.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:40.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:40.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:41.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:41.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:41.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:41.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:41.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:41.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:41.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:41.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:41.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:41.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:41.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:41.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:41.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:41.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:41.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:41.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:41.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:41.007 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:41.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:41.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:41.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:41.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:41.522 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:41.523 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:41.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:41.524 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:41.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:41.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:41.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:35:41.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:41.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:41.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:41.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:35:41.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:35:41.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:35:41.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:41.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:41.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:41.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:41.975 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:35:42.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:42.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:42.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:42.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:42.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:42.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:42.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:42.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:35:42.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:42.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:42.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:42.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:35:42.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:35:42.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:42.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:42.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:42.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:42.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:42.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:42.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:42.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:42.075 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:35:42.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:42.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:42.075 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:42.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:42.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:42.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:42.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:42.076 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:35:47.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:35:47.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:35:47.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:47.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:47.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:47.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:47.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:35:47.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:47.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:47.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:35:47.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:35:47.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:35:47.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:35:47.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:47.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:47.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:35:47.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:35:47.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:35:47.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:35:47.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:35:47.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:35:47.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:47.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:47.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:35:47.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:35:47.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:35:47.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:47.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:35:47.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:35:47.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:35:47.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:35:47.104 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:35:47.104 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:35:47.104 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:35:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:35:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:35:47.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:35:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:35:47.618 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:35:47.618 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:35:47.619 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:35:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:47.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:47.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:47.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:35:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:47.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:47.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:47.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:35:47.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:35:47.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:35:47.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:47.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:47.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:47.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:47.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:35:47.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:47.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:35:47.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:35:47.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:35:47.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:35:47.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:35:47.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:35:47.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:35:47.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:35:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:35:48.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:48.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:48.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:48.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:48.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:35:49.003 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:35:49.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:49.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:49.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:49.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:49.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:35:49.945 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:35:50.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:50.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:50.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:50.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:50.415 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:35:50.886 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:35:51.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:51.357 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:35:51.828 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:35:52.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:35:52.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:35:52.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:35:52.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:35:52.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:35:52.769 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:35:53.240 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:35:53.711 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:35:54.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:35:54.652 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:35:55.123 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:35:55.594 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:35:56.065 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:35:56.535 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:35:57.006 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:35:57.477 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:35:57.948 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:35:58.418 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:35:58.889 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:35:59.360 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:35:59.831 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:36:00.302 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:36:00.772 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:36:01.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:36:01.714 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:36:02.185 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:36:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:36:02.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:02.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:02.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:02.951 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:36:02.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:02.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:02.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:02.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:36:02.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:36:02.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:02.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:02.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:02.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:36:02.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:36:02.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:36:02.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:36:02.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:02.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:02.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:02.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:02.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:02.996 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.996 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:02.997 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:08.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:08.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:08.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:08.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:08.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:08.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:08.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:08.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:08.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:08.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:08.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:36:08.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:36:08.016 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:36:08.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:08.016 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:08.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:08.017 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:36:08.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:08.017 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:36:08.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:36:08.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:36:08.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:08.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:08.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:08.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:36:08.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:08.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:36:08.020 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:36:08.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:36:08.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:08.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:08.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:08.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:36:08.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:08.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:36:08.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:36:08.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:36:08.024 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:36:08.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:08.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:08.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:36:08.516 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:36:08.539 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:36:08.540 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:36:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:08.541 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:36:08.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:08.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:08.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:36:08.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:08.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:08.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:08.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:36:08.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:36:08.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:36:08.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:08.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:08.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:08.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:08.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:08.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:36:08.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:08.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:08.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:08.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:36:08.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:08.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:08.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:08.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:36:08.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:36:08.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:08.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:08.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:08.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:36:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:36:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:36:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:36:08.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:08.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:08.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:08.898 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:36:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:13.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:13.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:13.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:13.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:13.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:13.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:13.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:13.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:13.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:13.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:13.916 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:36:13.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:36:13.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:36:13.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:13.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:13.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:13.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:36:13.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:13.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:36:13.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:36:13.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:36:13.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:13.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:13.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:13.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:36:13.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:13.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:36:13.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:36:13.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:36:13.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:13.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:13.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:13.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:36:13.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:13.929 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:36:13.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:36:13.933 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:13.939 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:36:14.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:36:14.450 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:36:14.450 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:36:14.451 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:36:14.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:14.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:14.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:14.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:36:14.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:14.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:14.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:14.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:36:14.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:36:14.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:36:14.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:14.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:14.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:14.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:14.911 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:36:14.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:36:14.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:36:14.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:36:14.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:36:15.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:36:15.879 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:36:15.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:36:15.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:36:15.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:36:15.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:36:16.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:36:16.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:16.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:16.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:16.511 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=543 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:36:16.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:36:16.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:36:16.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:36:16.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:36:16.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:36:16.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:36:16.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:36:16.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:36:16.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:36:16.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:36:16.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:36:16.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:36:16.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:16.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:16.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:16.560 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:36:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:16.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:16.560 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:36:21.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:21.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:21.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:21.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:21.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:21.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:21.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:21.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:21.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:21.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:21.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:36:21.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:36:21.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:36:21.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:21.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:21.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:21.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:36:21.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:21.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:36:21.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:36:21.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:36:21.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:21.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:21.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:21.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:36:21.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:21.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:21.601 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:36:21.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:21.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:36:21.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:36:21.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:36:21.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:36:21.604 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:36:21.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:21.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:21.606 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:21.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:26.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:26.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:26.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:26.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:26.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:26.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:26.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:26.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:26.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:26.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:36:26.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:36:26.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:36:26.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:36:26.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:26.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:26.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:26.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:36:26.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:36:26.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:26.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:36:26.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:36:26.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:36:26.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:36:26.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:36:26.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:26.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:36:26.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:26.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:36:26.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:36:26.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:36:26.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:36:26.623 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:36:26.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:26.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:26.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:26.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:26.626 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:36:26.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:36:26.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:36:31.472 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.142.20:5700'
2025-12-12 04:36:31.472 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.142.20:5802)
2025-12-12 04:36:31.472 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.142.20:5801)
2025-12-12 04:36:31.472 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.142.22:6700'
2025-12-12 04:36:31.472 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.142.22:6802)
2025-12-12 04:36:31.472 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.142.22:6801)
2025-12-12 04:36:31.472 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.142.20:5700/1'
2025-12-12 04:36:31.472 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.142.20:5804)
2025-12-12 04:36:31.472 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.142.20:5803)
2025-12-12 04:36:31.472 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.142.20:5700/2'
2025-12-12 04:36:31.472 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.142.20:5806)
2025-12-12 04:36:31.472 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.142.20:5805)
2025-12-12 04:36:31.472 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.142.20:5700/3'
2025-12-12 04:36:31.472 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.142.20:5808)
2025-12-12 04:36:31.472 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.142.20:5807)
2025-12-12 04:36:31.472 [INFO] fake_trx.py:424 Init complete
2025-12-12 04:36:31.472 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-12 04:36:32.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:32.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:32.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:32.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:32.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:32.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:44.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:44.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:44.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:44.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:49.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:49.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:49.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:49.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:49.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:49.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:49.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:49.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:49.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:49.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:54.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:54.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:54.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:54.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:54.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:54.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:54.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:59.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:36:59.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:36:59.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:59.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:36:59.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:59.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:59.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:36:59.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:36:59.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:36:59.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:04.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:04.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:04.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:04.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:04.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:04.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:04.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:04.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:04.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:04.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:09.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:09.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:09.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:09.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:09.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:09.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:09.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:09.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:09.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:14.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:14.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:14.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:14.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:14.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:14.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:14.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:19.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:19.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:19.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:19.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:19.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:19.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:19.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:19.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:19.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:19.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:24.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:24.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:24.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:24.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:24.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:24.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:24.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:29.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:29.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:29.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:29.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:29.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:29.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:29.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:29.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:29.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:34.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:34.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:34.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:34.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:34.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:34.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 0 -> 1
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:37:34.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 0 -> 1
2025-12-12 04:37:34.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:37:34.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:37:34.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 0 -> 1
2025-12-12 04:37:34.497 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:37:34.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:37:34.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 0 -> 1
2025-12-12 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:39.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:39.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:39.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:39.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:39.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:39.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:39.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:39.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:39.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:39.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:44.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:44.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:44.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:44.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:44.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:44.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:44.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:37:44.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:37:44.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:37:44.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:37:44.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:44.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:44.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:44.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:49.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:49.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:49.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:49.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:49.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:49.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:49.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:54.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:54.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:54.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:54.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:54.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:54.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:54.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:54.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:54.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:37:54.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:59.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:37:59.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:37:59.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:37:59.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:37:59.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:37:59.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:01.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:01.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:01.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:01.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:06.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:06.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:06.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:06.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:06.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:06.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:06.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:06.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:06.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:06.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:12.763 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.142.20:5700'
2025-12-12 04:38:12.764 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.142.20:5802)
2025-12-12 04:38:12.764 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.142.20:5801)
2025-12-12 04:38:12.764 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.142.22:6700'
2025-12-12 04:38:12.764 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.142.22:6802)
2025-12-12 04:38:12.764 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.142.22:6801)
2025-12-12 04:38:12.764 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.142.20:5700/1'
2025-12-12 04:38:12.764 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.142.20:5804)
2025-12-12 04:38:12.764 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.142.20:5803)
2025-12-12 04:38:12.764 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.142.20:5700/2'
2025-12-12 04:38:12.764 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.142.20:5806)
2025-12-12 04:38:12.764 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.142.20:5805)
2025-12-12 04:38:12.764 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.142.20:5700/3'
2025-12-12 04:38:12.764 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.142.20:5808)
2025-12-12 04:38:12.764 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.142.20:5807)
2025-12-12 04:38:12.764 [INFO] fake_trx.py:424 Init complete
2025-12-12 04:38:12.764 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2025-12-12 04:38:13.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:13.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:13.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:17.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:17.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:17.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:17.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:17.332 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 0 -> 1
2025-12-12 04:38:17.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:38:17.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:38:17.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:17.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:17.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:38:17.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:17.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:17.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 0 -> 1
2025-12-12 04:38:17.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:38:17.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:38:17.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:17.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:17.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:38:17.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:17.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:17.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 0 -> 1
2025-12-12 04:38:17.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:38:17.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:38:17.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:17.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:17.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:38:17.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:17.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:17.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 0 -> 1
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:38:17.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:38:17.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:38:17.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:38:17.359 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:38:17.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:38:17.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:38:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:38:17.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:17.898 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:38:17.901 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:38:17.902 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:38:17.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:17.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:17.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:17.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:17.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:17.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:17.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:17.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:18.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:18.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:18.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:38:18.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:18.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:18.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:18.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:18.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:18.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:18.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:18.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:18.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:18.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:18.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:18.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:18.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:18.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:18.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:18.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:18.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:18.790 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:38:19.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:19.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:19.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:19.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:19.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:19.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:19.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:19.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:19.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:19.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:19.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:19.261 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:38:19.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:19.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:19.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:19.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:19.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:19.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:19.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:19.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:19.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:19.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:19.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:19.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:19.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:19.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:19.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:19.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:38:19.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:19.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:19.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:19.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:19.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:20.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:20.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:20.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:20.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:38:20.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:20.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:20.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:20.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:20.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:20.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:20.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:20.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:20.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:20.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:20.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:20.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:20.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:20.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:20.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:20.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:20.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:20.674 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:38:21.144 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:38:21.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:21.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:21.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:21.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:21.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:21.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:21.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:21.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:21.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:21.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:21.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:21.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:21.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:21.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:21.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:21.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:21.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:21.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:21.415 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:38:21.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:21.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:21.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:38:22.086 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:38:22.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:22.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:22.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:22.230 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:22.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:22.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:22.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:22.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:22.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:22.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:22.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:22.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:22.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:22.357 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:38:22.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.556 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:38:22.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:22.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:22.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:22.770 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:22.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:22.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:22.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:22.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:22.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:22.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:22.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:22.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:22.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:22.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:23.027 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:38:23.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:23.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:23.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:23.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:23.498 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:38:23.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:23.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:23.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:23.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:23.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:23.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:23.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:23.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:23.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:23.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:23.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:23.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:23.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:38:24.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:24.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:24.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:24.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:24.440 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:38:24.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:24.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:24.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:24.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:24.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:24.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:24.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:24.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:24.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:24.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:24.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:24.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:24.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:24.911 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:38:24.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:24.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:24.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:24.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:38:25.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:25.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:25.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:25.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:25.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:25.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:25.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:25.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:25.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:25.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:25.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:25.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:25.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:25.852 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:38:25.887 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:25.887 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:38:25.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:25.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:26.323 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:38:26.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:26.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:26.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:26.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:26.671 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:26.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:26.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:26.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:26.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:26.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:26.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:26.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:26.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:26.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:26.794 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:38:26.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:26.829 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:38:26.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:26.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:27.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.212 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:27.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:27.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:27.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:27.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:27.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:27.264 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:38:27.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:27.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:27.327 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:27.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:27.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.425 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:27.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:27.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:27.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:27.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:27.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:27.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:27.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:27.535 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:27.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.735 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:38:27.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:27.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.913 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:27.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:27.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:27.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:27.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:27.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:27.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:27.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:27.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:27.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:28.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:28.033 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:28.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.206 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:38:28.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:28.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:28.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:28.401 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:28.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:28.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:28.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:28.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:28.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:28.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:28.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:28.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:28.504 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:28.504 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:28.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.676 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:38:28.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:28.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:28.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:28.890 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:28.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:28.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:28.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:28.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:28.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:28.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:28.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:28.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:28.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:28.974 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:28.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:28.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:29.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:29.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:29.071 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:29.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:29.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:29.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:29.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:29.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:29.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:29.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:29.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:29.156 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:38:29.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:29.193 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:29.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:29.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:29.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:29.571 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:29.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:29.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:29.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:29.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:29.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:29.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:29.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:29.626 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:38:29.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:29.686 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:29.687 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:29.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:29.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:30.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:30.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:30.056 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:30.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:30.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:30.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:30.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:38:30.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:38:30.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:38:30.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:38:30.095 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:38:30.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:30.157 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:38:30.157 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:38:30.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:38:30.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:30.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:30.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:30.545 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:38:30.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:30.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:30.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:30.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:30.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:30.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:30.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:30.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:30.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:30.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:30.554 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:38:35.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:35.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:35.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:35.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:35.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:35.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:35.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:35.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:35.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:35.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:35.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:38:35.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:38:35.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:38:35.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:35.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:35.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:35.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:38:35.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:35.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:38:35.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:38:35.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:38:35.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:35.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:35.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:35.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:38:35.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:35.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:38:35.590 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:38:35.590 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:38:35.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:35.590 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:35.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:35.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:38:35.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:35.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:38:35.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:38:35.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:38:35.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:38:35.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:38:35.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:38:35.598 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:38:35.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:38:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:38:36.121 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:38:36.123 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:38:36.124 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:38:36.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:36.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:36.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:36.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:38:36.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:36.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:36.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.029 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:38:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.499 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:38:37.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:37.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:37.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:37.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:37.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:38:37.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:37.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:38.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:38.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:38.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:38.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:38.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:38.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:38.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:38.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:38.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:38.257 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:38:38.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:38.257 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=574 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:43.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:43.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:43.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:43.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:43.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:43.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:43.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:43.288 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:43.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:43.288 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:38:43.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:38:43.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:38:43.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:43.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:43.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:43.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:38:43.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:43.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:38:43.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:38:43.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:38:43.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:43.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:43.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:43.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:38:43.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:43.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:38:43.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:38:43.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:38:43.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:43.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:43.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:43.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:38:43.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:43.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:38:43.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:38:43.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:38:43.305 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:38:43.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:43.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:38:43.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:38:43.831 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:38:43.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:43.832 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:38:43.832 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:38:43.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:43.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:43.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:43.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:43.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:43.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:43.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:43.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:43.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:43.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:43.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:43.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:43.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:43.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:43.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:43.909 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:38:43.909 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.909 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:43.910 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:48.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:48.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:48.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:48.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:48.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:48.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:48.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:48.929 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:48.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:48.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:38:48.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:38:48.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:38:48.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:48.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:48.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:48.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:38:48.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:48.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:38:48.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:38:48.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:38:48.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:48.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:48.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:48.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:38:48.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:48.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:48.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:38:48.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:48.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:38:48.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:38:48.942 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:38:48.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:48.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:38:49.432 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:38:49.462 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:38:49.463 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:38:49.464 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:38:49.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:49.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:49.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:49.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:49.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:49.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:49.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:49.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:49.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:49.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:49.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:49.530 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:38:49.530 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.530 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.530 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.531 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.531 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.531 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.531 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:49.531 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:54.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:54.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:54.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:54.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:54.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:54.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:54.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:54.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:54.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:54.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:38:54.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:38:54.548 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:38:54.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:38:54.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:54.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:54.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:54.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:38:54.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:38:54.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:38:54.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:38:54.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:38:54.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:54.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:54.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:54.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:38:54.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:38:54.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:38:54.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:38:54.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:38:54.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:54.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:38:54.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:54.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:38:54.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:38:54.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:38:54.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:38:54.558 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:38:54.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:38:54.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:38:54.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:38:54.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:38:55.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:38:55.076 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:38:55.077 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:38:55.077 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:38:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:38:55.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:38:55.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:38:55.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:38:55.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:38:55.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:38:55.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:38:55.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:38:55.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:38:55.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:38:55.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:38:55.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:38:55.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:38:55.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:38:55.238 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:38:55.238 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:55.239 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:55.239 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:55.239 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:55.239 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:38:55.239 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:39:00.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:39:00.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:39:00.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:39:00.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:39:00.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:39:00.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:39:00.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:39:00.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:39:00.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:39:00.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:39:00.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:39:00.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:39:00.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:39:00.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:39:00.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:39:00.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:39:00.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:39:00.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:39:00.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:39:00.266 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:39:00.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:39:00.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:39:00.267 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:39:00.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:39:00.267 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:39:00.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:39:00.267 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:39:00.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:39:00.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:39:00.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:39:00.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:39:00.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:39:00.275 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:39:00.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:39:00.280 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:39:00.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:39:00.793 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:39:00.795 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:39:00.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:00.796 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:39:00.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:00.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:00.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:00.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:00.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:00.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:00.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:00.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:00.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:00.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:00.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:00.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:00.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:00.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:01.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:39:01.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:39:01.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:39:01.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:39:01.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:39:01.720 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:39:02.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:39:02.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:39:02.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:39:02.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:39:02.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:39:02.677 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:39:03.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:39:03.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:39:03.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:39:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:39:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:39:03.634 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:39:04.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:39:04.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:39:04.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:39:04.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:39:04.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:39:04.590 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:39:04.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:04.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:04.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:04.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:04.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:04.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:04.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:04.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:04.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:04.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:04.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:05.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:05.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:05.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:05.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:05.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:05.068 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:39:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:39:05.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:39:05.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:39:05.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:39:05.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:05.547 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:39:06.025 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:39:06.503 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:39:06.981 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:39:07.459 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:39:07.937 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:39:08.415 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:39:08.892 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:39:09.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:09.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:09.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:09.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:09.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:09.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:09.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:09.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:09.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:09.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:09.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:09.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:09.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:09.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:09.371 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:39:09.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:09.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:09.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:09.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:09.849 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:39:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:39:10.806 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:39:11.284 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:39:11.763 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:39:12.241 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:39:12.719 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:39:13.197 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:39:13.674 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:39:13.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:13.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:13.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:13.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:13.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:13.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:13.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:13.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:13.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:13.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:13.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:13.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:13.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:13.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:13.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:13.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:13.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:14.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:14.152 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:39:14.630 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:39:15.109 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:39:15.587 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:39:16.065 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:39:16.543 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:39:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:39:17.500 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:39:17.978 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:39:18.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:18.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:18.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:18.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:18.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:18.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:18.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:18.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:18.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:18.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:18.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:18.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:18.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:18.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:18.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:18.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:39:18.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:39:19.413 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:39:19.892 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:39:20.370 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:39:20.849 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:39:21.328 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:39:21.806 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:39:22.285 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:39:22.763 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:39:22.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:22.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:22.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:22.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:22.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:22.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:22.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:22.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:22.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:22.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:22.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:22.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:22.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:22.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:22.864 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:39:22.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:22.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:39:23.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:23.719 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:39:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:39:24.676 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:39:25.151 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:39:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:39:26.109 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:39:26.588 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:39:27.067 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:39:27.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:27.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:27.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:27.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:27.261 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:39:27.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:27.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:27.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:27.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:27.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:27.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:27.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:27.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:27.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:27.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:27.309 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:39:27.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:27.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:27.545 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:39:27.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:28.025 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:39:28.504 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:39:28.983 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:39:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:39:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:39:30.417 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:39:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:39:31.367 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:39:31.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:31.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:31.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:31.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:31.709 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:39:31.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:31.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:31.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:31.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:31.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:31.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:31.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:31.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:31.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:31.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:31.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:31.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:31.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:31.845 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:39:32.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:32.324 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:39:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:39:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:39:33.759 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:39:34.238 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:39:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:39:35.195 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:39:35.674 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:39:36.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:36.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:36.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:36.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:36.153 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:39:36.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:36.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:36.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:36.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:36.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:36.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:36.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:36.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:36.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:36.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:36.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:36.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:36.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:36.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:36.631 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:39:37.110 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:39:37.588 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:39:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:39:38.546 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:39:39.024 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:39:39.503 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:39:39.980 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:39:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:39:40.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:40.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:40.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:40.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:40.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:40.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:40.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:40.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:40.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:40.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:40.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:40.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:40.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:39:40.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:40.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:40.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:40.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:40.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:40.936 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:39:41.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:39:41.892 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:39:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:39:42.849 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:39:43.328 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:39:43.807 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:39:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:39:44.764 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:39:45.242 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:39:45.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:45.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:45.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:45.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:45.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:45.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:45.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:45.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:45.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:45.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:45.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:45.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:45.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:45.481 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:45.482 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:39:45.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:45.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:45.720 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:39:46.199 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:39:46.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:46.678 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:39:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:39:47.637 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:39:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:39:48.595 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:39:49.074 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:39:49.554 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:39:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:39:50.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:50.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:50.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:50.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:50.303 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:39:50.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:50.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:50.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:50.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:50.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:50.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:50.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:50.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:50.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:50.371 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:50.371 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:39:50.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:50.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:50.512 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:39:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:50.991 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:39:51.470 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:39:51.949 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:39:52.429 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:39:52.908 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:39:53.388 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:39:53.866 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:39:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:39:54.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:54.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:54.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:54.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:54.758 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:39:54.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:54.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:54.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:54.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:54.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:54.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:54.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:54.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:39:54.824 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:54.824 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:39:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:54.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:55.302 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:39:55.781 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:39:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:39:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:39:57.217 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:39:57.695 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:39:58.174 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:39:58.652 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:39:58.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:58.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:58.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:58.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:58.984 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:39:58.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:39:58.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:39:58.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:39:58.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:58.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:39:58.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:39:58.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:39:58.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:39:59.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:59.030 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:39:59.030 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:39:59.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:59.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:39:59.131 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:39:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:39:59.610 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:40:00.089 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:40:00.568 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:40:01.046 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:40:01.525 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:40:02.004 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:40:02.483 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:40:02.961 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:40:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:03.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:03.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:03.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:03.311 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:03.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:03.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:03.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:03.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:03.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:03.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:03.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:03.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:03.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:03.333 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:03.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:03.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:03.439 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 04:40:03.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:03.918 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 04:40:04.397 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 04:40:04.876 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 04:40:05.355 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 04:40:05.834 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 04:40:06.313 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 04:40:06.790 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 04:40:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 04:40:07.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:07.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:07.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:07.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:07.638 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:07.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:07.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:07.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:07.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:07.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:07.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:07.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:07.698 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:07.698 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:07.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:07.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:07.748 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 04:40:07.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:08.227 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 04:40:08.704 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 04:40:09.182 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 04:40:09.661 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 04:40:10.140 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 04:40:10.619 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 04:40:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 04:40:11.576 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 04:40:11.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:11.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:11.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:11.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:11.965 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:11.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:11.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:11.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:11.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:11.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:11.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:11.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:11.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:11.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:11.995 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:11.995 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:11.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:11.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:12.053 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 04:40:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:12.532 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 04:40:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 04:40:13.489 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 04:40:13.967 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 04:40:14.446 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 04:40:14.924 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 04:40:15.403 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 04:40:15.882 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 04:40:16.361 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 04:40:16.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:16.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:16.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:16.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:16.451 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:16.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:16.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:16.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:16.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:16.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:16.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:16.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:16.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:16.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:16.501 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:16.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:16.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:16.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:16.838 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 04:40:17.317 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 04:40:17.795 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 04:40:18.274 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 04:40:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 04:40:19.231 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 04:40:19.709 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 04:40:20.188 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 04:40:20.667 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 04:40:20.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:20.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:20.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:20.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:20.777 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:20.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:20.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:20.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:20.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:20.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:20.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:20.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:20.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:20.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:20.854 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:20.854 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:20.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:20.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:21.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:21.145 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 04:40:21.624 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 04:40:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 04:40:22.581 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 04:40:23.060 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 04:40:23.538 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 04:40:24.016 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 04:40:24.495 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 04:40:24.974 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 04:40:25.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:25.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:25.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:25.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:25.101 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:25.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:25.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:25.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:25.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:25.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:25.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:25.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:25.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:25.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:25.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:25.171 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:25.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:25.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:25.453 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 04:40:25.931 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 04:40:26.410 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 04:40:26.888 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 04:40:27.367 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 04:40:27.846 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 04:40:28.324 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 04:40:28.802 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 04:40:29.281 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 04:40:29.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:29.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:29.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:29.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:29.425 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:29.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:29.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:29.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:29.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:29.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:29.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:29.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:29.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:29.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:29.441 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:40:29.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:34.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:34.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:34.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:34.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:34.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:34.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:34.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:34.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:34.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:40:34.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:40:34.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:40:34.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:34.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:34.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:34.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:40:34.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:34.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:34.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:40:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:34.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:40:34.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:40:34.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:40:34.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:34.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:34.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:34.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:40:34.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:34.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:40:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:40:34.480 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:40:34.480 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:40:34.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:34.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:34.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:34.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:34.483 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:40:39.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:39.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:39.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:39.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:39.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:39.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:39.505 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:39.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:39.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:40:39.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:40:39.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:40:39.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:39.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:39.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:39.510 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:40:39.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:39.510 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:40:39.513 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:40:39.513 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:40:39.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:39.513 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:39.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:39.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:40:39.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:39.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:40:39.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:40:39.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:40:39.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:39.517 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:39.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:39.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:40:39.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:39.517 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:40:39.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:40:39.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:40:39.522 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:40:39.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:39.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:40:40.011 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:40:40.041 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:40:40.043 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:40:40.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.043 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:40:40.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:40.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:40.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:40.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:40.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:40.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:40:40.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:40.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:40.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:40.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:40.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:40.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:40.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:40.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:40.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:40.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:40.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:40.985 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:40:40.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:40.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:40.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:40.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:40.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:41.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:41.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:41.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:41.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:41.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:41.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:41.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:41.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:41.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:41.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:40:41.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:41.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:41.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:41.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:41.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:41.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:41.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:41.940 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:40:41.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:41.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:41.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:41.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:41.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:41.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:41.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:42.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:42.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:42.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:42.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:42.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:42.055 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:42.055 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:40:42.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.417 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:40:42.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:42.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:42.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:42.527 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:42.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:42.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:42.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:42.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:42.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:42.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:42.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:42.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:42.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:42.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:42.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:42.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:42.595 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:40:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:42.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:40:43.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:43.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:43.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:43.074 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:43.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:43.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:43.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:43.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:43.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:43.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:43.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:43.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:43.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:43.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:43.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:43.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:40:43.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:43.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:43.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:43.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:43.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:43.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:43.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:43.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:43.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:43.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:43.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:43.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:43.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:43.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:43.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:43.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:43.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:43.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:40:44.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:44.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:44.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:44.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:44.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:44.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:44.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:44.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:44.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:44.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:44.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:44.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:44.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:44.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:44.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:44.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:44.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:44.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:44.328 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:40:44.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:44.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:44.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:44.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:44.806 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:40:45.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:45.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:45.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:45.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:45.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:45.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:45.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:45.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:45.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:45.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:45.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:45.151 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:45.151 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:40:45.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.284 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:40:45.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:45.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:45.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:45.570 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:45.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:45.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:45.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:45.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:45.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:45.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:45.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:45.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:45.643 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:45.643 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:40:45.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:45.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:40:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.117 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:46.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:46.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:46.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:46.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:46.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:46.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.190 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:46.190 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:46.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.240 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:40:46.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.401 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:46.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:46.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:46.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:46.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:46.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:46.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.482 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:46.482 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:46.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.718 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:40:46.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.897 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:46.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:46.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:46.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:46.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:46.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:46.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:46.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:46.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:46.961 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:46.961 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:46.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:46.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:40:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:47.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:47.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:47.395 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:47.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:47.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:47.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:47.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:47.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:47.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:47.466 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:47.466 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:47.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.675 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:40:47.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:47.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:47.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:47.890 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:47.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:47.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:47.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:47.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:47.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:47.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:47.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:47.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:47.964 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:47.964 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:47.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:47.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:48.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:48.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:48.070 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:48.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:48.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:48.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:48.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:48.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:48.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:48.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:48.153 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:48.153 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:48.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.153 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:40:48.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:48.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:48.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:48.567 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:48.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:48.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:48.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:48.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:48.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:48.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:48.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:48.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:48.631 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:48.631 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:48.631 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:40:48.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:48.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:49.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:49.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:49.063 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:49.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:49.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:49.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:49.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:49.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:49.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:49.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:40:49.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:49.134 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:40:49.134 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:40:49.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:49.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:49.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:49.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:49.559 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:40:49.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:49.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:49.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:49.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:49.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:49.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:49.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:49.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:49.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:49.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:49.578 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:40:54.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:40:54.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:40:54.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:54.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:54.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:54.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:54.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:40:54.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:54.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:54.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:40:54.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:40:54.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:40:54.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:40:54.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:54.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:54.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:40:54.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:40:54.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:40:54.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:54.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:40:54.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:40:54.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:54.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:40:54.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:40:54.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:40:54.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:40:54.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:40:54.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:40:54.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:40:54.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:40:54.609 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:40:54.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:40:54.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:40:54.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:40:55.096 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:40:55.133 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:40:55.135 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:40:55.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:55.136 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:40:55.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:55.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:55.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:55.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:55.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:55.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:55.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:55.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:55.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:55.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:55.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:55.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:55.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:55.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:40:55.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:55.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:55.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:56.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:40:56.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:56.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:56.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:56.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:56.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:56.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:56.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:56.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:56.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:56.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:56.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:56.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:56.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:56.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:56.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:56.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:56.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:56.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:40:56.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:56.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:56.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:56.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:57.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:40:57.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:57.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:57.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:40:57.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:57.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:57.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:57.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:57.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:57.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:57.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:57.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:57.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:57.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:57.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:57.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:57.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:57.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:57.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:57.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:57.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:57.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:57.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:57.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:57.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:57.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:40:58.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:58.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:58.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:40:58.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:58.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:58.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:58.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:58.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:58.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:58.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:58.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:58.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:40:58.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:40:58.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:40:58.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:58.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:58.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:58.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:40:58.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:40:58.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:40:58.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:58.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:40:58.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:40:58.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:58.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:40:59.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:40:59.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:40:59.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:40:59.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:40:59.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:40:59.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:59.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:40:59.874 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:41:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:00.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:00.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:00.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:00.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:00.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:00.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:00.352 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:41:00.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:00.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:00.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:00.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:00.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:00.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:00.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:00.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:00.829 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:41:01.307 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:41:01.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:01.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:01.785 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:41:01.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:01.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:01.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:01.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:01.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:01.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:01.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:01.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:01.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:01.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:01.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:01.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:01.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:01.987 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:01.987 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:41:01.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:01.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:02.263 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:41:02.742 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:41:02.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:03.220 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:41:03.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:03.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:03.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:03.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:03.439 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:03.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:03.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:03.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:03.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:03.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:03.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:03.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:03.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:03.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:03.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:03.511 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:41:03.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:03.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:03.699 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:41:04.178 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:41:04.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:04.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:04.657 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:41:04.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:04.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:04.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:04.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:04.964 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:04.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:04.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:04.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:04.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:04.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:04.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:04.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:04.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:05.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:05.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:05.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:05.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:05.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:05.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:05.135 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:41:05.614 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:41:05.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:06.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:06.112 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:41:06.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:06.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:06.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:06.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:06.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:06.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:06.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:06.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:06.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:06.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:06.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:06.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:06.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:06.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:06.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:06.590 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:41:06.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:06.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:07.069 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:41:07.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:07.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:07.547 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:41:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:41:08.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:08.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:08.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:08.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:08.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:08.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:08.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:08.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:08.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:08.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:08.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:08.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:08.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:08.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:08.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:08.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:08.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:08.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:08.503 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:41:08.981 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:41:09.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:09.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:09.459 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:41:09.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:09.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:09.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:09.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:09.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:09.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:09.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:09.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:09.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:09.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:09.937 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:41:09.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:09.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:09.990 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:09.991 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:41:09.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:09.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:10.415 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:41:10.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:10.894 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:41:10.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:11.373 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:41:11.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:11.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:11.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:11.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:11.388 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:11.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:11.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:11.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:11.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:11.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:11.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:11.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:11.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:11.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:11.451 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:11.451 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:41:11.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:11.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:11.851 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:41:12.330 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:41:12.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:12.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:12.808 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:41:12.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:12.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:12.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:12.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:12.915 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:12.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:12.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:12.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:12.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:12.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:12.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:12.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:12.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:12.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:12.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:12.983 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:13.287 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:41:13.765 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:41:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:13.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:14.244 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:41:14.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:14.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:14.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:14.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:14.404 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:14.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:14.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:14.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:14.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:14.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:14.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:14.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:14.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:14.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:14.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:14.486 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:14.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:14.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:14.722 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:41:15.201 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:41:15.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:15.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:15.680 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:41:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:15.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:15.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:15.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:15.858 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:15.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:15.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:15.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:15.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:15.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:15.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:15.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:15.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:15.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:15.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:15.927 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:16.158 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:41:16.636 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:41:16.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:16.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:17.115 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:41:17.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:17.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:17.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:17.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:17.312 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:17.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:17.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:17.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:17.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:17.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:17.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:17.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:17.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:17.389 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:17.389 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:17.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:17.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:41:18.072 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:41:18.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:18.549 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:41:18.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:18.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:18.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:18.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:18.764 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:18.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:18.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:18.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:18.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:18.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:18.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:18.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:18.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:18.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:18.838 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:18.839 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:19.027 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:41:19.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:19.506 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:41:19.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:19.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:19.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:19.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:19.902 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:19.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:19.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:19.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:19.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:19.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:19.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:19.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:19.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:19.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:19.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:19.967 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:19.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:19.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:19.983 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:41:20.462 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:41:20.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:20.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:20.940 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:41:21.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:21.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:21.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:21.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:21.355 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:21.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:21.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:21.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:21.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:21.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:21.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:21.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:21.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:21.418 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:41:21.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:21.422 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:21.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:21.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:21.896 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:41:22.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:41:22.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:22.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:22.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:22.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:22.808 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:22.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:22.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:22.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:22.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:22.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:22.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:22.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:22.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:22.853 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:41:22.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:22.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:22.874 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:41:22.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:22.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:23.331 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:41:23.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:23.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:23.808 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:41:24.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:24.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:24.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:24.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:24.260 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:24.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:24.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:24.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:24.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:24.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:41:24.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:41:24.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:41:24.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:41:24.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:41:24.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:41:24.268 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:41:29.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:41:29.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:41:29.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:41:29.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:41:29.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:41:29.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:41:29.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:41:29.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:41:29.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:41:29.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:41:29.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:41:29.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:41:29.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:41:29.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:41:29.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:41:29.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:41:29.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:41:29.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:41:29.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:41:29.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:41:29.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:41:29.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:41:29.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:41:29.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:41:29.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:41:29.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:41:29.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:41:29.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:41:29.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:41:29.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:41:29.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:41:29.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:41:29.299 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:41:29.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:41:29.299 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:41:29.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:41:29.302 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:41:29.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:41:29.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:41:29.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:41:29.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:41:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:41:29.820 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:41:29.821 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:41:29.822 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:41:29.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:29.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:29.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:29.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:29.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:29.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:29.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:29.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:29.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:29.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:29.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:29.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:29.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:29.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:30.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:41:30.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:30.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:30.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:30.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:30.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:41:31.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:41:31.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:31.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:31.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:31.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:31.704 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:41:32.182 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:41:32.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:32.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:32.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:32.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:32.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:41:33.138 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:41:33.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:33.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:33.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:33.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:41:33.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:33.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:33.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:33.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:33.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:33.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:33.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:33.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:33.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:33.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:33.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:33.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:33.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:33.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:33.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:33.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:33.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:34.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:41:34.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:41:34.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:41:34.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:41:34.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:41:34.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:41:35.049 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:41:35.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:41:36.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:41:36.483 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:41:36.961 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:41:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:41:37.917 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:41:38.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:38.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:38.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:38.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:38.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:38.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:38.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:38.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:38.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:38.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:38.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:38.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:38.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:38.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:38.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:38.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:38.395 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:41:38.872 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:41:39.350 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:41:39.829 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:41:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:41:40.783 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:41:41.261 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:41:41.738 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:41:42.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:42.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:42.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:42.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:42.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:42.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:42.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:42.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:42.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:42.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:42.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:42.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:42.215 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:41:42.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:42.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:42.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:42.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:42.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:42.693 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:41:43.171 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:41:43.649 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:41:44.127 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:41:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:41:45.083 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:41:45.561 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:41:46.039 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:41:46.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:46.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:46.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:46.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:46.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:46.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:46.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:46.517 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:41:46.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:46.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:46.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:46.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:46.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:46.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:46.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:46.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:46.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:46.995 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:41:47.473 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:41:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:41:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:41:48.908 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:41:49.386 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:41:49.865 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:41:50.343 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:41:50.821 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:41:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:51.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:51.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:51.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:51.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:51.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:51.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:51.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:51.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:51.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:51.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:51.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:51.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:51.298 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:51.298 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:41:51.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:51.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:51.299 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:41:51.777 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:41:52.256 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:41:52.735 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:41:53.213 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:41:53.691 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:41:54.166 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:41:54.644 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:41:55.123 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:41:55.602 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:41:55.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:55.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:55.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:55.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:55.683 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:41:55.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:41:55.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:41:55.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:41:55.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:55.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:41:55.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:41:55.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:41:55.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:41:55.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:41:55.755 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:41:55.755 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:41:55.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:55.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:41:56.080 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:41:56.556 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:41:57.034 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:41:57.512 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:41:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:41:58.470 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:41:58.949 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:41:59.428 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:41:59.906 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:42:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:00.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:00.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:00.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:00.129 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:00.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:00.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:00.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:00.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:00.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:00.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:00.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:00.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:00.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:42:00.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:00.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:00.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:00.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:00.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:00.383 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:42:00.861 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:42:01.340 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:42:01.818 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:42:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:42:02.774 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:42:03.252 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:42:03.731 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:42:04.209 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:42:04.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:04.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:04.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:04.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:04.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:04.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:04.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:04.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:04.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:04.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:04.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:04.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:04.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:04.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:04.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:04.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:04.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:04.687 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:42:05.165 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:42:05.643 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:42:06.121 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:42:06.600 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:42:07.079 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:42:07.557 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:42:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:42:08.513 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:42:08.992 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:42:09.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:09.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:09.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:09.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:09.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:09.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:09.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:09.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:09.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:09.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:09.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:09.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:09.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:42:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:09.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:09.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:09.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:09.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:42:09.948 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:42:10.426 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:42:10.905 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:42:11.383 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:42:11.861 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:42:12.339 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:42:12.818 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:42:13.296 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:42:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:13.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:13.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:13.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:13.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:13.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:13.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:13.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:13.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:13.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:13.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:13.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:13.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:13.427 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:13.427 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:42:13.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:13.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:13.774 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:42:14.253 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:42:14.732 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:42:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:42:15.689 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:42:16.169 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:42:16.648 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:42:17.126 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:42:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:42:17.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:17.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:17.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:17.753 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:17.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:17.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:17.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:17.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:17.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:17.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:17.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:17.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:17.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:17.820 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:17.820 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:42:17.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:17.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:18.084 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:42:18.563 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:42:19.041 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:42:19.520 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:42:19.998 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:42:20.477 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:42:20.955 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:42:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:42:21.910 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:42:22.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:22.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:22.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:22.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:22.201 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:22.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:22.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:22.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:22.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:22.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:22.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:22.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:22.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:22.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:22.272 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:22.273 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:22.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:22.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:22.389 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:42:22.867 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:42:23.345 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:42:23.822 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:42:24.301 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:42:24.778 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:42:25.256 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:42:25.735 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:42:26.213 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:42:26.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:26.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:26.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:26.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:26.374 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:26.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:26.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:26.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:26.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:26.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:26.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:26.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:26.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:26.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:26.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:26.456 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:26.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:26.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:26.692 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:42:27.170 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:42:27.648 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:42:28.127 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:42:28.605 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:42:29.083 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:42:29.561 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:42:30.040 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:42:30.519 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:42:30.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:30.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:30.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:30.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:30.697 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:30.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:30.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:30.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:30.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:30.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:30.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:30.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:30.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:30.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:30.790 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:30.791 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:30.997 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:42:31.476 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:42:31.954 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:42:32.433 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 04:42:32.911 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 04:42:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 04:42:33.869 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 04:42:34.347 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 04:42:34.826 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 04:42:35.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:35.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:35.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:35.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:35.024 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:35.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:35.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:35.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:35.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:35.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:35.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:35.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:35.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:35.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:35.095 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:35.095 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:35.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:35.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:35.303 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 04:42:35.781 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 04:42:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 04:42:36.738 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 04:42:37.216 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 04:42:37.694 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 04:42:38.173 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 04:42:38.650 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 04:42:39.129 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 04:42:39.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:39.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:39.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:39.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:39.345 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:39.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:39.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:39.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:39.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:39.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:39.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:39.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:39.408 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:39.408 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:39.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:39.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 04:42:40.086 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 04:42:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 04:42:41.042 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 04:42:41.520 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 04:42:41.999 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 04:42:42.477 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 04:42:42.956 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 04:42:43.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:43.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:43.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:43.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:43.352 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:43.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:43.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:43.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:43.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:43.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:43.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:43.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:43.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:43.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:43.432 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 04:42:43.432 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:43.433 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:43.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:43.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:43.911 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 04:42:44.389 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 04:42:44.868 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 04:42:45.346 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 04:42:45.825 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 04:42:46.303 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 04:42:46.782 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 04:42:47.259 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 04:42:47.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:47.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:47.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:47.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:47.673 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:47.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:47.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:47.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:47.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:47.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:47.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:47.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:47.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 04:42:47.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:47.739 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:47.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:47.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:48.216 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 04:42:48.695 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 04:42:49.172 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 04:42:49.651 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 04:42:50.130 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 04:42:50.609 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 04:42:51.087 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 04:42:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 04:42:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:51.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:51.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:51.999 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:52.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:52.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:52.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:42:52.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:52.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:42:52.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:42:52.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:42:52.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:42:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 04:42:52.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:52.067 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:42:52.067 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:42:52.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:52.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:52.522 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 04:42:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 04:42:53.478 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 04:42:53.956 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 04:42:54.434 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 04:42:54.913 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 04:42:55.391 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 04:42:55.869 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 04:42:56.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:42:56.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:42:56.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:42:56.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:42:56.320 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:42:56.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:42:56.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:42:56.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:42:56.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:42:56.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:42:56.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:42:56.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:42:56.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:42:56.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:42:56.330 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:42:56.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:01.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:43:01.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:43:01.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:43:01.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:43:01.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:01.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:43:01.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:43:01.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:43:01.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:01.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:43:01.350 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:43:01.354 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:43:01.354 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:43:01.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:43:01.354 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:01.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:43:01.355 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:43:01.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:43:01.355 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:43:01.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:43:01.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:43:01.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:43:01.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:01.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:43:01.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:43:01.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:43:01.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:43:01.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:43:01.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:43:01.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:43:01.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:01.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:01.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:43:01.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:43:01.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:43:01.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:43:01.375 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:43:01.375 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:43:01.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:01.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:43:01.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:43:01.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:43:01.378 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:43:06.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:43:06.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:43:06.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:43:06.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:43:06.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:06.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:43:06.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:43:06.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:43:06.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:06.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:43:06.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:43:06.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:43:06.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:43:06.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:43:06.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:06.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:43:06.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:43:06.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:43:06.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:43:06.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:43:06.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:43:06.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:43:06.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:43:06.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:43:06.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:43:06.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:43:06.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:43:06.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:43:06.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:43:06.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:43:06.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:43:06.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:43:06.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:43:06.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:43:06.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:43:06.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:43:06.436 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:43:06.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:43:06.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:43:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:43:06.961 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:43:06.963 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:43:06.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:06.964 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:43:06.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:06.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:06.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:06.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:06.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:06.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:06.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:06.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:07.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:07.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:07.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:07.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:07.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:07.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:43:07.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:43:07.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:43:07.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:43:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:43:07.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:43:08.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:43:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:43:08.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:43:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:43:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:43:08.836 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:43:09.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:43:09.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:43:09.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:43:09.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:43:09.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:43:09.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:43:10.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:43:10.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:43:10.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:43:10.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:43:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:43:10.749 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:43:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:11.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:11.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:11.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:11.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:11.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:11.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:11.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:11.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:11.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:11.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:11.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:11.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:11.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:11.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:11.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:11.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:43:11.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:43:11.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:43:11.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:43:11.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:43:11.705 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:43:12.183 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:43:12.661 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:43:13.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:43:13.617 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:43:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:43:14.573 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:43:15.051 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:43:15.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:15.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:15.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:15.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:15.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:15.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:15.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:15.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:15.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:15.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:15.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:15.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:15.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:15.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:15.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:15.529 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:43:16.006 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:43:16.484 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:43:16.963 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:43:17.440 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:43:17.918 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:43:18.395 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:43:18.873 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:43:19.351 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:43:19.829 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:43:19.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:19.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:19.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:19.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:19.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:19.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:19.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:19.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:19.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:19.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:19.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:19.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:19.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:19.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:19.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:19.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:19.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:20.307 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:43:20.785 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:43:21.262 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:43:21.740 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:43:22.218 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:43:22.696 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:43:23.174 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:43:23.652 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:43:24.130 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:43:24.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:24.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:24.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:24.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:24.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:24.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:24.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:24.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:24.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:24.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:24.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:24.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:24.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:24.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:24.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:24.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:24.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:24.608 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:43:25.085 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:43:25.563 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:43:26.041 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:43:26.520 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:43:26.998 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:43:27.476 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:43:27.954 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:43:28.432 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:43:28.910 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:43:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:28.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:28.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:28.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:28.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:28.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:28.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:28.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:28.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:28.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:28.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:28.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:28.990 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:43:28.990 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:43:28.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:28.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:29.388 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:43:29.866 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:43:30.344 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:43:30.822 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:43:31.301 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:43:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:43:32.257 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:43:32.735 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:43:33.213 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:43:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:33.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:33.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:33.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:33.380 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:43:33.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:33.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:33.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:33.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:33.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:33.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:33.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:33.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:33.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:33.454 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:43:33.455 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:43:33.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:33.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:33.692 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:43:34.171 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:43:34.649 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:43:35.128 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:43:35.607 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:43:36.086 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:43:36.565 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:43:37.044 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:43:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:43:37.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:37.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:37.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:37.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:37.828 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:43:37.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:37.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:37.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:37.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:37.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:37.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:37.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:37.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:37.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:37.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:37.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:37.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:37.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:37.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:43:38.478 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:43:38.956 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:43:39.434 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:43:39.912 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:43:40.391 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:43:40.867 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:43:41.345 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:43:41.820 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:43:42.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:42.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:42.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:42.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:42.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:42.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:42.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:42.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:42.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:42.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:42.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:42.298 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:43:42.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:42.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:42.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:42.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:42.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:42.776 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:43:43.255 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:43:43.734 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:43:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:43:44.691 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:43:45.169 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:43:45.648 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:43:46.126 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:43:46.605 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:43:46.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:46.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:46.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:46.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:46.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:46.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:46.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:46.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:46.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:46.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:46.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:46.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:46.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:43:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:46.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:46.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:46.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:46.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:47.083 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:43:47.561 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:43:48.040 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:43:48.518 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:43:48.996 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:43:49.475 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:43:49.953 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:43:50.431 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:43:50.909 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:43:51.388 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:43:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:43:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:52.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:52.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:52.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:52.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:52.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:52.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:52.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:52.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:52.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:52.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:52.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:52.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:43:52.107 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:43:52.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:52.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:43:52.822 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:43:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:43:53.778 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:43:54.256 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:43:54.735 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:43:55.214 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:43:55.693 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:43:56.172 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:43:56.650 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:43:56.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:56.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:56.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:56.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:56.908 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:43:56.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:43:56.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:43:56.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:43:56.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:56.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:43:56.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:43:56.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:43:56.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:43:56.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:43:56.966 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:43:56.966 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:43:56.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:56.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:43:57.127 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:43:57.607 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:43:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:43:58.564 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:43:59.044 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:43:59.522 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:44:00.001 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:44:00.480 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:44:00.959 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:44:01.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:01.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:01.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:01.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:01.358 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:01.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:01.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:01.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:01.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:01.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:01.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:01.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:01.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:01.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:01.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:01.437 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:01.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:01.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:44:01.916 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:44:02.395 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:44:02.874 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:44:03.352 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:44:03.830 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:44:04.309 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:44:04.787 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:44:05.265 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:44:05.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:05.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:05.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:05.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:05.556 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:05.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:05.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:05.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:05.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:05.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:05.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:05.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:05.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:05.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:05.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:05.632 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:05.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:05.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:05.742 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:44:06.220 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:44:06.699 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:44:07.177 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:44:07.656 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:44:08.133 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:44:08.612 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:44:09.090 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:44:09.568 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 04:44:09.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:09.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:09.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:09.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:09.879 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:09.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:09.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:09.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:09.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:09.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:09.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:09.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:09.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:09.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:09.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:09.948 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:09.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:09.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:10.046 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 04:44:10.524 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 04:44:11.002 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 04:44:11.481 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 04:44:11.960 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 04:44:12.438 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 04:44:12.917 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 04:44:13.395 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 04:44:13.872 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 04:44:14.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:14.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:14.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:14.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:14.200 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:14.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:14.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:14.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:14.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:14.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:14.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:14.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:14.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:14.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:14.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:14.271 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:14.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:14.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 04:44:14.828 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 04:44:15.306 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 04:44:15.785 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 04:44:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 04:44:16.742 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 04:44:17.220 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 04:44:17.698 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 04:44:18.176 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 04:44:18.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:18.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:18.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:18.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:18.524 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:18.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:18.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:18.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:18.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:18.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:18.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:18.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:18.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:18.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:18.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:18.590 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:18.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:18.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:18.654 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 04:44:19.133 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 04:44:19.611 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 04:44:20.089 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 04:44:20.567 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 04:44:21.045 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 04:44:21.523 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 04:44:22.002 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 04:44:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 04:44:22.958 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 04:44:23.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:23.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:23.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:23.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:23.007 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:23.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:23.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:23.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:23.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:23.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:23.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:23.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:23.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:23.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:23.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:23.078 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:23.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:23.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:23.435 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 04:44:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 04:44:24.391 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 04:44:24.869 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 04:44:25.348 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 04:44:25.826 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 04:44:26.305 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 04:44:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 04:44:27.262 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 04:44:27.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:27.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:27.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:27.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:27.327 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:27.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:27.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:27.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:27.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:27.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:27.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:27.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:27.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:27.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:27.394 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:27.394 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:27.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:27.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:27.740 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 04:44:28.218 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 04:44:28.697 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 04:44:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 04:44:29.653 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 04:44:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 04:44:30.610 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 04:44:31.089 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 04:44:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 04:44:31.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:31.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:31.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:31.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:31.652 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:31.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:31.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:31.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:31.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:31.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:31.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:31.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:31.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:31.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:31.712 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:31.712 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:44:31.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:31.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:32.044 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 04:44:32.522 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 04:44:33.001 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 04:44:33.479 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 04:44:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 04:44:34.436 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 04:44:34.914 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 04:44:35.393 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 04:44:35.872 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-12 04:44:35.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:35.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:35.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:35.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:35.974 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:35.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:35.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:35.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:35.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:35.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:35.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:35.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:35.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:44:35.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:44:35.981 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:44:35.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:40.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:44:40.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:44:40.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:40.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:40.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:40.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:40.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:41.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:44:41.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:41.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:44:41.000 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:44:41.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:44:41.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:44:41.004 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:44:41.008 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:44:41.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:44:41.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:44:41.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:44:41.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:44:41.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:44:41.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:41.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:41.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:44:41.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:44:41.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:44:41.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:44:41.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:44:41.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:44:41.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:44:41.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:44:41.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:44:41.018 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:44:41.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:41.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:41.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:44:41.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:44:41.020 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:44:46.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:44:46.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:44:46.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:46.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:46.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:46.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:46.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:44:46.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:44:46.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:46.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:44:46.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:44:46.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:44:46.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:44:46.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:44:46.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:46.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:44:46.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:44:46.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:44:46.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:44:46.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:44:46.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:44:46.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:44:46.058 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:46.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:44:46.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:44:46.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:44:46.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:44:46.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:44:46.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:44:46.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:44:46.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:44:46.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:44:46.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:44:46.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:44:46.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:44:46.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:44:46.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:44:46.068 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:44:46.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:44:46.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:44:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:44:46.589 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:44:46.590 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:44:46.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:46.592 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:44:46.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:46.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:46.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:46.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:46.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:46.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:46.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:46.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:46.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:46.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:46.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:46.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:46.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:47.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:44:47.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:47.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:47.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:47.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:47.509 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:44:47.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:47.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:47.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:47.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:47.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:47.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:47.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:47.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:47.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:47.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:47.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:47.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:47.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:47.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:47.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:47.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:47.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:47.987 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:44:48.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:48.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:48.465 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:44:48.943 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:44:49.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:49.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:49.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:49.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:49.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:49.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:49.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:49.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:49.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:49.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:49.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:49.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:49.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:49.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:49.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:49.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:49.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:49.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:49.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:49.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:49.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:49.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:44:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:44:50.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:50.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:50.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:50.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:50.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:50.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:50.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:50.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:50.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:50.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:50.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:50.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:50.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:50.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:50.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:50.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:50.376 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:44:50.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:50.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:50.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:50.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:50.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:50.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:44:51.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:44:51.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:44:51.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:44:51.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:44:51.332 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:44:51.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:51.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:51.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:51.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:51.810 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:44:51.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:51.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:51.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:51.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:51.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:51.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:51.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:51.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:51.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:51.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:51.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:51.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:52.288 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:44:52.766 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:44:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:44:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:53.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:53.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:53.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:53.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:53.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:53.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:53.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:53.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:53.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:53.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:53.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:53.444 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:53.444 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:44:53.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:53.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:53.722 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:44:54.200 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:44:54.679 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:44:54.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:54.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:54.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:54.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:54.900 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:54.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:54.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:54.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:54.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:54.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:54.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:54.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:54.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:54.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:54.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:44:54.968 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:44:54.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:54.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:55.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:44:55.636 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:44:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:44:56.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:56.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:56.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:56.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:56.419 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:44:56.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:56.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:56.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:56.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:56.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:56.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:56.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:56.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:56.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:56.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:56.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:56.590 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:44:57.069 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:44:57.548 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:44:57.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:57.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:57.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:57.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:57.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:57.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:57.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:57.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:57.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:57.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:57.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:57.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:58.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:58.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:58.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:58.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:58.024 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:44:58.503 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:44:58.982 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:44:59.460 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:44:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:59.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:59.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:59.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:59.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:44:59.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:44:59.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:44:59.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:59.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:59.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:59.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:44:59.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:44:59.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:44:59.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:44:59.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:44:59.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:44:59.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:59.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:44:59.938 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:45:00.416 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:45:00.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:00.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:00.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:00.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:00.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:00.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:00.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:00.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:00.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:00.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:00.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:00.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:00.894 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:45:00.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:00.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:00.948 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:45:00.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:00.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:01.373 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:45:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:45:02.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:02.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:02.330 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:45:02.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:02.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:02.330 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:02.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:02.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:02.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:02.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:02.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:02.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:02.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:02.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:02.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:02.398 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:02.398 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:45:02.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:02.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:02.808 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:45:03.287 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:45:03.766 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:45:03.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:03.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:03.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:03.865 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:03.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:03.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:03.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:03.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:03.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:03.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:03.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:03.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:03.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:03.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:03.934 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:03.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:03.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:04.244 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:45:04.723 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:45:05.201 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:45:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:05.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:05.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:05.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:05.362 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:05.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:05.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:05.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:05.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:05.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:05.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:05.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:05.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:05.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:05.430 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:05.431 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:05.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:05.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:05.679 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:45:06.158 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:45:06.636 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:45:06.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:06.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:06.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:06.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:06.815 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:06.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:06.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:06.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:06.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:06.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:06.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:06.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:06.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:06.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:06.891 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:06.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:06.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:45:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:45:08.071 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:45:08.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:08.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:08.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:08.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:08.269 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:08.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:08.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:08.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:08.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:08.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:08.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:08.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:08.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:08.342 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:08.342 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:08.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:08.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:08.548 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:45:09.026 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:45:09.505 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:45:09.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:09.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:09.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:09.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:09.720 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:09.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:09.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:09.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:09.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:09.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:09.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:09.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:09.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:09.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:09.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:09.779 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:09.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:09.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:09.982 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:45:10.461 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:45:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:10.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:10.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:10.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:10.857 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:10.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:10.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:10.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:10.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:10.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:10.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:10.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:10.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:10.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:10.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:10.915 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:10.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:10.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:10.939 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:45:11.418 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:45:11.896 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:45:12.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:12.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:12.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:12.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:12.311 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:12.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:12.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:12.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:12.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:12.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:12.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:12.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:12.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:12.374 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:45:12.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:12.383 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:12.383 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:12.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:12.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:12.852 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:45:13.330 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:45:13.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:13.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:13.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:13.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:13.763 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:13.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:13.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:13.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:13.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:13.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:13.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:13.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:13.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:45:13.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:13.830 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:13.831 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:13.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:13.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:14.287 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:45:14.765 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:45:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:15.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:15.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:15.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:15.217 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:15.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:15.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:15.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:15.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:15.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:15.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:15.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:15.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:15.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:45:15.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:45:15.224 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:15.224 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6221 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:20.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:45:20.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:45:20.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:20.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:20.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:20.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:45:20.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:20.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:45:20.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:45:20.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:45:20.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:45:20.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:45:20.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:20.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:20.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:45:20.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:45:20.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:45:20.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:45:20.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:45:20.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:45:20.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:20.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:20.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:45:20.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:45:20.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:45:20.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:45:20.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:45:20.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:45:20.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:45:20.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:45:20.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:45:20.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:45:20.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:45:20.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:45:20.262 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:45:20.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:20.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:20.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:45:20.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:45:20.785 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:45:20.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:20.789 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:45:20.790 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:45:20.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:20.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:20.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:20.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:20.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:20.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:20.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:20.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:20.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:20.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:20.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:20.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:20.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:21.228 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:45:21.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:21.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:21.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:21.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:21.706 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:45:22.184 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:45:22.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:22.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:22.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:22.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:22.663 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:45:23.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:45:23.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:23.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:23.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:23.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:23.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:45:23.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:24.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:45:24.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:24.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:24.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:24.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:24.575 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:45:24.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:24.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:24.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:24.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:24.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:24.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:24.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:24.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:24.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:24.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:24.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:24.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:24.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:24.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:24.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:25.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:45:25.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:25.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:25.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:25.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:25.532 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:45:26.011 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:45:26.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:45:26.968 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:45:27.446 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:45:27.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:27.925 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:45:28.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:28.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:28.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:28.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:28.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:28.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:28.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:28.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:28.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:28.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:28.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:28.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:28.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:28.122 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:28.122 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:45:28.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:28.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:28.401 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:45:28.877 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:45:29.356 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:45:29.834 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:45:30.312 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:45:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:45:31.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:31.270 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:45:31.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:31.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:31.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:31.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:31.717 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:31.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:31.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:31.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:31.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:31.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:31.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:31.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:31.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:31.743 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:45:31.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:31.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:45:32.227 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:45:32.706 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:45:33.185 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:45:33.663 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:45:34.142 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:45:34.621 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:45:34.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:35.100 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:45:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:45:35.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:35.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:35.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:35.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:35.630 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:35.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:35.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:35.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:35.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:35.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:35.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:35.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:35.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:35.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:35.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:35.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:35.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:35.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:36.057 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:45:36.536 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:45:37.014 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:45:37.492 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:45:37.970 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:45:38.448 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:45:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:38.925 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:45:39.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:39.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:39.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:39.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:39.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:39.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:39.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:39.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:39.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:39.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:39.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:39.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:39.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:39.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:39.404 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:45:39.882 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:45:40.359 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:45:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:45:41.313 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:45:41.791 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:45:42.269 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:45:42.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:42.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:42.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:42.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:42.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:42.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:42.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:42.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:42.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:42.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:42.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:42.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:42.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:45:42.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:42.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:42.779 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:42.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:42.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:43.226 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:45:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:45:44.183 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:45:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:45:45.140 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:45:45.618 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:45:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:46.097 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:45:46.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:46.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:46.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:46.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:46.491 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:46.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:46.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:46.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:46.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:46.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:46.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:46.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:46.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:45:46.519 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:45:46.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:46.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:46.576 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:45:47.054 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:45:47.533 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:45:48.011 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:45:48.490 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:45:48.968 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:45:49.447 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:45:49.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:49.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:49.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:49.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:49.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:49.842 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:45:49.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:49.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:49.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:45:49.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:45:49.848 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:45:49.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:54.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:45:54.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:45:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:54.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:54.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:45:54.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:45:54.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:54.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:45:54.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:45:54.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:45:54.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:45:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:45:54.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:54.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:45:54.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:45:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:45:54.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:45:54.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:45:54.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:45:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:45:54.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:54.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:45:54.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:45:54.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:45:54.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:45:54.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:45:54.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:45:54.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:45:54.882 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:45:54.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:45:54.882 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:45:54.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:45:54.882 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:45:54.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:45:54.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:45:54.888 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:45:54.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:45:54.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:45:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:45:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:45:55.403 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:45:55.404 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:45:55.404 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:45:55.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:55.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:55.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:55.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:55.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:55.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:55.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:55.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:55.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:55.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:55.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:55.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:55.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:55.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:55.851 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:45:55.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:55.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:55.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:55.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:56.330 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:45:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:45:56.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:56.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:56.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:56.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:57.287 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:45:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:45:57.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:57.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:57.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:57.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:58.243 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:45:58.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:58.721 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:45:58.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:58.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:58.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:58.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:45:59.200 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:45:59.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:45:59.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:59.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:45:59.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:45:59.298 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=939 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:59.298 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=939 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:59.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:45:59.298 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=939 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:59.298 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=939 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:59.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:59.298 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=939 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:45:59.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:59.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:59.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:45:59.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:45:59.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:45:59.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:45:59.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:45:59.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:59.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:45:59.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:45:59.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:45:59.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:45:59.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:45:59.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:00.156 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:46:00.635 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:46:01.112 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:46:01.591 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:46:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:46:02.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:02.547 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:46:03.026 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:46:03.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:03.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:03.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:03.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:03.175 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=1768 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:03.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:03.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:03.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:03.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:03.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:03.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:03.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:03.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:03.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:03.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:03.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:46:03.982 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:46:04.460 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:46:04.938 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:46:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:46:05.895 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:46:06.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:06.373 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:46:06.851 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:46:07.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:07.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:07.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:07.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:07.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:07.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:07.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:07.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:07.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:07.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:07.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:07.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:07.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:07.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:07.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:07.330 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:46:07.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:07.808 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:46:08.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:08.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:08.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:08.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:08.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:08.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:08.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:08.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:08.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:08.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:08.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:08.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:08.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:08.122 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:08.122 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:46:08.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:08.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:08.286 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:46:08.762 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:46:09.241 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:46:09.719 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:46:10.198 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:46:10.676 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:46:11.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:11.155 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:46:11.634 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:46:11.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:11.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:11.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:11.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:11.713 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:11.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:11.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:11.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:11.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:11.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:11.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:11.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:11.730 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:11.730 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:46:11.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:11.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:12.113 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:46:12.592 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:46:13.071 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:46:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:46:14.028 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:46:14.507 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:46:14.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:14.986 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:46:15.465 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:46:15.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:15.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:15.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:15.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:15.617 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:15.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:15.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:15.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:15.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:15.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:15.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:15.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:15.652 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:15.653 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:46:15.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:15.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:15.943 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:46:16.422 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:46:16.901 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:46:17.379 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:46:17.858 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:46:18.333 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:46:18.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:46:19.290 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:46:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:19.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:19.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:19.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:19.516 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:19.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:19.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:19.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:19.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:19.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:19.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:19.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:19.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:19.528 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:46:19.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:19.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:19.769 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:46:20.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:20.248 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:46:20.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:20.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:20.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:20.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:20.493 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:20.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:20.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:20.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:20.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:20.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:20.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:20.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:20.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:20.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:20.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:20.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:20.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:20.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:46:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:46:21.682 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:46:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:46:22.638 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:46:23.116 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:46:23.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:23.594 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:46:24.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:24.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:24.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:24.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:24.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:24.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:24.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:24.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:24.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:24.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:24.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:24.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:24.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:24.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:24.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:24.072 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:46:24.550 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:46:25.028 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:46:25.506 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:46:25.984 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:46:26.463 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:46:26.941 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:46:27.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:27.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:27.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:27.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:27.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:27.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:27.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:27.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:27.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:27.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:27.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:27.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:27.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:27.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:27.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:27.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:27.419 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:46:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:46:28.376 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:46:28.853 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:46:29.331 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:46:29.809 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:46:30.287 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:46:30.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:30.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:30.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:30.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:30.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:30.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:30.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:30.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:30.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:30.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:30.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:30.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:30.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:30.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:30.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:30.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:30.764 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:46:31.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:31.242 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:46:31.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:31.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:31.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:31.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:31.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:31.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:31.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:31.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:31.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:31.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:31.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:31.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:31.719 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:46:31.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:31.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:31.742 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:46:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:32.196 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:46:32.675 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:46:33.153 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:46:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:46:34.110 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:46:34.588 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:46:34.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:35.066 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:46:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:35.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:35.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:35.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:35.460 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:35.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:35.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:35.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:35.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:35.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:35.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:35.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:35.488 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:35.488 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:46:35.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:35.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:35.544 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:46:36.023 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:46:36.501 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:46:36.979 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:46:37.458 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:46:37.936 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:46:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:46:38.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:38.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:38.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:38.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:38.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:38.811 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:38.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:38.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:38.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:38.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:38.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:38.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:38.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:38.837 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:38.837 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:46:38.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:38.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:38.892 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:46:39.371 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:46:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:46:40.327 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:46:40.805 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:46:41.284 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:46:41.762 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:46:41.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:42.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:42.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:42.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:42.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:42.159 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:42.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:42.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:42.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:42.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:42.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:42.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:42.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:46:42.186 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:46:42.186 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:46:42.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:42.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:42.241 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:46:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:46:42.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:43.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:43.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:43.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:43.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:43.115 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:46:43.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:43.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:43.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:43.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:43.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:46:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:46:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:46:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:46:43.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:46:43.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:46:43.131 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:46:48.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:46:48.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:46:48.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:46:48.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:46:48.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:46:48.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:46:48.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:46:48.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:46:48.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:46:48.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:46:48.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:46:48.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:46:48.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:46:48.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:46:48.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:46:48.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:46:48.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:46:48.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:46:48.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:46:48.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:46:48.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:46:48.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:46:48.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:46:48.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:46:48.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:46:48.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:46:48.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:46:48.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:46:48.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:46:48.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:46:48.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:46:48.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:46:48.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:46:48.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:46:48.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:46:48.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:46:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:46:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:46:48.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:46:48.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:46:48.168 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:46:48.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:46:48.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:46:48.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:46:48.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:46:48.686 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:46:48.687 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:46:48.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:46:48.689 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:46:48.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:48.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:48.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:46:48.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:46:48.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:46:48.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:46:48.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:46:48.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:46:49.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:46:49.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:49.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:49.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:46:50.087 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:46:50.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:50.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:50.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:46:51.036 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:46:51.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:51.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:51.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:51.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:51.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:46:51.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:46:52.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:52.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:46:52.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:46:53.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:53.414 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:46:53.891 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:46:54.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:46:54.844 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:46:55.322 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:46:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:46:56.277 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:46:56.755 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:46:57.229 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:46:57.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:46:57.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:46:57.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:46:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:46:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:46:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:46:57.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:46:57.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:46:57.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:46:57.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:46:57.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:46:57.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:46:57.554 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:46:57.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.554 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:46:57.555 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:02.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:02.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:02.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:02.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:02.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:02.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:02.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:02.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:02.566 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:02.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:02.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:47:02.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:47:02.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:47:02.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:02.570 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:02.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:02.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:47:02.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:02.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:47:02.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:47:02.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:47:02.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:02.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:02.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:02.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:47:02.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:02.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:47:02.575 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:47:02.575 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:47:02.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:02.575 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:02.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:02.576 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:47:02.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:02.576 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:47:02.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:47:02.579 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:47:02.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:02.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:02.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:47:03.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:47:03.093 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:03.094 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:47:03.094 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:47:03.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:03.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:03.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:03.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:47:03.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:03.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:03.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:03.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:04.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:47:04.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:47:04.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:04.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:04.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:04.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:04.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:47:05.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:47:05.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:05.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:05.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:05.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:05.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:47:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:47:06.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:06.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:06.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:06.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:06.864 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:47:07.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:47:07.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:07.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:07.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:07.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:07.818 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:47:08.291 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:47:08.764 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:47:09.237 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:47:09.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:47:10.187 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:47:10.661 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:47:11.135 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:47:11.609 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:47:11.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:11.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:11.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:11.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:11.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:11.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:11.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:11.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:11.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:11.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:11.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:11.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:11.950 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:47:11.950 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:11.950 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:11.950 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:11.950 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:11.951 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:16.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:16.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:16.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:16.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:16.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:16.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:16.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:16.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:16.962 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:47:16.965 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:47:16.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:47:16.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:16.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:16.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:16.966 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:47:16.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:16.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:47:16.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:47:16.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:47:16.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:16.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:16.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:16.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:47:16.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:16.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:47:16.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:47:16.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:47:16.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:16.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:16.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:16.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:47:16.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:16.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:47:16.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:47:16.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:47:16.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:47:16.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:47:16.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:47:16.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:47:16.977 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:47:16.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:16.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:47:17.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:47:17.499 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:17.501 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:47:17.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:17.503 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:47:17.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:17.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:17.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:17.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:47:17.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:17.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:17.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:17.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:18.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:47:18.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:18.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:18.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:18.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:18.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:18.897 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:47:18.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:18.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:18.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:18.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:19.371 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:47:19.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:47:19.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:19.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:19.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:19.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:20.327 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:47:20.804 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:47:20.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:20.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:20.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:20.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:21.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:47:21.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:47:21.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:21.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:21.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:21.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:22.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:47:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:47:23.173 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:47:23.647 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:47:24.123 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:47:24.597 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:47:25.075 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:47:25.549 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:47:26.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:47:26.497 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:47:26.972 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:47:27.446 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:47:27.924 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:47:28.402 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:47:28.879 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:47:29.357 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:47:29.835 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:47:30.313 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:47:30.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:30.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:30.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:30.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:30.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:30.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:30.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:30.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:30.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:30.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:30.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:30.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:30.400 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:47:30.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2876 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:35.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:35.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:35.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:35.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:35.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:35.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:35.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:35.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:35.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:35.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:35.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:47:35.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:47:35.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:47:35.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:35.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:35.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:35.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:47:35.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:35.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:35.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:47:35.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:35.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:35.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:47:35.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:35.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:47:35.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:47:35.426 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:47:35.427 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:35.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:35.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:35.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:47:35.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:47:35.941 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:35.942 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:47:35.942 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:47:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:35.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:35.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:35.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:36.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:47:36.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:36.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:36.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:36.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:36.870 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:47:36.960 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:37.349 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:47:37.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:37.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:37.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:37.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:37.469 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:37.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:47:37.978 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:38.304 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:47:38.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:38.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:38.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:38.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:38.781 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:47:39.259 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:47:39.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:39.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:39.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:39.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:39.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:47:40.004 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:40.214 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:47:40.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:40.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:40.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:40.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:40.512 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:40.692 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:47:41.019 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:41.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:47:41.528 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:41.645 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:47:42.122 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:47:42.600 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:47:43.078 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:47:43.535 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:43.556 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:47:44.033 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:47:44.512 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:47:44.989 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:47:45.468 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:47:45.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:45.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:45.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:45.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:45.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:45.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:45.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:45.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:45.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:45.561 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:47:45.561 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.561 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.561 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2162 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.562 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:45.563 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:47:50.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:50.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:50.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:50.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:50.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:50.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:50.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:50.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:50.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:50.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:50.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:47:50.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:47:50.590 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:47:50.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:50.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:50.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:50.591 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:47:50.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:50.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:47:50.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:47:50.594 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:47:50.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:50.594 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:50.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:50.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:47:50.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:50.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:47:50.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:47:50.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:47:50.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:50.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:50.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:50.598 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:47:50.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:50.598 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:47:50.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:47:50.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:47:50.603 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:47:50.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:50.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:50.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:50.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:47:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:47:51.128 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:51.129 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:47:51.131 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:47:51.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:51.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:51.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:51.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:51.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:51.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:51.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:51.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:51.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:51.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:51.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:47:51.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:51.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:51.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:51.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:51.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:51.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:51.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:51.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:51.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:51.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:51.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:51.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:47:52.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.133 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.134 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:47:52.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.138 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.190 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.190 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:47:52.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.200 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:52.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.374 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:47:52.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.387 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.416 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.416 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:47:52.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.431 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.463 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.463 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:52.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.515 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:47:52.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.584 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:52.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:52.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.661 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.661 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:52.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:52.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.837 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:52.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:52.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:52.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:52.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:52.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:52.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:52.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:52.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:52.897 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:52.897 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:52.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:52.993 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:47:53.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.108 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:53.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:53.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:53.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:53.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:53.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:53.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:53.186 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:53.186 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:53.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.354 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:53.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:53.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:53.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:53.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:53.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:53.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:53.421 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:53.421 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:53.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.470 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:47:53.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:53.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:53.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:53.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.615 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:53.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:53.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:53.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:53.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:53.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:53.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:53.656 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:53.656 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:53.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:53.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.868 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:53.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:53.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:53.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:53.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:53.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:53.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:53.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:53.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:47:53.951 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:53.951 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:53.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:53.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:54.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:54.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:54.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:54.138 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:54.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:54.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:54.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:54.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:54.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:54.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:54.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:47:54.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:47:54.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:47:54.192 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:47:54.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:54.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:54.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:54.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:54.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:54.384 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:47:54.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:47:54.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:47:54.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:47:54.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:47:54.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:54.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:54.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:54.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:54.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:54.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:54.393 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:47:59.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:47:59.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:47:59.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:59.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:59.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:59.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:59.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:47:59.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:59.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:59.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:47:59.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:47:59.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:47:59.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:47:59.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:59.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:59.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:47:59.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:47:59.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:47:59.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:59.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:47:59.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:47:59.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:59.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:47:59.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:47:59.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:47:59.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:47:59.425 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:47:59.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:47:59.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:47:59.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:47:59.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:47:59.943 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:47:59.944 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:47:59.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:47:59.945 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:47:59.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:47:59.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:47:59.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:47:59.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:47:59.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:47:59.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:47:59.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:47:59.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:48:00.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 04:48:00.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:48:00.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:48:00.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:48:00.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:48:00.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:48:00.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:00.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:00.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:00.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:00.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:48:01.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:48:01.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:01.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:01.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:01.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:48:02.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:48:02.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:48:02.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:02.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:02.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:02.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:02.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:02.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:02.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:02.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:02.081 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:02.081 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:48:02.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:02.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:02.081 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:48:07.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:07.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:07.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:07.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:07.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:07.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:07.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:07.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:07.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:07.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:07.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:07.102 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:07.102 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:07.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:07.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:07.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:07.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:07.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:07.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:07.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:07.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:07.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:07.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:07.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:07.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:07.109 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:07.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:07.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:07.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:07.110 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:07.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:07.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:07.115 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:07.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:07.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:07.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:07.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:07.118 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:07.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:12.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:12.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:12.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:12.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:12.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:12.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:12.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:12.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:12.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:12.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:12.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:12.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:12.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:12.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:12.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:12.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:12.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:12.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:12.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:12.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:12.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:12.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:12.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:12.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:12.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:12.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:12.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:12.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:12.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:12.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:12.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:12.158 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:12.158 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:12.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:12.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:48:12.646 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:48:12.685 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:48:12.687 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:48:12.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:12.689 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:48:13.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:48:13.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:13.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:13.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:13.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:13.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:48:14.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:48:14.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:14.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:14.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:14.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:14.556 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:48:15.035 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:48:15.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:15.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:15.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:15.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:15.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:48:15.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:48:16.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:16.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:16.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:16.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:16.470 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:48:16.949 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:48:17.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:17.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:17.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:17.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:48:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:48:18.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:18.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:18.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:18.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:18.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:18.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:18.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:18.189 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:23.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:23.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:23.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:23.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:23.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:23.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:23.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:23.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:23.201 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:23.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:23.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:23.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:23.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:23.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:23.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:23.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:23.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:23.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:23.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:23.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:23.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:23.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:23.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:23.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:23.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:23.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:23.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:23.216 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:23.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:23.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:48:23.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:48:23.737 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:48:23.739 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:48:23.741 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:48:23.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:24.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:48:24.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:48:25.139 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:48:25.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:25.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:25.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:25.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:25.618 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:48:26.097 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:48:26.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:26.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:26.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:26.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:26.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:48:27.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:48:27.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:27.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:27.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:27.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:27.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:48:28.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:48:28.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:28.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:28.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:28.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:28.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:48:28.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:28.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:28.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:28.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:28.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:28.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:28.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:28.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:28.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:28.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:28.754 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:33.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:33.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:33.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:33.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:33.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:33.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:33.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:33.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:33.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:33.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:33.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:33.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:33.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:33.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:33.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:33.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:33.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:33.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:33.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:33.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:33.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:33.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:33.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:33.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:33.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:33.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:33.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:33.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:33.785 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:33.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:33.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:33.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:33.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:33.787 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:38.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:38.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:38.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:38.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:38.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:38.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:38.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:38.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:38.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:38.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:38.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:38.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:38.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:38.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:38.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:38.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:38.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:38.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:38.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:38.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:38.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:38.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:38.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:38.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:38.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:38.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:38.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:38.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:38.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:38.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:38.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:38.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:38.823 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:38.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:38.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:48:39.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:48:39.343 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:48:39.344 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:48:39.346 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:48:39.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:39.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:48:39.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:48:39.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:48:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:48:39.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:39.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:39.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:39.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:40.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:48:40.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:48:40.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:48:40.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:48:40.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:48:40.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:48:40.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:48:40.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:40.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:40.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:40.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:41.223 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:48:41.698 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:48:41.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:41.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:41.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:41.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:42.168 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:48:42.643 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:48:42.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:42.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:42.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:42.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:43.120 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:48:43.597 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:48:43.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:43.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:48:44.553 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:48:45.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:48:45.508 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:48:45.985 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:48:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:48:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:48:47.411 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:48:47.887 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:48:48.361 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:48:48.836 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:48:49.311 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:48:49.790 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:48:50.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:48:50.746 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:48:51.224 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:48:51.701 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:48:52.179 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:48:52.657 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:48:53.135 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:48:53.613 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:48:54.091 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:48:54.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:48:54.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:48:54.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:48:54.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:48:54.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:48:54.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:48:54.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:54.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:54.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:54.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:54.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:54.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:54.183 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:48:59.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:48:59.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:48:59.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:59.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:59.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:59.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:59.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:48:59.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:59.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:59.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:48:59.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:48:59.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:48:59.204 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:48:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:59.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:59.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:48:59.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:48:59.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:48:59.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:48:59.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:48:59.209 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:48:59.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:59.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:59.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:48:59.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:48:59.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:48:59.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:48:59.213 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:48:59.213 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:48:59.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:59.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:48:59.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:48:59.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:48:59.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:48:59.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:48:59.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:48:59.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:48:59.219 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:48:59.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:48:59.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:48:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:48:59.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:48:59.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:48:59.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:48:59.744 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:48:59.746 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:48:59.748 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:48:59.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:59.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:48:59.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:48:59.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:48:59.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:48:59.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:48:59.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:48:59.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:48:59.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:48:59.800 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:48:59.803 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:48:59.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:48:59.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:48:59.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:48:59.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:48:59.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:00.185 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:00.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:00.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:00.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:00.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:00.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:01.142 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:49:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:01.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:01.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:01.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:49:02.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:49:02.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:02.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:02.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:02.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:02.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:49:03.056 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:49:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:03.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:03.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:03.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:03.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:49:04.012 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:49:04.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:04.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:04.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:49:04.969 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:49:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:49:05.926 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:49:06.405 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:49:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:49:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:49:07.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:07.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:07.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:07.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:07.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:07.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:07.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:07.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:07.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:07.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:07.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:07.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:07.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:07.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:07.830 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:12.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:12.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:12.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:12.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:12.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:12.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:12.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:12.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:12.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:12.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:12.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:12.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:12.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:12.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:12.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:12.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:12.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:12.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:12.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:12.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:12.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:12.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:12.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:12.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:12.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:12.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:12.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:12.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:12.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:12.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:12.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:12.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:12.859 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:12.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:12.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:13.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:13.376 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:13.377 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:13.378 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:13.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:13.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:13.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:13.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:13.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:13.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:13.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:13.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:13.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:13.441 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:13.444 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:13.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:13.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:13.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:13.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:13.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:13.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:13.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:13.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:14.305 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:14.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:14.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:14.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:14.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:14.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:14.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:14.328 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:14.328 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:19.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:19.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:19.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:19.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:19.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:19.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:19.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:19.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:19.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:19.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:19.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:19.352 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:19.353 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:19.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:19.353 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:19.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:19.354 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:19.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:19.355 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:19.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:19.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:19.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:19.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:19.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:19.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:19.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:19.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:19.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:19.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:19.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:19.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:19.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:19.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:19.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:19.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:19.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:19.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:19.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:19.370 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:19.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:19.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:19.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:19.858 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:19.892 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:19.893 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:19.895 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:19.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:19.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:19.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:19.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:19.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:19.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:19.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:19.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:19.951 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:19.955 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:19.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:19.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:49:19.963 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:49:19.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:19.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:20.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:20.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:20.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:20.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:20.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:20.814 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:21.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:21.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:21.016 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:49:21.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:21.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:21.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:21.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:21.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:21.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:21.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:21.022 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (TRX2@172.18.142.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:21.022 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:26.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:26.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:26.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:26.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:26.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:26.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:26.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:26.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:26.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:26.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:26.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:26.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:26.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:26.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:26.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:26.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:26.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:26.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:26.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:26.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:26.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:26.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:26.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:26.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:26.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:26.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:26.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:26.053 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:26.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:26.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:26.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:26.571 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:26.572 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:26.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:26.573 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:26.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:26.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:26.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:26.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:26.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:26.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:26.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:26.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:26.634 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:26.638 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:26.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:26.649 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:49:26.649 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:49:26.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:26.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:27.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:27.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:27.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:27.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:27.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:27.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:27.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:27.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:27.702 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:49:27.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:27.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:27.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:27.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:27.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:27.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:27.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:27.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:27.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:27.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:27.708 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:32.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:32.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:32.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:32.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:32.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:32.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:32.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:32.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:32.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:32.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:32.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:32.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:32.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:32.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:32.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:32.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:32.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:32.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:32.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:32.737 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:32.737 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:32.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:32.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:32.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:32.738 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:32.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:32.738 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:32.741 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:32.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:32.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:32.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:32.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:32.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:32.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:32.742 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:32.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:32.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:32.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:32.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:32.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:32.749 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:32.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:32.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:32.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:33.273 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:33.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:33.275 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:33.276 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:33.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:33.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:33.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:33.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:33.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:33.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:33.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:33.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:33.331 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:33.334 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:33.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:33.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:49:33.347 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:49:33.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:33.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:33.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:33.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:33.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:33.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:33.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:34.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:34.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:34.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:34.396 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:49:34.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:34.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:34.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:34.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:34.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:34.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:34.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:34.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:34.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:34.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:34.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:34.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:39.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:39.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:39.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:39.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:39.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:39.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:39.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:39.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:39.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:39.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:39.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:39.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:39.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:39.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:39.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:39.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:39.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:39.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:39.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:39.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:39.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:39.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:39.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:39.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:39.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:39.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:39.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:39.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:39.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:39.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:39.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:39.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:39.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:39.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:39.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:39.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:39.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:39.432 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:39.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:39.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:39.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:39.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:39.948 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:39.949 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:39.950 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:39.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:39.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:39.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:39.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:39.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:39.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:39.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:39.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:39.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:40.012 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:40.015 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:40.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:40.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:40.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:40.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:40.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:40.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:40.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:40.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:40.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:40.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:40.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:41.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:49:41.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:41.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:41.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:41.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:41.823 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:49:42.299 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:49:42.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:42.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:42.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:42.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:42.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:49:43.256 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:49:43.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:43.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:43.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:43.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:43.734 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:49:44.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:49:44.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:44.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:44.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:44.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:44.690 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:49:45.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:49:45.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:49:46.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:49:46.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:49:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:49:47.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:49:48.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:48.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:48.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:48.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:48.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:49:48.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:48.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:48.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:48.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:48.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:48.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:48.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:48.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:48.082 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:48.086 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:48.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:48.097 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:49:48.097 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:49:48.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:48.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:49:48.994 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:49:49.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:49.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:49.232 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:49:49.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:49.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:49.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:49.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:49.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:49.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:49.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:49.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:49.240 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:54.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:54.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:54.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:54.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:54.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:54.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:54.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:54.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:54.259 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:54.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:49:54.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:49:54.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:49:54.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:49:54.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:54.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:54.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:54.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:49:54.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:49:54.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:49:54.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:49:54.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:49:54.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:54.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:54.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:54.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:49:54.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:49:54.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:49:54.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:49:54.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:49:54.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:54.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:49:54.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:54.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:49:54.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:49:54.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:49:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:49:54.284 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:49:54.284 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:49:54.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:49:54.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:49:54.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:49:54.289 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:49:54.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:49:54.809 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:54.810 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:54.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:54.812 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:49:54.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:54.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:54.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:49:54.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:54.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:49:54.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:49:54.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:49:54.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:49:54.864 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:49:54.867 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:49:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:49:54.882 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:49:54.882 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:49:54.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:54.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:49:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:49:55.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:55.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:55.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:55.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:55.726 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:49:55.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:49:55.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:49:55.928 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:49:55.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:49:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:49:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:49:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:49:55.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:49:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:49:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:49:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:49:55.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:49:55.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:49:55.931 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:49:55.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:55.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:55.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:55.931 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:49:55.932 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:50:00.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:00.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:00.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:00.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:00.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:00.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:00.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:00.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:00.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:00.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:00.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:50:00.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:50:00.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:50:00.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:00.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:00.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:00.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:50:00.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:00.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:50:00.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:50:00.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:50:00.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:00.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:00.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:00.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:50:00.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:00.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:50:00.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:50:00.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:50:00.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:00.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:00.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:00.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:50:00.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:00.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:50:00.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:50:00.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:50:00.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:50:00.966 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:50:00.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:00.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:50:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:50:01.489 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:01.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:01.492 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:01.494 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:50:01.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:01.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:01.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:01.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:01.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:01.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:01.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:01.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:01.548 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:01.551 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:01.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:01.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:01.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:01.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:01.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:50:01.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:01.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:01.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:01.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:02.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:50:02.869 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:50:02.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:02.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:02.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:02.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:03.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:50:03.821 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:50:03.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:03.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:03.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:03.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:04.298 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:50:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:50:04.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:04.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:04.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:04.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:05.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:50:05.711 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:50:05.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:05.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:05.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:05.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:06.183 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:50:06.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:50:07.129 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:50:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:50:08.071 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:50:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:50:09.008 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:50:09.482 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:50:09.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:09.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:09.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:09.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:09.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:09.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:09.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:09.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:09.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:09.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:09.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:09.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:09.613 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:09.614 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:09.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:09.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:09.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:09.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:09.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:09.956 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:50:10.430 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:50:10.905 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:50:11.380 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:50:11.851 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:50:12.326 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:50:12.803 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:50:13.280 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:50:13.756 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:50:14.232 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:50:14.706 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:50:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:50:15.655 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:50:16.130 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:50:16.606 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:50:17.077 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:50:17.549 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:50:17.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:17.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:17.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:17.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:17.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:17.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:17.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:17.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:17.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:17.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:17.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:17.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:17.637 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:17.638 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:17.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:17.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:17.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:17.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:17.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:18.019 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:50:18.488 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:50:18.958 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:50:19.431 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:50:19.908 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:50:20.378 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:50:20.847 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:50:21.316 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:50:21.788 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:50:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:50:22.728 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:50:23.199 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:50:23.669 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:50:24.139 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:50:24.607 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:50:25.081 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:50:25.555 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:50:25.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:25.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:25.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:25.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:25.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:25.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:25.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:25.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:25.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:25.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:25.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:25.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:25.694 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:25.698 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:25.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:25.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:25.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:25.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:25.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:26.033 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:50:26.511 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:50:26.989 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:50:27.468 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:50:27.946 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:50:28.424 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:50:28.903 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:50:29.381 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:50:29.859 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:50:30.337 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:50:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:50:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:50:31.771 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:50:32.249 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:50:32.727 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:50:33.206 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:50:33.684 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:50:33.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:33.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:33.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:33.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:33.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:33.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:33.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:33.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:33.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:33.718 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:50:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:38.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:38.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:38.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:38.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:38.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:38.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:38.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:38.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:38.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:38.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:50:38.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:50:38.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:50:38.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:38.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:38.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:38.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:50:38.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:38.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:50:38.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:50:38.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:50:38.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:38.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:38.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:38.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:50:38.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:38.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:50:38.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:50:38.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:50:38.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:38.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:38.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:38.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:50:38.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:38.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:50:38.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:50:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:50:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:50:38.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:50:38.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:50:38.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:50:38.773 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:38.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:38.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:38.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:50:39.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:50:39.292 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:39.294 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:39.295 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:50:39.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:39.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:39.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:39.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:39.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:39.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:39.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:39.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:39.354 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:39.359 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:39.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:39.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:50:39.374 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:50:39.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:39.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:39.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:50:39.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:39.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:39.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:39.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:40.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:50:40.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:50:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:40.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:41.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:50:41.654 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:50:41.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:41.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:41.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:41.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:41.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:41.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:41.886 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:50:41.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:41.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:41.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:41.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:41.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:41.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:41.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:41.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:41.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:41.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:41.887 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:50:46.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:46.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:46.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:46.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:46.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:46.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:46.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:46.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:46.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:46.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:46.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:50:46.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:50:46.912 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:50:46.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:46.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:46.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:46.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:50:46.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:46.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:50:46.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:50:46.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:50:46.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:46.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:46.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:46.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:50:46.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:46.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:46.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:50:46.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:46.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:50:46.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:50:46.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:50:46.925 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:50:46.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:46.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:50:47.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:50:47.442 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:47.444 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:47.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:47.445 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:50:47.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:47.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:47.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:47.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:47.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:47.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:47.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:47.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:47.506 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:47.508 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:47.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:47.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:50:47.520 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:50:47.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:47.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:50:47.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:47.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:47.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:47.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:48.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:50:48.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:48.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:48.570 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:50:48.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:48.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:48.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:48.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:48.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:48.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:48.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:48.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:48.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:48.575 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:50:48.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:53.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:50:53.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:50:53.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:53.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:53.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:53.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:53.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:50:53.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:53.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:53.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:50:53.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:50:53.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:50:53.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:50:53.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:53.603 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:53.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:50:53.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:50:53.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:50:53.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:50:53.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:50:53.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:50:53.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:53.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:50:53.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:50:53.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:50:53.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:50:53.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:50:53.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:50:53.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:53.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:50:53.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:50:53.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:50:53.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:50:53.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:50:53.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:50:53.619 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:50:53.619 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:50:53.619 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:50:53.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:50:53.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:50:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:50:54.106 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:50:54.147 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:50:54.149 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:50:54.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:54.151 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:50:54.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:50:54.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:50:54.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:50:54.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:54.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:54.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:54.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:50:54.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:50:54.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:50:54.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:50:54.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:50:54.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:54.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:50:54.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:50:54.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:54.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:54.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:54.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:55.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:50:55.540 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:50:55.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:55.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:55.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:55.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:56.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:50:56.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:50:56.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:56.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:56.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:50:57.454 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:50:57.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:57.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:57.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:57.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:50:58.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:50:58.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:50:58.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:50:58.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:50:58.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:50:58.890 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:50:59.368 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:50:59.847 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:51:00.326 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:51:00.804 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:51:01.283 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:51:01.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:51:02.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:02.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:02.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:02.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:02.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:02.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:02.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:02.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:02.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:02.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:02.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:02.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:02.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:02.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:02.235 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:51:07.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:07.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:07.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:07.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:07.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:07.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:07.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:07.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:07.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:07.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:07.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:51:07.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:51:07.260 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:51:07.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:07.260 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:07.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:07.261 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:51:07.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:07.261 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:51:07.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:51:07.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:51:07.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:07.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:07.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:07.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:51:07.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:07.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:51:07.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:51:07.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:51:07.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:07.268 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:07.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:07.268 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:51:07.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:07.268 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:51:07.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:51:07.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:51:07.272 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:51:07.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:07.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:51:07.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:51:07.788 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:51:07.789 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:51:07.790 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:51:07.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:07.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:07.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:07.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:51:07.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:07.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:51:07.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:51:07.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:51:07.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:51:07.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:07.862 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:51:07.862 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:51:07.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:07.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:08.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:51:08.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:08.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:08.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:08.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:08.713 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:51:09.192 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:51:09.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:09.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:09.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:09.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:09.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:51:10.151 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:51:10.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:10.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:10.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:10.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:10.629 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:51:11.107 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:51:11.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:11.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:11.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:11.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:11.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:51:12.066 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:51:12.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:12.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:12.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:12.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:12.545 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:51:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:51:13.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:51:13.981 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:51:14.459 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:51:14.939 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:51:15.417 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:51:15.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:15.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:15.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:15.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:15.873 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:51:15.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:15.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:15.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:15.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:15.895 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:51:15.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:15.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:15.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:15.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:15.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:15.897 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:51:15.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:15.898 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:20.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:20.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:20.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:20.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:20.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:20.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:20.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:20.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:20.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:20.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:20.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:51:20.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:51:20.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:51:20.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:20.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:20.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:20.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:51:20.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:20.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:51:20.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:51:20.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:51:20.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:20.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:20.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:20.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:51:20.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:20.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:51:20.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:51:20.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:51:20.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:20.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:20.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:20.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:51:20.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:20.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:51:20.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:51:20.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:51:20.925 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:51:20.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:20.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:20.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:51:21.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:51:21.446 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:51:21.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:21.447 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:51:21.449 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:51:21.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:21.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:21.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:51:21.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:21.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:51:21.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:51:21.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:51:21.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:51:21.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:51:21.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:22.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:51:22.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:51:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:22.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:23.324 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:51:23.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:51:23.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:23.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:23.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:23.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:24.280 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:51:24.757 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:51:24.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:24.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:24.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:24.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:25.236 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:51:25.714 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:51:25.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:25.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:25.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:25.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:26.192 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:51:26.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:51:27.148 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:51:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:51:27.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:27.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:27.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:27.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:27.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:27.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:27.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:27.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:27.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:27.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:27.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:27.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:27.972 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:51:27.973 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:27.973 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:27.973 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:32.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:32.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:32.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:32.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:32.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:32.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:32.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:32.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:32.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:32.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:32.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:51:32.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:51:32.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:51:32.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:32.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:32.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:33.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:51:33.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:33.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:51:33.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:51:33.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:51:33.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:33.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:33.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:33.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:51:33.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:33.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:51:33.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:51:33.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:51:33.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:33.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:33.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:33.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:51:33.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:33.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:51:33.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:51:33.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:51:33.019 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:51:33.019 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:33.024 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:51:33.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:51:33.542 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:51:33.543 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:51:33.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:33.545 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:51:33.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:33.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:33.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:51:33.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:33.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:51:33.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:51:33.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:51:33.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:51:33.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:51:34.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:34.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:34.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:34.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:34.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:51:34.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:51:35.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:35.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:35.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:35.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:35.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:51:35.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:51:36.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:36.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:36.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:36.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:36.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:51:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:51:37.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:37.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:37.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:37.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:37.330 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:51:37.808 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:51:38.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:38.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:38.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:38.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:38.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:38.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:38.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:38.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:38.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:38.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:38.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:38.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:38.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:38.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:38.084 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1081 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:38.084 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1081 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:38.084 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1081 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:38.084 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1081 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:51:38.289 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:51:38.773 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:51:39.261 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:51:39.747 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:51:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:51:40.718 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:51:41.203 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:51:41.688 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:51:42.170 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:51:42.655 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:51:43.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:43.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:43.082 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:51:43.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:43.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:43.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:43.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:43.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:43.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:43.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:43.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:43.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:43.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:43.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:43.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:51:43.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:43.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:51:43.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:51:43.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:51:43.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:43.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:43.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:43.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:51:43.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:43.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:51:43.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:51:43.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:51:43.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:43.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:43.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:43.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:51:43.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:43.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:51:43.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:51:43.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:51:43.107 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:51:43.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:43.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:43.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:43.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:43.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:43.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:43.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:43.109 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:51:48.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:51:48.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:51:48.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:48.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:48.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:48.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:48.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:48.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:48.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:48.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:51:48.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:51:48.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:51:48.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:51:48.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:48.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:48.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:51:48.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:51:48.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:51:48.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:51:48.134 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:51:48.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:51:48.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:48.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:48.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:51:48.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:51:48.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:51:48.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:48.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:51:48.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:51:48.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:51:48.144 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:51:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:51:48.144 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:51:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:51:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.145 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:51:48.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:51:48.145 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:51:48.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:51:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:51:48.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:51:48.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:51:48.668 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:51:48.670 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:51:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:51:48.672 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:51:48.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:51:48.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:51:48.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:51:48.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:51:48.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:51:48.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:51:48.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:51:48.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:51:49.112 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:51:49.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:49.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:49.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:49.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:49.589 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:51:50.067 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:51:50.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:50.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:50.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:50.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:50.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:51:51.023 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:51:51.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:51.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:51.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:51.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:51.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:51:51.978 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:51:52.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:52.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:52.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:52.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:52.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:51:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:51:53.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:51:53.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:51:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:51:53.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:51:53.890 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:51:54.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:54.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:51:54.846 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:51:55.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:55.323 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:51:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:51:56.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:51:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:51:57.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:57.235 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:51:57.713 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:51:58.191 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:51:58.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:51:58.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:51:58.669 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:51:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:51:59.626 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:52:00.105 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:52:00.583 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:52:01.062 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:52:01.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:01.540 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:52:02.037 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:52:02.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:02.516 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:52:02.994 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:52:03.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:03.471 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:52:03.949 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:52:04.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:04.427 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:52:04.905 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:52:05.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:05.383 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:52:05.861 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:52:06.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:06.339 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:52:06.817 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:52:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:52:07.772 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:52:08.250 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:52:08.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:08.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:08.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:08.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:08.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:08.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:08.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:08.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:08.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:08.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:08.371 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:52:13.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:13.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:13.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:13.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:13.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:13.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:13.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:13.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:13.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:13.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:13.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:52:13.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:52:13.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:52:13.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:13.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:13.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:13.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:52:13.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:13.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:52:13.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:52:13.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:52:13.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:13.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:13.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:13.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:52:13.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:13.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:52:13.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:52:13.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:52:13.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:13.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:13.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:13.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:52:13.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:13.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:52:13.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:52:13.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:52:13.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:52:13.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:52:13.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:52:13.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:52:13.405 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:52:13.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:13.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:52:13.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:52:13.927 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:52:13.929 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:52:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:13.931 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:52:13.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:13.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:13.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:52:13.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:13.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:13.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:13.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:52:13.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:52:13.987 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:52:13.991 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:52:14.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:52:14.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:14.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:14.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:14.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:14.024 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.038 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.052 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.066 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.080 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.094 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.107 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.121 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.135 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.149 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.163 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.177 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.204 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.218 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.232 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.246 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.260 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.274 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.287 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.301 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.315 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.329 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.343 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.357 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.372 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:52:14.392 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.406 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:14.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:14.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:14.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:14.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:14.851 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:52:15.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:52:15.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:15.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:15.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:15.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:15.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:15.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:15.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:15.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:15.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:15.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:15.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:15.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:15.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:15.318 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:52:15.318 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.318 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:15.319 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:52:20.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:20.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:20.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:20.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:20.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:20.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:20.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:20.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:20.329 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:20.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:20.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:52:20.335 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:52:20.335 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:52:20.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:20.336 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:20.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:20.336 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:52:20.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:20.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:20.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:52:20.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:20.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:52:20.343 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:52:20.343 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:52:20.343 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:20.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:20.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:20.344 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:52:20.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:20.344 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.348 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:52:20.348 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:52:20.348 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:52:20.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:52:20.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:52:20.871 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:52:20.873 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:52:20.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:20.875 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:52:20.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:20.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:20.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:52:20.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:20.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:20.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:20.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:52:20.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:52:20.930 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:52:20.934 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:52:20.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:52:20.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:20.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:20.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:20.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:20.968 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:20.982 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:20.996 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.010 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.023 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.037 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.051 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.065 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.079 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.093 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.107 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.120 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.148 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.162 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.176 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.190 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.204 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.217 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.231 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.245 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.259 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.273 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.286 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.300 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:52:21.336 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.350 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-12 04:52:21.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:21.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:21.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:21.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:21.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:52:22.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 04:52:22.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:22.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:22.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:22.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:22.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:22.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:22.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:22.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:22.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:22.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:22.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:22.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:22.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:22.256 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:52:27.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:52:27.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:52:27.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:27.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:27.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:27.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:27.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:52:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:27.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:52:27.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:52:27.277 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:52:27.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:52:27.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:27.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:27.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:52:27.278 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:52:27.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:52:27.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:52:27.281 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:52:27.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:52:27.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:27.281 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:52:27.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:52:27.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:52:27.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:27.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:52:27.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:52:27.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:52:27.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:52:27.289 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:52:27.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:52:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:52:27.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:52:27.778 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:52:27.804 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:52:27.805 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:52:27.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:27.806 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:52:27.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:27.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:27.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:52:27.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:27.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:27.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:27.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:52:27.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:52:27.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:27.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:27.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:27.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:27.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:28.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:52:28.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:28.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:52:29.212 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:52:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:29.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:29.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:29.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:29.690 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:52:30.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:52:30.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:30.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:30.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:52:31.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:52:31.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:31.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:31.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:31.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:31.597 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:52:32.075 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:52:32.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:52:32.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:52:32.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:52:32.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:52:32.553 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:52:33.031 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:52:33.510 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:52:33.989 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:52:34.467 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:52:34.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:52:35.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:52:35.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:52:36.379 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:52:36.857 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:52:37.335 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:52:37.813 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:52:38.291 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:52:38.768 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:52:39.247 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:52:39.725 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:52:40.203 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:52:40.682 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:52:41.160 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:52:41.638 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:52:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:52:42.593 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:52:43.072 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:52:43.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:43.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:43.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:43.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:43.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:43.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:43.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:52:43.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:43.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:43.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:43.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:52:43.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:52:43.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:43.406 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:52:43.407 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 04:52:43.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:43.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:43.548 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:52:44.027 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:52:44.505 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:52:44.984 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:52:45.463 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:52:45.942 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:52:46.421 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:52:46.899 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:52:47.378 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:52:47.856 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:52:48.335 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:52:48.813 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:52:49.292 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:52:49.770 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:52:50.248 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:52:50.727 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:52:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:52:51.683 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:52:52.162 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:52:52.640 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:52:53.119 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:52:53.597 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:52:54.075 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:52:54.554 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:52:55.033 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:52:55.511 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:52:55.990 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:52:56.469 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:52:56.948 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:52:57.425 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:52:57.903 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:52:58.381 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:52:58.850 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:52:59.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:59.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:59.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:59.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:59.033 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:52:59.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:52:59.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:52:59.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:52:59.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:59.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:52:59.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:52:59.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:52:59.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:52:59.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:52:59.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:52:59.094 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 04:52:59.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:59.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:52:59.327 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:52:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:53:00.284 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:53:00.763 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:53:01.241 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:53:01.720 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 04:53:02.199 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 04:53:02.676 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 04:53:03.155 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 04:53:03.633 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 04:53:04.111 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 04:53:04.590 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 04:53:05.069 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 04:53:05.549 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 04:53:06.028 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 04:53:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 04:53:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 04:53:07.465 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 04:53:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 04:53:08.422 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 04:53:08.900 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 04:53:09.379 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 04:53:09.857 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 04:53:10.336 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 04:53:10.814 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 04:53:11.293 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 04:53:11.772 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 04:53:12.243 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 04:53:12.722 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 04:53:13.201 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 04:53:13.679 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 04:53:14.158 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 04:53:14.636 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 04:53:14.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:14.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:14.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:14.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:14.707 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:53:14.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:14.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:14.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:53:14.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:14.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:14.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:14.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:53:14.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:53:14.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:14.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:14.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:14.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:14.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:14.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:15.115 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 04:53:15.593 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 04:53:16.072 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 04:53:16.549 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 04:53:17.028 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 04:53:17.505 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 04:53:17.983 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 04:53:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 04:53:18.948 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 04:53:19.427 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 04:53:19.905 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 04:53:20.384 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 04:53:20.862 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 04:53:21.341 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 04:53:21.818 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 04:53:22.296 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 04:53:22.774 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 04:53:23.253 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 04:53:23.731 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 04:53:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 04:53:24.687 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 04:53:25.165 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 04:53:25.644 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 04:53:26.122 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 04:53:26.600 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 04:53:27.078 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 04:53:27.556 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 04:53:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 04:53:28.512 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 04:53:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 04:53:29.468 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 04:53:29.945 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 04:53:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:30.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:30.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:30.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:30.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:30.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:30.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:30.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:30.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:30.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:30.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:30.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:30.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:30.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:30.381 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:30.381 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=13458 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:35.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:35.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:35.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:35.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:35.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:35.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:35.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:35.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:35.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:35.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:35.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:53:35.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:53:35.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:53:35.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:35.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:35.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:35.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:53:35.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:35.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:35.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:53:35.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:35.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:53:35.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:53:35.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:53:35.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:35.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:35.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:35.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:53:35.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:35.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:53:35.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:53:35.414 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:53:35.414 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:53:35.414 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:35.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:35.416 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:53:35.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:40.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:40.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:40.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:40.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:40.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:40.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:40.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:40.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:40.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:40.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:40.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:53:40.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:53:40.439 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:53:40.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:40.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:40.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:40.440 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:53:40.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:40.440 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:53:40.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:53:40.442 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:53:40.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:40.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:40.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:40.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:53:40.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:40.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:40.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:53:40.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:40.446 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:53:40.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:53:40.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:53:40.451 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:53:40.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:40.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:53:40.939 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:53:40.973 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:53:40.975 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:53:40.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:40.977 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:53:41.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:41.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:41.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:53:41.013 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:53:41.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:41.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:41.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:41.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:53:41.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:53:41.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:41.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:41.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:41.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:53:41.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:41.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:41.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:41.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:41.894 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:53:42.372 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:53:42.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:42.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:42.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:42.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:42.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:53:43.327 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:53:43.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:43.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:43.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:43.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:43.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:53:44.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:53:44.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:44.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:44.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:44.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:44.762 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:53:45.241 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:53:45.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:45.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:45.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:45.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:53:46.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:53:46.677 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:53:47.155 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:53:47.633 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:53:48.112 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:53:48.591 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:53:49.069 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:53:49.546 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:53:50.024 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:53:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:53:50.981 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:53:51.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:51.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:51.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:51.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:51.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:51.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:51.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:51.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:51.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:51.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:51.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:51.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:51.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:51.434 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:53:51.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:51.434 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:53:56.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:53:56.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:53:56.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:56.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:56.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:56.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:56.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:53:56.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:56.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:56.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:53:56.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:56.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:53:56.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:53:56.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:53:56.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:53:56.462 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:53:56.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:56.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:56.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:53:56.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:53:56.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:53:56.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:53:56.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:53:56.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:53:56.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:56.466 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:53:56.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:53:56.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:53:56.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:53:56.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:53:56.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:53:56.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:53:56.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:53:56.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:53:56.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:53:56.476 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:53:56.476 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:53:56.476 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:53:56.481 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:53:56.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:53:56.999 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:53:57.000 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:53:57.002 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:53:57.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:57.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:53:57.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:53:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:53:57.028 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:53:57.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:57.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:57.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:57.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:53:57.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:53:57.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:53:57.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:53:57.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:53:57.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:57.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:53:57.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:53:57.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:57.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:57.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:57.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:57.922 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:53:58.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:53:58.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:58.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:53:59.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:53:59.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:53:59.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:53:59.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:53:59.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:53:59.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:54:00.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:54:00.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:00.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:00.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:00.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:00.791 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:54:01.269 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:54:01.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:01.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:01.748 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:54:02.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:54:02.705 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:54:03.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:54:03.661 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:54:04.139 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:54:04.617 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:54:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:54:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:54:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:54:06.531 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:54:07.008 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:54:07.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:07.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:07.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:07.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:07.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:07.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:07.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:07.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:07.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:07.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:07.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:07.466 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:54:12.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:12.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:12.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:12.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:12.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:12.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:12.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:12.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:12.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:12.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:12.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:54:12.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:54:12.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:54:12.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:12.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:12.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:12.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:54:12.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:12.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:54:12.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:54:12.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:54:12.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:12.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:12.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:12.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:54:12.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:12.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:12.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:54:12.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:12.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:54:12.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:54:12.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:54:12.511 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:54:12.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:12.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:54:13.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:54:13.033 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:54:13.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:13.035 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:13.036 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:54:13.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:13.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:13.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:54:13.064 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:13.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:13.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:13.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:13.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:54:13.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:54:13.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:13.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:13.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:13.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:13.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:13.478 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:54:13.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:13.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:54:13.972 [DEBUG] fake_trx.py:264 (MS@172.18.142.22:6700) Recv SETTA cmd
2025-12-12 04:54:14.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:54:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:14.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:14.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:14.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:54:15.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:54:15.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:15.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:15.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:15.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:15.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:54:16.347 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:54:16.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:16.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:16.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:16.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:54:17.303 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:54:17.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:17.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:17.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:17.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:17.781 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:54:18.259 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:54:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:54:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:54:19.694 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:54:20.172 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:54:20.650 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:54:21.128 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:54:21.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:54:22.084 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:54:22.562 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:54:23.041 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:54:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:54:23.997 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:54:24.475 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:54:24.953 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:54:25.431 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:54:25.913 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:54:26.391 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:54:26.869 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:54:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:54:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:54:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:54:28.783 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:54:29.262 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:54:29.740 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:54:30.218 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:54:30.696 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:54:31.173 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:54:31.652 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:54:32.130 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:54:32.609 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:54:32.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:32.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:32.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:32.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:32.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:32.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:32.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:32.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:32.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:32.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:32.704 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:54:32.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:37.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:37.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:37.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:37.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:37.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:37.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:37.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:37.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:37.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:37.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:37.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:54:37.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:54:37.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:54:37.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:37.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:37.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:37.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:54:37.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:37.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:37.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:54:37.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:37.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:54:37.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:54:37.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:54:37.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:37.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:37.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:37.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:54:37.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:37.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:54:37.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:54:37.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:54:37.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:54:37.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:54:37.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:54:37.738 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:54:37.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:37.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:37.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:37.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:54:38.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:54:38.256 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:54:38.257 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:38.258 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:54:38.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:38.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:38.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:38.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:54:38.290 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:38.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:38.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:38.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:38.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:54:38.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:54:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:38.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:38.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:38.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:38.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:38.704 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:54:38.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:38.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:38.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:38.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:54:39.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:54:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:39.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:39.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:39.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:40.139 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:54:40.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:54:40.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:40.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:41.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:54:41.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:54:41.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:41.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:42.052 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:54:42.531 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:54:42.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:42.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:42.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:42.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:43.009 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:54:43.487 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:54:43.965 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:54:44.443 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:54:44.921 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:54:45.399 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:54:45.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:54:46.356 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:54:46.834 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:54:47.312 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:54:47.790 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:54:48.269 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:54:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:48.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:48.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:48.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:48.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:48.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:48.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:48.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:48.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:48.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:48.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:48.728 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:54:53.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:54:53.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:54:53.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:53.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:53.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:53.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:53.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:54:53.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:53.756 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:53.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:54:53.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:54:53.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:54:53.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:54:53.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:53.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:54:53.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:54:53.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:54:53.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:54:53.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:54:53.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:54:53.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:53.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:53.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:54:53.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:54:53.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:54:53.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:54:53.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:54:53.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:54:53.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:53.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:54:53.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:54:53.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:54:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:54:53.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:54:53.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:54:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:54:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:54:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.777 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:54:53.777 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:54:53.777 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:54:53.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:54:53.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:54:54.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:54:54.298 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:54:54.300 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:54.301 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:54:54.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:54.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:54:54.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:54:54.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:54:54.340 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:54.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:54.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:54.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:54.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:54:54.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:54:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:54:54.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:54:54.365 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:54.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:54:54.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:54.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:54:54.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:54:54.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:54.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:54.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:54.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:55.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:54:55.236 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:54:55.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:54:55.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:55.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:55.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:55.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:56.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:54:56.655 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:54:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:56.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:57.133 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:54:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:54:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:57.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:58.089 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:54:58.568 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:54:58.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:54:58.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:54:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:54:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:54:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:54:59.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:55:00.002 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:55:00.480 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:55:00.958 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:55:01.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:01.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:01.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:01.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:01.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:01.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:01.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:01.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:01.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:01.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:01.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:01.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:01.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:01.104 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:55:01.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:06.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:06.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:06.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:06.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:06.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:06.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:06.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:06.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:06.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:06.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:06.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:55:06.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:55:06.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:55:06.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:06.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:06.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:06.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:55:06.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:06.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:55:06.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:55:06.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:55:06.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:06.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:06.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:06.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:55:06.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:06.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:55:06.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:55:06.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:55:06.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:06.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:06.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:06.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:55:06.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:06.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:55:06.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:55:06.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:55:06.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:55:06.139 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:55:06.139 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:06.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:06.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:06.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:55:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:55:06.659 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:06.660 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:06.662 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:55:06.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:06.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:06.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:06.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:06.695 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:06.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:06.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:06.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:06.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:06.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:06.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:06.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:06.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:06.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:06.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:55:07.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:07.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:07.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:07.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:07.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:55:08.062 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:55:08.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:08.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:08.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:08.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:08.540 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:55:09.018 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:55:09.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:09.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:09.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:09.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:55:09.975 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:55:10.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:10.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:10.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:10.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:10.453 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:55:10.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:55:11.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:11.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:11.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:11.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:11.409 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:55:11.887 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:55:12.365 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:55:12.843 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:55:13.321 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:55:13.799 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:55:14.277 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:55:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:55:15.233 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:55:15.711 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:55:16.189 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:55:16.668 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:55:16.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:16.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:16.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:16.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:16.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:16.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:16.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:16.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:16.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:16.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:16.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:16.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:16.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:16.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:16.753 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:16.753 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2264 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:21.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:21.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:21.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:21.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:21.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:21.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:21.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:21.767 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:21.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:21.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:55:21.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:55:21.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:55:21.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:21.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:21.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:21.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:55:21.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:21.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:55:21.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:55:21.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:55:21.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:21.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:21.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:21.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:55:21.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:21.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:55:21.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:55:21.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:55:21.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:21.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:21.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:21.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:55:21.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:21.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:55:21.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:55:21.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:55:21.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:55:21.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:55:21.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:55:21.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:55:21.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:55:21.794 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:55:21.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:55:21.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:21.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:21.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:55:22.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:55:22.322 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:22.325 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:22.325 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:55:22.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:22.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:22.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:22.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:22.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:22.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:22.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:22.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:22.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:22.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:22.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:22.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.758 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:55:22.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:22.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:22.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:22.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:22.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:22.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:22.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:22.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:22.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:22.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:22.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:22.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:22.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:22.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:22.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:22.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:55:22.810 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:55:22.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:22.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:55:23.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:23.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:23.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:23.494 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:55:23.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:23.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:23.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:23.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:23.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:23.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:23.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:23.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:23.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:23.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:23.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:23.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:23.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:23.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:23.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:23.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:23.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:23.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:23.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:23.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:23.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:23.713 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:55:23.713 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:55:23.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:23.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:55:23.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:24.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:24.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:24.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:24.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:24.110 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:55:24.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:24.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:24.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:24.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:24.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:24.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:24.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:24.121 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:55:29.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:29.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:29.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:29.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:29.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:29.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:29.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:29.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:29.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:29.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:29.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:55:29.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:55:29.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:55:29.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:29.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:29.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:29.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:55:29.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:29.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:29.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:55:29.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:29.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:55:29.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:55:29.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:55:29.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:29.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:29.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:29.161 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:55:29.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:29.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:55:29.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:55:29.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:55:29.166 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:55:29.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:29.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:55:29.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:55:29.681 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:29.682 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:29.683 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:55:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:29.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:29.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:29.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:29.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:29.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:29.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:29.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:29.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:29.746 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:29.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:29.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:29.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:29.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:29.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:30.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:55:30.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:30.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:30.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:30.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:30.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:30.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:30.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:30.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:30.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:30.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:30.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:30.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:30.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:30.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:30.152 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:55:35.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:35.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:35.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:35.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:35.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:35.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:35.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:35.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:35.169 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:35.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:35.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:55:35.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:55:35.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:55:35.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:35.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:35.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:35.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:55:35.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:35.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:55:35.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:55:35.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:55:35.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:35.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:35.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:35.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:55:35.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:35.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:55:35.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:55:35.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:55:35.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:35.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:35.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:35.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:55:35.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:35.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:55:35.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:55:35.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:55:35.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:55:35.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:55:35.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:55:35.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:55:35.183 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:55:35.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:35.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:55:35.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:55:35.706 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:35.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:35.709 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:35.711 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:55:35.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:35.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:35.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:35.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:35.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:35.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:35.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:35.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:35.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:35.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:35.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:35.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:35.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:35.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:36.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:55:36.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:36.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:36.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:36.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:36.622 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:55:37.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:55:37.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:37.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:37.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:37.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:37.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:55:38.056 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:55:38.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:38.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:38.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:38.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:38.534 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:55:38.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:38.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:38.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:38.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:38.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:38.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:38.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:38.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:38.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:38.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:38.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:38.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:38.965 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:55:38.965 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 04:55:38.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:38.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:39.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:55:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:39.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:39.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:39.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:39.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:39.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:55:39.971 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:55:40.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:40.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:40.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:40.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:40.450 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:55:40.929 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:55:41.408 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:55:41.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:55:42.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:42.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:42.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:42.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:42.144 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:55:42.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:42.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:42.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:42.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:42.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:42.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:42.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:42.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:42.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:42.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:42.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:42.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:42.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:42.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:42.363 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:55:42.854 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:55:43.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:55:43.810 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:55:44.288 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:55:44.766 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:55:45.244 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:55:45.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:45.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:45.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:45.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:45.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:45.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:45.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:45.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:45.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:45.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:45.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:45.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:45.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:45.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:55:45.437 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:55:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:45.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:45.722 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:55:46.201 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:55:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:55:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:55:47.637 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:55:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:55:48.594 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:55:48.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:48.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:48.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:48.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:48.645 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:55:48.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:48.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:48.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:48.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:48.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:48.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:48.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:48.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:48.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:48.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:48.659 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:48.659 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:55:53.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:55:53.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:55:53.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:53.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:53.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:53.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:53.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:55:53.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:53.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:53.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:55:53.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:55:53.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:55:53.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:55:53.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:53.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:53.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:55:53.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:55:53.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:55:53.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:55:53.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:55:53.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:55:53.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:53.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:53.689 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:55:53.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:55:53.689 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:55:53.689 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:55:53.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:55:53.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:55:53.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:53.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:55:53.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:55:53.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:55:53.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:55:53.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:55:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:55:53.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:55:53.700 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:55:53.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:55:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:55:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:55:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:55:54.189 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:55:54.220 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:55:54.222 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:55:54.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:55:54.224 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:55:54.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:55:54.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:55:54.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:55:54.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:55:54.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:55:54.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:55:54.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:55:54.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:55:54.666 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:55:54.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:54.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:54.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:54.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:55.144 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:55:55.623 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:55:55.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:55.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:55.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:55.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:55:56.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:55:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:56.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:57.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:55:57.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:55:57.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:57.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:57.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:57.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:55:58.489 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:55:58.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:55:58.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:55:58.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:55:58.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:55:58.967 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:55:59.445 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:55:59.923 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:56:00.401 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:56:00.880 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:56:01.358 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:56:01.837 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:56:02.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:56:02.793 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:56:03.271 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:56:03.749 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:56:04.227 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:56:04.705 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:56:05.183 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:56:05.661 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:56:06.139 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:56:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:56:07.095 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:56:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:56:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:56:08.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:56:08.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:56:08.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:08.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:08.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:08.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:08.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:08.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:08.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:08.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:08.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:56:08.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:56:08.356 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:56:08.356 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:08.358 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:13.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:56:13.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:56:13.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:13.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:13.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:13.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:13.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:13.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:56:13.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:13.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:56:13.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:56:13.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:56:13.382 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:56:13.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:56:13.382 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:13.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:13.383 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:56:13.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:56:13.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:56:13.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:56:13.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:56:13.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:56:13.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:13.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:13.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:56:13.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:56:13.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:56:13.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:56:13.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:56:13.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:56:13.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:13.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:13.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:56:13.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:56:13.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:56:13.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:56:13.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:56:13.396 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:56:13.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:13.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:13.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:56:13.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:56:13.910 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:56:13.910 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:56:13.910 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:56:13.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:56:13.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:56:13.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:56:13.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:56:13.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:13.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:56:13.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:56:13.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:56:13.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:56:13.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:56:13.965 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 04:56:13.966 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 04:56:13.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:13.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:14.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:56:14.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:14.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:14.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:14.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:56:15.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:56:15.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:15.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:15.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:15.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:15.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:56:15.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:15.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:56:15.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:56:15.968 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 04:56:15.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:56:15.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:15.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:56:15.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:56:15.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:56:15.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:56:16.271 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:56:16.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:16.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:16.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:16.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:16.749 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:56:17.227 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:56:17.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:17.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:17.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:17.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:56:18.184 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:56:18.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:18.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:18.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:18.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:18.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:56:19.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:56:19.617 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:56:20.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:56:20.572 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:56:21.051 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:56:21.529 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:56:22.007 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:56:22.485 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:56:22.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:56:23.441 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:56:23.918 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:56:24.396 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:56:24.874 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:56:25.352 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:56:25.829 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:56:26.307 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:56:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:56:27.263 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:56:27.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:56:28.219 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:56:28.697 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:56:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:56:29.653 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:56:30.131 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:56:30.608 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:56:31.087 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:56:31.565 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:56:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:56:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:56:32.999 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:56:33.477 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:56:33.955 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:56:34.433 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:56:34.911 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:56:35.388 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:56:35.866 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:56:36.344 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:56:36.822 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:56:37.300 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:56:37.778 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:56:38.256 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:56:38.733 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:56:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:56:39.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:56:39.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:56:39.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:39.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:39.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:39.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:39.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:39.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:56:39.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:56:39.027 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:39.027 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:56:44.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:56:44.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:56:44.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:44.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:44.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:44.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:44.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:56:44.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:56:44.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:44.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:56:44.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:56:44.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:56:44.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:56:44.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:56:44.043 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:44.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:56:44.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:56:44.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:56:44.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:56:44.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:56:44.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:56:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:56:44.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:44.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:56:44.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:56:44.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:56:44.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:56:44.050 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:56:44.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:56:44.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:56:44.051 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:56:44.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:56:44.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:56:44.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:56:44.051 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:56:44.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:56:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:56:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:56:44.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:56:44.055 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:56:44.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:56:44.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:56:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:56:44.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:56:44.575 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:56:44.577 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:56:44.579 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:56:44.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:56:44.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:56:44.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:56:44.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:56:44.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:56:44.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:56:44.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:56:44.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:56:44.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:56:45.021 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:56:45.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:45.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:56:45.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:56:46.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:46.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:46.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:46.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:56:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:56:47.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:47.411 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:56:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:56:48.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:48.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:56:48.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:56:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:56:49.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:56:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:56:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:56:49.323 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:56:49.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:56:50.279 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:56:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:56:51.234 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:56:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:56:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:56:52.668 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:56:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:56:53.623 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:56:54.100 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:56:54.579 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:56:55.056 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:56:55.534 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:56:56.009 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:56:56.487 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:56:56.965 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:56:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:56:57.920 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:56:58.399 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:56:58.877 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:56:59.355 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:56:59.832 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:57:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:57:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:57:01.267 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:57:01.744 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:57:02.222 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:57:02.700 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:57:03.178 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:57:03.656 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:57:04.134 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:57:04.612 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:57:05.089 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:57:05.568 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:57:06.046 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:57:06.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:57:06.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:57:06.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:06.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:06.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:06.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:06.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:06.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:06.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:06.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:06.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:57:06.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:57:06.086 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:06.086 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4702 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:11.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:57:11.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:57:11.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:11.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:11.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:11.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:11.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:11.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:57:11.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:11.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:57:11.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:57:11.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:57:11.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:57:11.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:57:11.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:11.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:11.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:57:11.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:57:11.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:57:11.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:57:11.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:57:11.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:57:11.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:11.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:11.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:57:11.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:57:11.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:57:11.136 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:57:11.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:57:11.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:57:11.137 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:11.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:11.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:57:11.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:57:11.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:57:11.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:57:11.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:57:11.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:57:11.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:57:11.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:57:11.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:57:11.144 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:57:11.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:11.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:11.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:57:11.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:57:11.671 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:57:11.673 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:57:11.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:57:11.675 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:57:11.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:57:11.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:57:11.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:57:11.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:57:11.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:57:11.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:57:11.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:57:11.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:57:12.107 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:57:12.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:12.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:12.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:12.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:12.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:57:13.062 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:57:13.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:13.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:13.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:13.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:13.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:57:14.018 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:57:14.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:14.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:14.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:14.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:14.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:57:14.974 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:57:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:15.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:15.452 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:57:15.930 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:57:16.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:16.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:16.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:16.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:16.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:57:16.886 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:57:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:57:17.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:57:18.320 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:57:18.798 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:57:19.275 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:57:19.753 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:57:20.231 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:57:20.709 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:57:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:57:21.665 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:57:22.143 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:57:22.621 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:57:23.099 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:57:23.577 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:57:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:57:24.532 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:57:25.010 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:57:25.489 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:57:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:57:26.444 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:57:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:57:27.400 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:57:27.878 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:57:28.356 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:57:28.834 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:57:29.312 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:57:29.790 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:57:30.268 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:57:30.746 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:57:31.224 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:57:31.701 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:57:32.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:57:32.657 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:57:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:57:33.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:57:33.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:57:33.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:33.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:33.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:33.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:33.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:33.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:33.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:33.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:33.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:57:33.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:57:33.177 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:57:33.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.177 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.178 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.178 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:33.178 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4703 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:57:38.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:57:38.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:57:38.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:38.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:38.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:38.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:38.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:57:38.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:57:38.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:38.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:57:38.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:57:38.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:57:38.208 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:57:38.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:57:38.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:38.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:57:38.210 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:57:38.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:57:38.210 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:57:38.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:57:38.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:57:38.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:57:38.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:38.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:57:38.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:57:38.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:57:38.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:57:38.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:57:38.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:57:38.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:57:38.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:57:38.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:57:38.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:57:38.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:57:38.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:57:38.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:57:38.222 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:57:38.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:57:38.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:57:38.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:57:38.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:57:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:57:38.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:57:38.749 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:57:38.751 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:57:38.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:57:38.753 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:57:38.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:57:38.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:57:38.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:57:38.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:57:38.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:57:38.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:57:38.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:57:38.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:57:39.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:57:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:39.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:39.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:39.662 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:57:40.140 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:57:40.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:40.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:40.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:40.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:40.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:57:41.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:57:41.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:41.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:41.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:41.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:41.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:57:42.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:57:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:42.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:42.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:42.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:42.530 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:57:43.007 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:57:43.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:57:43.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:57:43.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:57:43.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:57:43.485 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:57:43.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:57:44.442 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:57:44.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:57:45.398 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:57:45.876 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:57:46.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:57:46.832 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:57:47.310 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:57:47.789 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:57:48.266 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:57:48.743 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:57:49.221 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:57:49.699 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:57:50.177 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:57:50.655 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:57:51.134 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:57:51.612 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:57:52.090 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:57:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:57:53.046 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:57:53.524 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:57:54.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:57:54.480 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:57:54.958 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:57:55.436 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:57:55.914 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:57:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:57:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:57:57.348 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:57:57.826 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:57:58.304 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:57:58.782 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:57:59.260 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:57:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:58:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:58:00.694 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:58:01.172 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:58:01.650 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:58:02.128 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:58:02.606 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:58:03.084 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:58:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:58:04.040 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:58:04.518 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:58:04.996 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:58:05.474 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:58:05.952 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:58:06.429 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 04:58:06.907 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 04:58:07.386 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 04:58:07.864 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 04:58:08.342 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 04:58:08.820 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 04:58:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 04:58:09.776 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 04:58:10.254 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 04:58:10.732 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 04:58:11.210 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 04:58:11.688 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 04:58:12.166 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 04:58:12.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:58:12.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:58:12.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:12.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:12.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:12.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:12.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:12.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:12.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:12.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:12.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:12.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:12.260 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:58:12.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7263 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:12.261 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=7264 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:17.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:17.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:17.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:17.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:17.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:17.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:17.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:17.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:17.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:17.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:17.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:58:17.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:58:17.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:58:17.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:17.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:17.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:17.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:58:17.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:17.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:17.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:58:17.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:17.279 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:17.282 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:58:17.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:17.282 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:58:17.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:58:17.286 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:58:17.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:58:17.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:58:17.808 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:58:17.810 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:58:17.811 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:58:17.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:58:17.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:58:17.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:58:17.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:58:17.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:58:17.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:58:17.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:58:17.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:58:17.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:58:18.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:58:18.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:18.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:18.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:18.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:18.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:58:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:58:19.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:19.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:19.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:19.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:19.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:58:20.163 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:58:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:20.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:20.641 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:58:21.119 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:58:21.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:21.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:21.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:21.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:21.597 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:58:22.075 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:58:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:22.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:22.553 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:58:23.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:58:23.508 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:58:23.986 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:58:24.464 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:58:24.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:58:25.420 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:58:25.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 04:58:26.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 04:58:26.855 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 04:58:27.333 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 04:58:27.810 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 04:58:28.289 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 04:58:28.767 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 04:58:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 04:58:29.723 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 04:58:30.201 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 04:58:30.680 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 04:58:31.158 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 04:58:31.636 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 04:58:32.114 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 04:58:32.592 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 04:58:33.069 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 04:58:33.547 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 04:58:34.025 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 04:58:34.503 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 04:58:34.981 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 04:58:35.459 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 04:58:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 04:58:36.415 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 04:58:36.892 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 04:58:37.370 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 04:58:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 04:58:38.326 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 04:58:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 04:58:39.283 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 04:58:39.761 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 04:58:40.239 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 04:58:40.718 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 04:58:41.196 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 04:58:41.674 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 04:58:42.152 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 04:58:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 04:58:43.108 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 04:58:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 04:58:44.063 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 04:58:44.541 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 04:58:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 04:58:45.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:58:45.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:58:45.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:45.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:45.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:45.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:45.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:45.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:45.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:45.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:45.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:45.311 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:58:45.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:45.311 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:58:50.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:50.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:50.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:50.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:50.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:50.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:50.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:50.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:50.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:50.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:50.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:58:50.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:58:50.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:58:50.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:50.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:50.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:50.345 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:58:50.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:50.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:58:50.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:58:50.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:58:50.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:50.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:50.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:50.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:58:50.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:50.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:58:50.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:58:50.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:58:50.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:50.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:50.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:50.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:58:50.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:50.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:58:50.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:58:50.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:58:50.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:58:50.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:58:50.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:58:50.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:58:50.355 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:58:50.355 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:50.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:58:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:58:50.872 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:58:50.873 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:58:50.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:58:50.874 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:58:50.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:50.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:50.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:50.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:50.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:50.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:50.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:50.931 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:58:55.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:55.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:55.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:55.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:55.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:55.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:55.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:55.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:55.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:55.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:58:55.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:55.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:58:55.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:58:55.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:58:55.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:58:55.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:58:55.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:55.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:55.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:55.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:58:55.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:58:55.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:55.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:58:55.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:58:55.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:58:55.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:58:55.976 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:58:55.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:58:55.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:58:56.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:58:56.491 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:58:56.491 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:58:56.492 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:58:56.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:58:56.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:58:56.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:58:56.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:58:56.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:58:56.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:58:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:58:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:58:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:58:56.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:58:56.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:58:56.545 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:01.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:01.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:01.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:01.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:01.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:01.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:01.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:01.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:01.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:01.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:01.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:01.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:59:01.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:01.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:59:01.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:59:01.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:59:01.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:01.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:01.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:01.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:59:01.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:01.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:01.575 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:59:01.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:01.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:59:01.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:59:01.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:59:01.581 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:59:01.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:01.586 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:59:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:59:02.100 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:59:02.100 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:59:02.100 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:59:02.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:59:02.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:02.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:02.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:02.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:02.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:02.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:02.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:02.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:02.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:02.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:02.159 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:07.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:07.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:07.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:07.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:07.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:07.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:07.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:07.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:07.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:07.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:07.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:07.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:59:07.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:07.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:59:07.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:59:07.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:59:07.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:07.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:07.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:07.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:59:07.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:07.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:59:07.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:59:07.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:59:07.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:07.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:07.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:07.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:59:07.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:07.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:59:07.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:59:07.190 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:59:07.190 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:07.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:07.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:59:07.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:59:07.707 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:59:07.708 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:59:07.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:59:07.709 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:07.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:59:07.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:59:07.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:59:08.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:59:08.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:08.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:08.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:08.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:08.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:59:09.109 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:59:09.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:09.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:09.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:09.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:09.587 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:59:10.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:59:10.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:10.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:10.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:10.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:10.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:59:11.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:59:11.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:11.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:11.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:11.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:11.499 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:59:11.977 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:59:12.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:12.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:12.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:12.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:12.455 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:59:12.933 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:59:13.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:59:13.889 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:59:14.367 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:59:14.844 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:59:15.322 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:59:15.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:15.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:15.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:15.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:15.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:15.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:15.742 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:15.742 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:15.742 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:15.742 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:20.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:20.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:20.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:20.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:20.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:20.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:20.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:20.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:20.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:20.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:20.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:59:20.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:59:20.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:59:20.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:20.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:20.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:20.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:59:20.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:20.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:20.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:59:20.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:20.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:59:20.762 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:59:20.762 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:59:20.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:20.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:20.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:20.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:59:20.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:20.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:59:20.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:59:20.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:59:20.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:59:20.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:59:20.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:59:20.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:59:20.768 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:59:20.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:20.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:59:21.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:59:21.291 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:59:21.292 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:59:21.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:59:21.294 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:21.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:59:21.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:59:21.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:59:21.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:59:21.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:21.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:21.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:21.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:22.213 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:59:22.692 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:59:22.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:22.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:59:23.647 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:59:23.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:23.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:23.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:23.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:24.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:59:24.603 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:59:24.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:24.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:24.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:24.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:25.081 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:59:25.559 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:59:25.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:25.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:25.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:25.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:26.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:59:26.515 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:59:26.993 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:59:27.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:59:27.949 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:59:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:59:28.904 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:59:29.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:29.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:29.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:29.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:29.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:29.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:29.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:29.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:29.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:29.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:29.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:29.314 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:29.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:34.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:34.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:34.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:34.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:34.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:34.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:34.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:34.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:34.341 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:34.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:34.342 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:59:34.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:59:34.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:59:34.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:34.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:34.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:34.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:59:34.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:34.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:59:34.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:59:34.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:59:34.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:34.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:34.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:34.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:59:34.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:34.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:59:34.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:59:34.355 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:59:34.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:34.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:34.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:34.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:59:34.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:34.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:59:34.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:59:34.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:59:34.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:59:34.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:59:34.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:59:34.361 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:59:34.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:34.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:34.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:59:34.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:59:34.886 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:59:34.887 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:59:34.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:59:34.889 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:59:34.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:34.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:34.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:59:34.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:59:34.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:59:34.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:59:34.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:59:34.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:59:35.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:59:35.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:35.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:35.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:35.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:35.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:59:36.285 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:59:36.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:36.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:36.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:36.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:36.763 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:59:37.240 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:59:37.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:37.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:37.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:37.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:37.738 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:59:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:59:38.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:38.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:38.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:38.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:38.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:59:39.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:59:39.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:39.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:39.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:39.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:39.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:59:40.127 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:59:40.605 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:59:41.083 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:59:41.561 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:59:42.038 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:59:42.516 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:59:42.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:42.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:42.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:42.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:42.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:42.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:42.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:42.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:42.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:42.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:42.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:42.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:42.915 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:42.915 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:42.915 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:42.915 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:47.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:47.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:47.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:47.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:47.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:47.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:47.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:47.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:47.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:47.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 04:59:47.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 04:59:47.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 04:59:47.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 04:59:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:47.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:47.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:47.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 04:59:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 04:59:47.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:47.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 04:59:47.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 04:59:47.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 04:59:47.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 04:59:47.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 04:59:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:47.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 04:59:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:47.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 04:59:47.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 04:59:47.941 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 04:59:47.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 04:59:47.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 04:59:47.947 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 04:59:47.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 04:59:47.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 04:59:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 04:59:47.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 04:59:48.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 04:59:48.468 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 04:59:48.469 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 04:59:48.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 04:59:48.470 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:48.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 04:59:48.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 04:59:48.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 04:59:48.913 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 04:59:48.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:48.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:48.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:48.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:49.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 04:59:49.869 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 04:59:49.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:50.347 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 04:59:50.825 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 04:59:50.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:50.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:50.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:50.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:51.303 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 04:59:51.781 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 04:59:51.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:51.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:51.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:51.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:52.259 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 04:59:52.736 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 04:59:52.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:52.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:52.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:52.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:53.214 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 04:59:53.692 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 04:59:54.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 04:59:54.648 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 04:59:55.126 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 04:59:55.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 04:59:56.082 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 04:59:56.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 04:59:56.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 04:59:56.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 04:59:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 04:59:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 04:59:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 04:59:56.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 04:59:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 04:59:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 04:59:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 04:59:56.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 04:59:56.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 04:59:56.502 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.503 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 04:59:56.504 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:00:01.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:01.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:01.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:01.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:01.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:01.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:01.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:01.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:01.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:01.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:01.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:00:01.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:00:01.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:00:01.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:01.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:01.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:00:01.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:01.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:00:01.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:00:01.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:00:01.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:01.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:01.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:01.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:00:01.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:01.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:01.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:00:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:01.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:00:01.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:00:01.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:00:01.544 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:00:01.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:00:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:01.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:00:02.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:00:02.063 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:00:02.065 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:00:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:00:02.066 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:00:02.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:02.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:02.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:00:02.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:00:02.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:00:02.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:00:02.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:00:02.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:00:02.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:00:02.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:02.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:00:03.464 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:00:03.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:03.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:03.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:03.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:03.943 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:00:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:00:04.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:04.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:04.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:04.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:04.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:00:05.377 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:00:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:05.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:00:06.332 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:00:06.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:06.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:06.810 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:00:07.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:00:07.765 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:00:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:00:08.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:00:09.199 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:00:09.677 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:00:10.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:10.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:10.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:10.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:10.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:10.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:10.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:10.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:10.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:10.100 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:00:15.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:15.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:15.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:15.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:15.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:15.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:15.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:15.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:15.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:15.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:15.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:00:15.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:00:15.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:00:15.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:15.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:15.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:15.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:00:15.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:15.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:15.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:00:15.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:15.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:15.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:00:15.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:15.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:00:15.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:00:15.126 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:00:15.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:15.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:00:15.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:00:15.646 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:00:15.647 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:00:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:00:15.648 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:00:15.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:15.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:15.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:00:15.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:00:15.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:00:15.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:00:15.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:00:15.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:00:16.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:00:16.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:16.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:16.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:16.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:16.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:00:17.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:00:17.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:17.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:17.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:17.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:17.525 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:00:18.003 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:00:18.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:18.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:18.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:18.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:18.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:00:18.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:00:19.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:19.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:19.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:19.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:19.437 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:00:19.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:00:20.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:20.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:20.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:20.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:20.392 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:00:20.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:00:21.348 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:00:21.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:00:22.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:00:22.782 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:00:23.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:00:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:00:24.216 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:00:24.694 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:00:25.172 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:00:25.651 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:00:26.128 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:00:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:00:27.084 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:00:27.561 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:00:28.039 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:00:28.517 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:00:28.995 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:00:29.473 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:00:29.951 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:00:30.429 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:00:30.907 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:00:31.385 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:00:31.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:31.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:31.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:31.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:31.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:31.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:31.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:31.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:31.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:31.687 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:00:36.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:36.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:36.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:36.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:36.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:36.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:36.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:36.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:36.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:36.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:36.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:00:36.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:00:36.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:00:36.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:36.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:36.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:36.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:00:36.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:36.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:00:36.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:00:36.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:00:36.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:36.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:36.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:36.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:00:36.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:36.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:36.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:00:36.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:36.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:00:36.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:00:36.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:00:36.723 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:00:36.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:36.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:36.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:36.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:00:37.212 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:00:37.246 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:00:37.248 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:00:37.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:00:37.250 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:00:37.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:37.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:37.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:00:37.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:00:37.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:00:37.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:00:37.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:00:37.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:00:37.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:00:37.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:37.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:37.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:37.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:38.168 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:00:38.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:00:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:38.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:38.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:38.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:00:39.601 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:00:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:39.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:40.080 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:00:40.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:00:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:40.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:41.036 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:00:41.513 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:00:41.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:41.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:41.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:41.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:00:42.468 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:00:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:00:43.424 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:00:43.902 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:00:44.379 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:00:44.858 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:00:45.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:45.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:45.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:45.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:45.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:45.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:45.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:45.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:45.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:45.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:45.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:45.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:45.327 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:00:50.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:00:50.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:00:50.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:50.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:50.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:50.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:50.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:00:50.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:50.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:50.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:00:50.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:00:50.349 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:00:50.349 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:00:50.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:50.349 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:50.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:00:50.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:00:50.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:00:50.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:00:50.352 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:00:50.352 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:00:50.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:50.352 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:50.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:00:50.353 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:00:50.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:00:50.353 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:00:50.355 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:00:50.355 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:00:50.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:50.356 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:00:50.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:00:50.356 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:00:50.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:00:50.356 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:00:50.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:00:50.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:00:50.360 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:00:50.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:00:50.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:00:50.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:00:50.875 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:00:50.876 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:00:50.877 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:00:50.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:00:50.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:00:50.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:00:50.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:00:50.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:00:50.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:00:50.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:00:50.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:00:50.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:00:51.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:00:51.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:51.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:51.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:51.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:51.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:00:52.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:00:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:52.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:52.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:00:53.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:00:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:53.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:53.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:53.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:53.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:00:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:00:54.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:54.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:54.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:54.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:54.669 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:00:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:00:55.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:00:55.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:00:55.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:00:55.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:00:55.626 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:00:56.104 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:00:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:00:57.060 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:00:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:00:58.015 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:00:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:00:58.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:00:59.449 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:00:59.927 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:01:00.405 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:01:00.883 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:01:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:01:01.839 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:01:02.317 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:01:02.794 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:01:03.285 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:01:03.763 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:01:04.241 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:01:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:01:05.197 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:01:05.674 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:01:06.152 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:01:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:01:06.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:06.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:06.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:06.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:06.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:06.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:06.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:06.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:06.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:06.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:06.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:06.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:06.922 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:06.922 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:06.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:06.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:06.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:06.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:06.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:11.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:11.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:11.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:11.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:11.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:11.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:11.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:11.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:11.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:11.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:11.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:11.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:11.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:11.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:11.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:11.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:11.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:11.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:11.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:11.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:11.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:11.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:11.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:11.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:11.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:11.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:11.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:11.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:11.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:11.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:11.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:11.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:11.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:11.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:11.953 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:11.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:11.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:11.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:11.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:11.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:11.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:11.957 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:11.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:11.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:12.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:12.470 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:12.470 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:12.471 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:12.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:12.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:12.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:12.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:12.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:12.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:12.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:12.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:12.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:12.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:12.535 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:17.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:17.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:17.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:17.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:17.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:17.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:17.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:17.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:17.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:17.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:17.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:17.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:17.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:17.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:17.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:17.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:17.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:17.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:17.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:17.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:17.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:17.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:17.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:17.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:17.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:17.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:17.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:17.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:17.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:17.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:17.562 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:17.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:17.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:17.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:17.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:18.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:18.080 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:18.081 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:18.082 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:18.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:18.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:18.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:18.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:18.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:18.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:18.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:18.149 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:18.149 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:23.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:23.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:23.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:23.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:23.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:23.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:23.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:23.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:23.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:23.170 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:23.170 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:23.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:23.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:23.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:23.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:23.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:23.171 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:23.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:23.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:23.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:23.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:23.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:23.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:23.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:23.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:23.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:23.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:23.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:23.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:23.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:23.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:23.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:23.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:23.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:23.181 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:23.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:23.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:23.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:23.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:23.698 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:23.698 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:23.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:23.699 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:23.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:23.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:23.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:23.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:23.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:23.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:23.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:23.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:23.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:23.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:23.768 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:28.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:28.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:28.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:28.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:28.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:28.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:28.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:28.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:28.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:28.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:28.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:28.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:28.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:28.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:28.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:28.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:28.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:28.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:28.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:28.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:28.798 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:28.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:28.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:28.803 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:28.803 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:28.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:28.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:28.808 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:29.317 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:29.317 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:29.317 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:29.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:29.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:29.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:29.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:29.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:29.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:29.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:29.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:29.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:29.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:29.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:29.393 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:34.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:34.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:34.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:34.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:34.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:34.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:34.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:34.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:34.423 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:34.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:34.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:34.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:34.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:34.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:34.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:34.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:34.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:34.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:34.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:34.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:34.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:34.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:34.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:34.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:34.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:34.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:34.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:34.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:34.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:34.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:34.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:34.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:34.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:34.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:34.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:34.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:34.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:34.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:34.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:34.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:34.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:34.446 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:34.447 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:34.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:34.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:34.973 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:34.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:34.976 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:34.978 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:35.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:35.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:35.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:35.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:35.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:35.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:35.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:35.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:35.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:35.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:35.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:35.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:35.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:35.046 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:35.046 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:40.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:40.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:40.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:40.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:40.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:40.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:40.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:40.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:40.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:40.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:40.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:40.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:40.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:40.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:40.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:40.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:40.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:40.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:40.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:40.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:40.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:40.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:40.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:40.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:40.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:40.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:40.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:40.077 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:40.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:40.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:40.594 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:40.595 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:40.596 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:40.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:40.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:40.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:40.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:40.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:40.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:40.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:40.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:40.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:40.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:40.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:40.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:40.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:40.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:40.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:40.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:40.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:40.679 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:40.679 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:01:45.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:01:45.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:01:45.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:45.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:45.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:45.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:45.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:01:45.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:45.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:45.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:01:45.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:01:45.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:01:45.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:01:45.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:45.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:45.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:01:45.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:01:45.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:01:45.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:45.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:01:45.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:01:45.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:01:45.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:01:45.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:01:45.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:45.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:01:45.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:01:45.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:01:45.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:01:45.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:01:45.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:01:45.710 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:01:45.710 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:01:45.710 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:01:45.715 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:01:46.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:01:46.235 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:01:46.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:01:46.238 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:01:46.241 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:01:46.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:01:46.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:01:46.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:01:46.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:01:46.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:01:46.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:01:46.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:01:46.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:01:46.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:01:46.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:46.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:46.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:46.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:47.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:01:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:01:47.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:47.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:47.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:47.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:48.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:01:48.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:01:48.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:48.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:49.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:01:49.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:01:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:49.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:49.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:50.019 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:01:50.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:01:50.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:01:50.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:01:50.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:01:50.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:01:50.975 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:01:51.453 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:01:51.932 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:01:52.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:01:52.888 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:01:53.366 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:01:53.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:01:54.322 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:01:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:01:55.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:01:55.756 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:01:56.234 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:01:56.713 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:01:57.191 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:01:57.668 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:01:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:01:58.624 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:01:59.101 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:01:59.579 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:02:00.057 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:02:00.535 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:02:01.013 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:02:01.491 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:02:01.969 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:02:02.446 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:02:02.925 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:02:03.402 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:02:03.881 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:02:04.358 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:02:04.837 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:02:05.314 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:02:05.789 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:02:06.266 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:02:06.744 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:02:07.222 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:02:07.700 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:02:08.178 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:02:08.655 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:02:09.133 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:02:09.611 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:02:10.089 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:02:10.567 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:02:11.045 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:02:11.523 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:02:12.001 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:02:12.479 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:02:12.957 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:02:13.435 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:02:13.913 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:02:14.391 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:02:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:02:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:02:15.824 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:02:16.302 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:02:16.780 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:02:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:02:17.736 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:02:18.214 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:02:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:02:19.169 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:02:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:02:19.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:02:19.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:02:19.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:19.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:19.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:19.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:19.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:19.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:19.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:19.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:19.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:19.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:19.740 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:02:24.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:24.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:24.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:24.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:24.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:24.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:24.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:24.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:24.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:24.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:24.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:24.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:02:24.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:24.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:02:24.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:02:24.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:02:24.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:24.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:24.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:02:24.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:24.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:02:24.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:24.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:02:24.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:02:24.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:24.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:24.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:24.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:02:24.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:24.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:02:24.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:02:24.776 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:02:24.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:24.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:02:25.264 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:02:25.301 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:02:25.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:02:25.302 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:02:25.303 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:02:25.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:02:25.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:25.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:25.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:26.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:02:26.698 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:02:26.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:26.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:26.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:26.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:27.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:02:27.654 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:02:27.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:27.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:27.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:27.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:28.133 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:02:28.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:02:28.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:28.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:28.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:28.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:28.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:28.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:28.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:28.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:28.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:28.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:28.323 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:02:28.324 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:28.324 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:33.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:33.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:33.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:33.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:33.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:33.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:33.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:33.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:33.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:33.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:33.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:02:33.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:02:33.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:02:33.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:33.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:33.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:33.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:02:33.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:33.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:33.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:02:33.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:33.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:02:33.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:02:33.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:02:33.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:33.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:33.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:33.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:02:33.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:33.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:02:33.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:02:33.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:02:33.354 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:02:33.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:33.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:33.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:02:33.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:02:33.868 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:02:33.869 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:02:33.870 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:02:33.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:02:34.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:02:34.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:34.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:34.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:34.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:34.800 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:02:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:02:35.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:35.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:02:36.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:02:36.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:36.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:36.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:36.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:02:37.193 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:02:37.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:37.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:37.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:37.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:37.670 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:02:38.149 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:02:38.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:38.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:38.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:38.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:38.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:02:39.106 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:02:39.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:02:39.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:39.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:39.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:39.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:39.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:39.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:39.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:39.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:39.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:39.884 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:39.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:39.884 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1392 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:44.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:44.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:44.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:44.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:44.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:44.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:44.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:44.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:44.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:44.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:44.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:02:44.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:02:44.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:02:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:44.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:44.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:44.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:02:44.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:44.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:02:44.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:02:44.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:02:44.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:44.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:44.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:44.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:02:44.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:44.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:44.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:02:44.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:44.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:02:44.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:02:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:02:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:02:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:02:44.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:02:44.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:02:44.918 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:02:44.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:02:44.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:44.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:02:45.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:02:45.439 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:02:45.441 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:02:45.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:02:45.441 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:02:45.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:02:45.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:45.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:45.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:45.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:46.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:02:46.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:02:46.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:46.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:46.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:46.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:47.321 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:02:47.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:02:47.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:47.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:47.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:47.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:48.278 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:02:48.756 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:02:48.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:48.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:48.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:48.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:49.235 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:02:49.714 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:02:49.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:49.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:49.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:49.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:50.192 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:02:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:02:51.150 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:02:51.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:51.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:51.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:51.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:51.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:51.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:51.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:51.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:51.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:51.451 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:02:51.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:51.451 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:51.452 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1389 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:02:56.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:02:56.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:02:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:56.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:56.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:56.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:56.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:02:56.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:56.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:56.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:02:56.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:02:56.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:02:56.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:02:56.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:56.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:02:56.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:02:56.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:02:56.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:02:56.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:02:56.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:02:56.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:56.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:56.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:02:56.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:02:56.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:02:56.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:56.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:02:56.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:02:56.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:02:56.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:02:56.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:02:56.488 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:02:56.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:02:56.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:02:56.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:02:56.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:02:57.011 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:02:57.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:02:57.014 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:02:57.015 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:02:57.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:02:57.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:57.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:57.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:57.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:02:58.410 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:02:58.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:58.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:58.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:58.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:58.889 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:02:59.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:02:59.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:02:59.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:02:59.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:02:59.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:02:59.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:03:00.325 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:03:00.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:00.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:00.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:00.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:00.803 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:03:01.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:03:01.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:01.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:01.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:01.760 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:03:02.239 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:03:02.717 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:03:03.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:03.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:03.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:03.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:03.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:03.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:03.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:03.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:03.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:03.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:03.029 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:08.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:08.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:08.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:08.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:08.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:08.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:08.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:08.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:08.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:08.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:08.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:08.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:08.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:08.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:08.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:08.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:08.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:08.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:08.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:08.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:08.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:08.063 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:08.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:08.063 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:08.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:08.066 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:08.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:08.071 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:08.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:08.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:08.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:08.584 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:08.585 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:08.585 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:08.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:09.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:03:09.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:09.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:09.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:09.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:09.511 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:03:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:03:10.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:10.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:10.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:10.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:10.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:03:10.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:03:11.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:11.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:11.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:11.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:11.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:03:11.902 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:03:12.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:12.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:12.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:12.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:12.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:03:12.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:12.858 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:03:13.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:13.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:13.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:13.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:13.337 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:03:13.815 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:03:14.293 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:03:14.772 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:03:15.250 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:03:15.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:03:16.207 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:03:16.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:16.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:16.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:16.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:16.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:16.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:16.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:16.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:16.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:16.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:16.620 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:21.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:21.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:21.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:21.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:21.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:21.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:21.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:21.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:21.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:21.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:21.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:21.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:21.639 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:21.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:21.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:21.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:21.640 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:21.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:21.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:21.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:21.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:21.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:21.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:21.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:21.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:21.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:21.653 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:21.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:21.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:21.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:22.172 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:22.173 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:22.174 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:22.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:22.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:03:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:22.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:23.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:03:23.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:03:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:23.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:24.056 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:03:24.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:03:24.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:24.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:24.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:24.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:25.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:03:25.492 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:03:25.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:25.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:25.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:25.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:25.970 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:03:26.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:26.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:26.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:26.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:26.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:26.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:26.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:26.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:26.192 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:26.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:26.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:31.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:31.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:31.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:31.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:31.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:31.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:31.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:31.209 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:31.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:31.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:31.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:31.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:31.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:31.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:31.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:31.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:31.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:31.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:31.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:31.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:31.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:31.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:31.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:31.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:31.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:31.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:31.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:31.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:31.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:31.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:31.223 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:31.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:31.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:31.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:31.740 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:31.741 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:31.742 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:31.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:31.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:31.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:31.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:31.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:31.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:31.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:31.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:31.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:31.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:31.801 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:31.801 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:36.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:36.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:36.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:36.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:36.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:36.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:36.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:36.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:36.821 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:36.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:36.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:36.825 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:36.825 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:36.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:36.826 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:36.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:36.826 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:36.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:36.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:36.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:36.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:36.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:36.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:36.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:36.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:36.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:36.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:36.832 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:36.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:36.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:36.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:36.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:36.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:36.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:36.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:36.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:36.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:36.837 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:36.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:36.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:37.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:37.358 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:37.359 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:37.361 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:37.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:37.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:37.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:37.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:37.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:37.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:37.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:37.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:37.377 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:37.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:42.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:42.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:42.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:42.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:42.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:42.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:42.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:42.394 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:42.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:42.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:42.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:42.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:42.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:42.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:42.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:42.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:42.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:42.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:42.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:42.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:42.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:42.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:42.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:42.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:42.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:42.403 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:42.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:42.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:42.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:42.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:42.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:42.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:42.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:42.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:42.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:42.410 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:42.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:42.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:42.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:42.927 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:42.929 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:42.930 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:42.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:42.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:42.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:42.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:42.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:42.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:42.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:42.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:42.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:42.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:42.985 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.986 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.987 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.987 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.987 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:42.987 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:03:47.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:47.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:47.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:47.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:47.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:47.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:48.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:48.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:48.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:48.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:48.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:48.006 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:48.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:48.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:48.007 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:48.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:48.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:48.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:48.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:48.011 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:48.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:48.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:48.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:48.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:48.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:48.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:48.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:48.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:48.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:48.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:48.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:48.021 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:48.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:48.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:48.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:48.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:48.547 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:48.549 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:48.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:48.550 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:48.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:03:48.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:03:48.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:03:48.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:03:48.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:03:48.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:03:48.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:03:48.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:03:48.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:03:49.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:49.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:49.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:49.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:03:49.942 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:03:50.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:50.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:50.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:50.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:50.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:03:50.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:03:51.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:51.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:51.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:51.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:51.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:03:51.619 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:03:51.619 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:03:51.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:03:51.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:03:51.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:03:51.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:03:51.664 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:03:51.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:51.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:51.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:51.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:51.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:51.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:51.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:51.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:51.674 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:03:56.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:03:56.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:03:56.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:56.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:56.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:56.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:56.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:03:56.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:56.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:56.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:03:56.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:03:56.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:03:56.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:03:56.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:56.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:56.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:03:56.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:03:56.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:03:56.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:03:56.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:03:56.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:03:56.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:56.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:56.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:03:56.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:03:56.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:03:56.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:03:56.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:03:56.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:03:56.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:56.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:03:56.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:03:56.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:03:56.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:03:56.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:03:56.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:03:56.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:03:56.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:03:56.715 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:03:56.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:03:56.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:03:56.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:03:57.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:03:57.245 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:03:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:03:57.248 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:03:57.251 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:03:57.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:03:57.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:03:57.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:03:57.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:03:57.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:03:57.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:03:57.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:03:57.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:03:57.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:03:57.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:57.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:57.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:57.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:58.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:03:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:03:58.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:58.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:58.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:58.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:03:59.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:03:59.592 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:03:59.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:03:59.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:03:59.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:03:59.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:00.071 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:04:00.314 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:04:00.314 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:04:00.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:00.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:00.548 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:04:00.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:00.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:00.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:00.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:01.027 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:04:01.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:01.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:01.039 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:04:01.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:01.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:01.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:01.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:01.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:01.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:01.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:01.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:01.048 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:04:06.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:06.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:06.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:06.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:06.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:06.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:06.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:06.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:06.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:06.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:06.064 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:04:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:06.064 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:04:06.066 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:04:06.066 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:04:06.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:06.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:06.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:06.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:04:06.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:06.067 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:04:06.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:04:06.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:04:06.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:06.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:06.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:06.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:04:06.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:06.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.072 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:04:06.072 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:04:06.072 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:04:06.072 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:04:06.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:04:06.592 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:04:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:06.595 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:04:06.597 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:04:06.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:06.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:06.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:04:06.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:06.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:04:06.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:04:06.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:04:06.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:04:07.037 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:04:07.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:07.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:07.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:04:07.993 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:04:08.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:08.470 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:04:08.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:04:09.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:09.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:09.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:09.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:09.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:04:09.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:04:09.669 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:04:09.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:09.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:09.904 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:04:10.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:10.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:10.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:10.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:10.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:04:10.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:04:11.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:11.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:11.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:11.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:11.340 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:04:11.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:04:12.296 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:04:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:04:13.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:04:13.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:04:14.209 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:04:14.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:14.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:14.672 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:04:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:14.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:04:14.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:14.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:14.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:14.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:14.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:14.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:14.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:14.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:14.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:14.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:14.693 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:04:19.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:19.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:19.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:19.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:19.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:19.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:19.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:19.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:19.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:19.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:19.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:04:19.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:04:19.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:04:19.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:19.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:19.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:19.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:04:19.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:19.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:04:19.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:04:19.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:04:19.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:19.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:19.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:19.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:04:19.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:19.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:04:19.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:04:19.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:04:19.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:19.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:19.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:19.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:04:19.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:19.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:04:19.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:04:19.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:04:19.738 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:04:19.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:19.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:04:20.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:04:20.265 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:04:20.267 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:04:20.269 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:04:20.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:20.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:20.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:20.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:04:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:20.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:04:20.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:04:20.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:04:20.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:04:20.704 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:04:20.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:20.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:20.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:20.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:21.182 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:04:21.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:04:21.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:21.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:21.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:21.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:04:22.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:04:22.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:22.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:22.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:22.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:23.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:04:23.337 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:04:23.337 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:04:23.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:23.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:23.572 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:04:23.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:23.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:23.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:23.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:24.050 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:04:24.528 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:04:24.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:24.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:24.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:24.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:04:25.485 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:04:25.964 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:04:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:04:26.920 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:04:27.399 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:04:27.877 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:04:28.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:28.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:28.340 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:04:28.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:28.356 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:04:28.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:28.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:28.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:28.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:28.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:28.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:28.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:28.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:28.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:28.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:28.363 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:04:33.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:33.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:33.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:33.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:33.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:33.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:33.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:33.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:33.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:33.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:33.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:04:33.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:04:33.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:04:33.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:33.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:33.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:33.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:04:33.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:33.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:33.384 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:04:33.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:33.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:33.387 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:04:33.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:33.387 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:04:33.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:04:33.391 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:04:33.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:33.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:04:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:04:33.914 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:04:33.916 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:04:33.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:33.918 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:04:33.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:33.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:33.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:04:33.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:33.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:04:33.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:04:33.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:04:33.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:04:34.358 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:04:34.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:34.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:34.836 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:04:35.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:04:35.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:35.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:35.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:35.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:35.792 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:04:36.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:04:36.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:36.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:36.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:36.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:36.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:04:36.991 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:04:36.991 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:04:36.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:36.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:37.226 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:04:37.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:37.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:37.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:37.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:37.705 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:04:38.184 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:04:38.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:38.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:38.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:38.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:04:39.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:04:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:04:40.097 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:04:40.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:04:41.054 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:04:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:04:41.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:41.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:41.995 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:04:41.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:42.010 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:04:42.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:42.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:42.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:42.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:42.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:42.013 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:04:47.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:47.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:47.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:47.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:47.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:47.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:47.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:47.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:47.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:47.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:47.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:04:47.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:04:47.034 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:04:47.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:47.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:47.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:47.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:04:47.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:47.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:04:47.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:04:47.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:04:47.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:47.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:47.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:04:47.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:47.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:47.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:04:47.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:04:47.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:04:47.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:47.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:47.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:04:47.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:47.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:47.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:04:47.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:04:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:04:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:04:47.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:04:47.054 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:04:47.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:47.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:47.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:47.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:04:47.542 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:04:47.576 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:04:47.577 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:04:47.579 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:04:47.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:47.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:47.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:47.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:04:47.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:47.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:04:47.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:04:47.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:04:47.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:04:47.633 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:04:47.634 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:04:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:48.021 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:04:48.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:48.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:48.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:48.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:48.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:04:48.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:04:49.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:49.455 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:04:49.934 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:04:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:50.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:50.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:04:50.891 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:04:51.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:51.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:51.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:51.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:51.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:04:51.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:04:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:52.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:52.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:52.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:52.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:04:52.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:52.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:52.636 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:04:52.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:52.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:52.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:52.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:52.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:52.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:52.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:52.649 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:52.649 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1193 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:04:57.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:04:57.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:04:57.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:57.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:57.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:57.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:57.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:04:57.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:57.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:57.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:04:57.667 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:04:57.670 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:04:57.670 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:04:57.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:57.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:57.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:04:57.671 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:04:57.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:04:57.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:04:57.673 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:04:57.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:04:57.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:57.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:57.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:04:57.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:04:57.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:04:57.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:57.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:04:57.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:04:57.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:04:57.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:04:57.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:04:57.683 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:04:57.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:04:57.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:04:58.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:04:58.207 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:04:58.209 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:04:58.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:04:58.211 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:04:58.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:04:58.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:04:58.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:04:58.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:04:58.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:04:58.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:04:58.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:04:58.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:04:58.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:04:58.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:58.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:58.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:58.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:04:59.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:04:59.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:04:59.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:04:59.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:04:59.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:04:59.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:00.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:05:00.561 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:05:00.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:00.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:00.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:00.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:01.039 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:05:01.282 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:05:01.282 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:05:01.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:01.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:01.517 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:05:01.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:01.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:01.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:01.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:01.995 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:05:02.472 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:05:02.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:02.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:02.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:02.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:02.951 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:05:03.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:03.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:03.285 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:05:03.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:03.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:03.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:03.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:03.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:03.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:03.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:03.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:03.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:03.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:03.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:03.298 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:08.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:08.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:08.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:08.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:08.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:08.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:08.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:08.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:08.325 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:08.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:08.325 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:08.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:08.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:08.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:08.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:08.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:08.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:08.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:08.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:08.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:08.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:08.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:08.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:08.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:08.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:08.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:08.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:08.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:08.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:08.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:08.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:08.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:08.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:08.343 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:08.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:08.343 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:08.344 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:08.344 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:08.344 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:08.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:08.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:08.349 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:08.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:08.868 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:08.870 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:08.872 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:08.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:08.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:08.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:08.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:08.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:08.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:08.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:08.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:08.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:09.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:05:09.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:09.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:09.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:09.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:09.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:05:10.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:05:10.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:10.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:10.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:10.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:10.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:05:11.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:05:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:11.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:11.697 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:05:11.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:11.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:11.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:12.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:12.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:12.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:12.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:12.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:12.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:12.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:12.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:12.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:12.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:12.008 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:12.009 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=783 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:17.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:17.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:17.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:17.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:17.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:17.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:17.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:17.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:17.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:17.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:17.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:17.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:17.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:17.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:17.033 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:17.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:17.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:17.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:17.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:17.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:17.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:17.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:17.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:17.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:17.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:17.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:17.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:17.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:17.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:17.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:17.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:17.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:17.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:17.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:17.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:17.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:17.048 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:17.048 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:17.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:17.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:17.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:17.053 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:17.578 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:17.581 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:17.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:17.583 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:17.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:17.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:17.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:17.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:17.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:17.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:17.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:18.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:05:18.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:18.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:18.491 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:05:18.969 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:05:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:19.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:19.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:05:19.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:05:20.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:20.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:20.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:20.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:20.403 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:05:20.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:20.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:20.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:20.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:20.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:20.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:20.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:20.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:20.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:20.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:20.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:20.728 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:20.728 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:25.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:25.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:25.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:25.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:25.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:25.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:25.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:25.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:25.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:25.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:25.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:25.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:25.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:25.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:25.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:25.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:25.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:25.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:25.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:25.752 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:25.752 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:25.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:25.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:25.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:25.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:25.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:25.753 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:25.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:25.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:25.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:25.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:25.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:25.760 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:25.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:25.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:25.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:25.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:26.246 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:26.285 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:26.287 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:26.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:26.289 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:26.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:26.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:26.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:26.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:26.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:26.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:26.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:26.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:26.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:26.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:26.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:26.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:26.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:26.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:26.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:26.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:26.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:26.570 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:26.570 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:31.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:31.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:31.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:31.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:31.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:31.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:31.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:31.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:31.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:31.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:31.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:31.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:31.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:31.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:31.597 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:31.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:31.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:31.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:31.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:31.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:31.604 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:31.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:31.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:32.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:32.122 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:32.123 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:32.124 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:32.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:32.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:32.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:32.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:32.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:32.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:32.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:32.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:32.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:32.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:32.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:32.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:32.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:32.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:32.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:32.180 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:32.180 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:32.180 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:32.180 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:37.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:37.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:37.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:37.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:37.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:37.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:37.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:37.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:37.203 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:37.203 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:37.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:37.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:37.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:37.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:37.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:37.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:37.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:37.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:37.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:37.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:37.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:37.209 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:37.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:37.209 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:37.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:37.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:37.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:37.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:37.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:37.213 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:37.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:37.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:37.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:37.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:37.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:37.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:37.220 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:37.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:37.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:37.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:37.736 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:37.736 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:37.736 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:37.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:37.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:37.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:37.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:38.183 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:05:38.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:38.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:38.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:05:39.137 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:05:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:39.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:39.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:05:40.093 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:05:40.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:40.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:40.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:40.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:40.571 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:05:41.049 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:05:41.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:41.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:41.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:41.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:41.527 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:05:42.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:05:42.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:42.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:05:42.962 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:05:43.440 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:05:43.916 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:05:44.394 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:05:44.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:05:45.350 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:05:45.828 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:05:46.306 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:05:46.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:46.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:46.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:46.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:46.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:46.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:46.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:46.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:46.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:46.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:46.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:46.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:46.639 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.639 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:46.640 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2012 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:05:51.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:05:51.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:05:51.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:51.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:51.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:51.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:51.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:05:51.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:51.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:51.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:05:51.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:05:51.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:05:51.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:05:51.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:51.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:51.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:05:51.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:05:51.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:05:51.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:51.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:05:51.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:05:51.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:51.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:05:51.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:05:51.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:05:51.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:05:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:05:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:05:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:05:51.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:05:51.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:05:51.666 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:05:51.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:05:51.671 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:05:52.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:05:52.190 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:05:52.191 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:05:52.193 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:05:52.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:05:52.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:05:52.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:05:52.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:05:52.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:05:52.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:05:52.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:05:52.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:05:52.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:05:52.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:05:52.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:52.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:52.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:52.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:53.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:05:53.588 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:05:53.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:05:54.545 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:05:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:54.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:54.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:05:55.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:05:55.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:55.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:55.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:55.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:55.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:05:56.457 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:05:56.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:05:56.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:05:56.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:05:56.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:05:56.936 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:05:57.413 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:05:57.890 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:05:58.368 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:05:58.855 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:05:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:05:59.811 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:06:00.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:06:00.767 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:06:01.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:06:01.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:06:01.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:01.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:01.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:01.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:01.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:01.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:01.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:01.122 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:06.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:06.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:06.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:06.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:06.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:06.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:06.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:06.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:06.142 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:06.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:06.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:06.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:06.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:06.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:06.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:06.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:06.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:06.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:06.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:06.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:06.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:06.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:06.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:06.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:06.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:06.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:06.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:06.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:06.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:06.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:06.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:06.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:06.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:06.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:06.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:06.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:06.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:06.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:06.162 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:06.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:06.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:06.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:06.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:06.648 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:06.690 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:06.692 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:06.693 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:06.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:06:06.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:06:06.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:06:06.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:06.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:06:06.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:06:06.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:06:06.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:06:07.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:06:07.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:07.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:07.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:07.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:07.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:06:08.080 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:06:08.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:08.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:08.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:08.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:08.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:06:09.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:06:09.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:09.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:09.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:09.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:09.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:06:09.755 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:06:09.755 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2025-12-12 05:06:09.755 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:09.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:09.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:09.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:06:10.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:10.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:10.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:10.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:10.468 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:06:10.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:06:10.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:06:10.794 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:06:10.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:10.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:10.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:10.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:10.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:10.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:10.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:10.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:10.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:10.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:10.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:10.809 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:10.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.809 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.810 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:10.810 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:15.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:15.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:15.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:15.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:15.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:15.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:15.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:15.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:15.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:15.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:15.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:15.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:15.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:15.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:15.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:15.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:15.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:15.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:15.838 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:15.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:15.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:15.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:15.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:15.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:15.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:15.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:15.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:15.845 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:15.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:15.845 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:15.845 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:15.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:15.845 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:15.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:15.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:15.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:15.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:15.851 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:15.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:15.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:16.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:16.376 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:16.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:16.378 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:16.379 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:16.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:16.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:16.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:16.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:16.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:16.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:16.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:16.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:16.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:16.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:16.772 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:16.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:16.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:16.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:16.772 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:21.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:21.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:21.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:21.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:21.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:21.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:21.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:21.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:21.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:21.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:21.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:21.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:21.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:21.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:21.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:21.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:21.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:21.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:21.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:21.796 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:21.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:21.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:21.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:21.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:21.797 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:21.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:21.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:21.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:21.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:21.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:21.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:21.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:21.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:21.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:21.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:21.807 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:21.807 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:21.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:21.812 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:22.290 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:22.336 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:22.339 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:22.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:22.342 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:22.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:06:22.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:22.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:22.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:22.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:23.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:06:23.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:06:23.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:23.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:23.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:23.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:24.203 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:06:24.683 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:06:24.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:24.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:24.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:24.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:25.161 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:06:25.640 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:06:25.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:25.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:25.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:25.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:26.118 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:06:26.596 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:06:26.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:26.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:26.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:26.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:27.072 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:06:27.550 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:06:28.029 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:06:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:06:28.985 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:06:29.464 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:06:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:06:30.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:30.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:30.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:30.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:30.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:30.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:30.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:30.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:30.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:30.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:30.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:30.377 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.377 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.378 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:30.378 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:35.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:35.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:35.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:35.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:35.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:35.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:35.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:35.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:35.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:35.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:35.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:35.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:35.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:35.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:35.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:35.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:35.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:35.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:35.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:35.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:35.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:35.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:35.395 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:35.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:35.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:35.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:35.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:35.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:35.917 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:35.919 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:35.921 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:36.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:06:36.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:36.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:06:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:06:37.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:37.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:37.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:37.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:06:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:06:38.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:38.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:38.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:38.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:38.753 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:06:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:06:39.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:39.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:39.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:39.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:39.710 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:06:40.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:06:40.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:40.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:40.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:40.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:40.667 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:06:41.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:06:41.623 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:06:42.102 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:06:42.581 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:06:43.059 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:06:43.538 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:06:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:43.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:43.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:43.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:43.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:43.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:43.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:43.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:43.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:43.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:43.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:43.945 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:48.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:48.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:48.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:48.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:48.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:48.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:48.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:48.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:48.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:48.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:48.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:48.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:48.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:48.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:48.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:48.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:48.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:48.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:48.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:48.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:48.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:48.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:48.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:48.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:48.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:48.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:48.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:48.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:48.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:48.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:48.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:48.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:48.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:48.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:48.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:48.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:48.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:48.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:48.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:48.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:48.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:48.995 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:48.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:48.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:48.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:48.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:48.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:49.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:49.523 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:49.525 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:49.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:49.527 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:49.961 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:06:49.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:49.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:49.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:49.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:50.440 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:06:50.919 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:06:50.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:51.397 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:06:51.875 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:06:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:52.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:52.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:06:52.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:52.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:52.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:52.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:52.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:52.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:52.579 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:52.579 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=764 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:06:57.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:57.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:57.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:57.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:57.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:57.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:57.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:57.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:57.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:57.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:06:57.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:06:57.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:06:57.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:06:57.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:57.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:57.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:57.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:06:57.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:06:57.607 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:06:57.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:06:57.611 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:06:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:57.611 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:57.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:57.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:06:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:06:57.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:57.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:06:57.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:06:57.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:06:57.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:06:57.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:06:57.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:06:57.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:06:57.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:06:57.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:06:57.621 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:06:57.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:06:57.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:06:58.105 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:06:58.146 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:06:58.148 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:06:58.150 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:06:58.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:58.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:06:58.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:06:58.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:06:58.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:58.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:06:58.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:06:58.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:06:58.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:06:58.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:58.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:06:58.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:06:58.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:58.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:58.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:06:58.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:06:58.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:06:58.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:06:58.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:06:58.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:06:58.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:06:58.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:06:58.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:06:58.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:06:58.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:06:58.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:06:58.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:06:58.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:06:58.598 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:06:58.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:03.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:03.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:03.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:03.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:03.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:03.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:03.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:03.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:03.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:03.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:03.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:03.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:03.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:03.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:03.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:03.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:03.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:03.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:03.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:03.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:03.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:03.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:03.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:03.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:03.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:03.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:03.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:03.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:03.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:03.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:03.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:03.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:03.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:03.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:03.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:03.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:03.634 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:03.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:03.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:04.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:04.159 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:04.161 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:04.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:04.162 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:04.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:04.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:04.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:04.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:04.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:04.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:04.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:04.185 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:04.185 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:04.185 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:04.185 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:04.185 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:09.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:09.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:09.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:09.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:09.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:09.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:09.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:09.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:09.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:09.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:09.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:09.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:09.203 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:09.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:09.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:09.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:09.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:09.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:09.204 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:09.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:09.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:09.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:09.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:09.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:09.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:09.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:09.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:09.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:09.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:09.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:09.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:09.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:09.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:09.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:09.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:09.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:09.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:09.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:09.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:09.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:09.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:09.215 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:09.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:09.220 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:09.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:09.734 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:09.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:09.737 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:09.738 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:10.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:10.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:10.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:10.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:10.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:10.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:11.139 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:11.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:11.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:11.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:11.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:11.618 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:11.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:11.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:11.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:11.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:11.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:11.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:11.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:11.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:11.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:11.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:11.765 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:11.766 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=543 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:16.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:16.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:16.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:16.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:16.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:16.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:16.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:16.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:16.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:16.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:16.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:16.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:16.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:16.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:16.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:16.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:16.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:16.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:16.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:16.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:16.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:16.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:16.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:16.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:16.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:16.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:16.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:16.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:16.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:16.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:16.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:16.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:16.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:16.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:16.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:16.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:16.796 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:16.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:16.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:16.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:17.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:17.327 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:17.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:17.330 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:17.332 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:17.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:17.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:17.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:17.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:17.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:17.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:17.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:17.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:17.760 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:17.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:17.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:17.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:17.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:18.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:18.716 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:18.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:18.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:18.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:18.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:19.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:07:19.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:19.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:19.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:19.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:20.149 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:07:20.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:20.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:20.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:20.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:20.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:20.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:20.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:20.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:20.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:20.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:20.181 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:25.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:25.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:25.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:25.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:25.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:25.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:25.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:25.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:25.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:25.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:25.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:25.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:25.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:25.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:25.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:25.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:25.203 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:25.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:25.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:25.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:25.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:25.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:25.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:25.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:25.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:25.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:25.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:25.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:25.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:25.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:25.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:25.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:25.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:25.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:25.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:25.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:25.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:25.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:25.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:25.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:25.217 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:25.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:25.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:25.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:25.705 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:25.740 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:25.742 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:25.744 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:25.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:25.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:25.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:25.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:25.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:25.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:25.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:25.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:25.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:26.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:26.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:26.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:26.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:26.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:26.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:27.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:27.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:27.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:27.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:27.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:27.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:27.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:27.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:27.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:27.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:27.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:27.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:27.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:27.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:27.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:27.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:27.877 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:27.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:27.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:32.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:32.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:32.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:32.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:32.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:32.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:32.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:32.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:32.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:32.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:32.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:32.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:32.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:32.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:32.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:32.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:32.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:32.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:32.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:32.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:32.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:32.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:32.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:32.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:32.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:32.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:32.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:32.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:32.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:32.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:32.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:32.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:32.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:32.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:32.918 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:32.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:32.919 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:32.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:32.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:33.442 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:33.444 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:33.445 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:33.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:33.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:33.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:33.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:33.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:33.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:33.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:33.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:33.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:33.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:33.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:33.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:34.361 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:34.839 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:34.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:34.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:34.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:34.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:35.795 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:07:35.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:35.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:35.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:35.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:07:36.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:36.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:36.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:36.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:36.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:36.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:36.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:36.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:36.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:36.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:36.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:36.292 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:36.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:36.293 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:41.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:41.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:41.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:41.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:41.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:41.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:41.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:41.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:41.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:41.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:41.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:41.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:41.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:41.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:41.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:41.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:41.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:41.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:41.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:41.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:41.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:41.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:41.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:41.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:41.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:41.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:41.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:41.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:41.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:41.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:41.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:41.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:41.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:41.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:41.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:41.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:41.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:41.339 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:41.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:41.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:41.343 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:41.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:41.864 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:41.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:41.865 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:41.866 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:41.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:41.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:41.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:41.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:41.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:41.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:41.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:41.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:42.305 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:42.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:42.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:42.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:42.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:42.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:43.261 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:43.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:43.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:43.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:43.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:43.739 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:43.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:43.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:43.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:43.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:43.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:43.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:43.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:43.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:43.999 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:44.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:44.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:44.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:44.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:44.000 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:49.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:49.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:49.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:49.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:49.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:49.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:49.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:49.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:49.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:49.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:49.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:49.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:49.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:49.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:49.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:49.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:49.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:49.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:49.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:49.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:49.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:49.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:49.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:49.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:49.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:49.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:49.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:49.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:49.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:49.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:49.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:49.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:49.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:49.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:49.028 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:49.031 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:49.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:49.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:49.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:49.032 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:49.032 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:49.032 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:49.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:49.037 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:49.516 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:49.552 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:49.554 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:49.555 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:49.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:49.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:49.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:49.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:49.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:49.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:49.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:49.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:49.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:49.994 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:50.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:50.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:50.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:50.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:50.472 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:07:50.951 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:07:51.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:51.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:51.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:51.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:51.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:07:51.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:07:52.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:52.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:52.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:52.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:52.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:07:52.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:07:53.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:53.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:53.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:53.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:53.340 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:07:53.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:53.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:53.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:53.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:53.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:53.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:53.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:53.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:53.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:53.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:53.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:53.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:53.364 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:53.364 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:07:58.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:07:58.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:07:58.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:58.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:58.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:58.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:58.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:07:58.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:58.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:58.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:07:58.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:07:58.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:07:58.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:07:58.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:58.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:58.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:07:58.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:07:58.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:07:58.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:07:58.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:07:58.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:07:58.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:58.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:58.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:07:58.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:07:58.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:07:58.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:58.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:07:58.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:07:58.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:07:58.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:07:58.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:07:58.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:07:58.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:07:58.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:07:58.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:07:58.404 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:07:58.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:07:58.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:07:58.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:07:58.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:07:58.931 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:07:58.933 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:07:58.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:07:58.935 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:07:58.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:07:58.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:07:58.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:07:58.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:07:58.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:07:58.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:07:58.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:07:58.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:07:59.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:07:59.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:07:59.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:07:59.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:07:59.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:07:59.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:08:00.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:08:00.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:00.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:00.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:00.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:00.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:08:01.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:08:01.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:01.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:01.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:01.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:01.760 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:08:02.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:08:02.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:08:02.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:02.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:02.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:02.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:02.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:02.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:02.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:02.031 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:07.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:07.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:07.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:07.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:07.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:07.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:07.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:07.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:07.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:07.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:07.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:07.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:07.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:07.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:07.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:07.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:07.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:07.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:07.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:07.055 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:07.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:07.055 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:07.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:07.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:07.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:07.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:07.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:07.058 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:07.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:07.058 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:07.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:07.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:07.063 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:07.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:07.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:07.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:07.584 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:07.586 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:07.588 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:07.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:08.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:08:08.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:08.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:08.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:08.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:08.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:08:08.983 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:08:09.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:09.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:09.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:09.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:09.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:08:09.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:09.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:09.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:09.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:09.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:09.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:09.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:09.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:09.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:09.604 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:09.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:14.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:14.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:14.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:14.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:14.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:14.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:14.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:14.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:14.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:14.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:14.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:14.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:14.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:14.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:14.639 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:14.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:14.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:14.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:14.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:14.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:14.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:14.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:14.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:14.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:14.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:14.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:14.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:14.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:14.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:14.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:14.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:14.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:14.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:14.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:14.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:14.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:14.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:14.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:14.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:14.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:14.651 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:14.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:14.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:15.133 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:15.179 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:15.181 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:15.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:15.183 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:15.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:08:15.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:08:15.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:08:15.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:15.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:15.609 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:08:15.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:15.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:15.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:15.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:16.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:08:16.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:08:16.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:16.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:16.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:16.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:17.046 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:08:17.524 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:08:17.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:17.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:17.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:17.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:18.003 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:08:18.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:18.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:18.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:18.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:18.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:18.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:18.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:18.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:18.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:18.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:18.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:18.259 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.259 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:18.260 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:23.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:23.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:23.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:23.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:23.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:23.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:23.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:23.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:23.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:23.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:23.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:23.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:23.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:23.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:23.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:23.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:23.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:23.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:23.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:23.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:23.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:23.290 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:23.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:23.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:23.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:23.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:23.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:23.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:23.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:23.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:23.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:23.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:23.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:23.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:23.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:23.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:23.297 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:23.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:23.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:23.819 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:23.822 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:23.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:23.824 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:23.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:08:23.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:08:23.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:08:23.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:23.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:23.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:23.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:23.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:23.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:23.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:23.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:23.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:23.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:23.886 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:23.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:23.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:23.886 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:28.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:28.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:28.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:28.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:28.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:28.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:28.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:28.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:28.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:28.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:28.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:28.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:28.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:28.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:28.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:28.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:28.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:28.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:28.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:28.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:28.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:28.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:28.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:28.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:28.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:28.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:28.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:28.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:28.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:28.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:28.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:28.922 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:28.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:28.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:29.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:29.446 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:29.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:29.449 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:29.451 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:29.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:08:29.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:08:29.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:08:29.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:29.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:29.884 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:08:29.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:29.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:29.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:29.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:30.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:08:30.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:08:30.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:30.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:30.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:30.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:31.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:08:31.796 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:08:31.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:31.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:31.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:31.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:32.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:08:32.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:32.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:32.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:32.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:32.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:32.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:32.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:32.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:32.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:32.524 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (TRX2@172.18.142.20:5700/2) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.525 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:32.526 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:37.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:37.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:37.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:37.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:37.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:37.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:37.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:37.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:37.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:37.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:37.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:37.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:37.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:37.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:37.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:37.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:37.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:37.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:37.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:37.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:37.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:37.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:37.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:37.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:37.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:37.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:37.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:37.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:37.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:37.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:37.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:37.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:37.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:37.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:37.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:37.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:37.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:37.558 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:37.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:37.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:37.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:38.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:38.081 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:38.084 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:38.086 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:38.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:08:38.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:08:38.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:08:38.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:38.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:38.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:38.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:38.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:38.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:38.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:38.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:38.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:38.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:38.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:38.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:38.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:38.155 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:43.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:43.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:43.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:43.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:43.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:43.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:43.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:43.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:43.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:43.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:43.170 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:43.174 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:43.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:43.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:43.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:43.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:43.175 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:43.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:43.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:43.180 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:43.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:43.180 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:43.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:43.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:43.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:43.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:43.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:43.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:43.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:43.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:43.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:43.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:43.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:43.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:43.192 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:43.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:43.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:43.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:43.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:43.707 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:43.707 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:43.708 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:43.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:43.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:43.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:43.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:43.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:43.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:43.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:43.714 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:43.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:43.714 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=110 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:48.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:48.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:48.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:48.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:48.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:48.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:48.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:48.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:48.730 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:48.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:48.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:48.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:48.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:48.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:48.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:48.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:48.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:48.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:48.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:48.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:48.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:48.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:48.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:48.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:48.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:48.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:48.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:48.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:48.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:48.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:48.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:48.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:48.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:48.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:48.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:48.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:48.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:48.755 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:48.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:48.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:49.289 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:49.291 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:49.293 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:49.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:49.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:49.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:49.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:49.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:49.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:49.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:49.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:49.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:49.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:49.315 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.315 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:49.316 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:08:54.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:54.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:54.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:54.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:54.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:54.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:54.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:54.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:54.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:54.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:54.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:54.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:54.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:54.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:54.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:54.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:54.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:54.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:54.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:54.352 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:54.352 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:54.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:54.353 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:54.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:54.353 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:54.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:54.353 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:54.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:54.356 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:54.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:54.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:54.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:54.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:54.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:54.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:54.362 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:54.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:54.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:54.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:54.362 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.363 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:54.363 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:54.363 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:54.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:54.368 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:08:54.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:08:54.887 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:08:54.888 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:08:54.890 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:08:54.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:08:54.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:08:54.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:08:54.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:08:54.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:08:54.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:54.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:54.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:54.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:54.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:54.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:54.909 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:08:59.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:08:59.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:08:59.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:59.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:59.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:59.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:59.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:08:59.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:59.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:59.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:08:59.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:08:59.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:08:59.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:08:59.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:59.930 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:59.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:08:59.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:08:59.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:08:59.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:08:59.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:08:59.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:08:59.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:59.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:59.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:08:59.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:08:59.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:08:59.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:08:59.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:08:59.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:08:59.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:59.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:08:59.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:08:59.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:08:59.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:08:59.937 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:08:59.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:08:59.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:08:59.942 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:08:59.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:08:59.947 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:00.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:00.465 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:00.467 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:00.469 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:00.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:00.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:00.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:00.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:00.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:00.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:00.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:00.482 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:05.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:05.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:05.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:05.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:05.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:05.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:05.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:05.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:05.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:05.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:05.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:05.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:05.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:05.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:05.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:05.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:05.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:05.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:05.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:05.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:05.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:05.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:05.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:05.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:05.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:05.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:05.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:05.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:05.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:05.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:05.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:05.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:05.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:05.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:05.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:05.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:05.512 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:05.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:05.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:05.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:05.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:06.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:06.031 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:06.032 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:06.033 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:06.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:06.479 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:09:06.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:06.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:06.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:06.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:06.957 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:09:07.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:09:07.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:07.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:07.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:07.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:09:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:09:08.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:08.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:08.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:08.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:08.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:09:09.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:09.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:09.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:09.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:09:09.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:09:09.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:09:09.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:09:09.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:09:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:09:09.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:09.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:09.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:09.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:09.822 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:09:10.300 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:09:10.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:10.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:10.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:10.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:10.778 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:09:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:09:11.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:11.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:11.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:11.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:11.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:11.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:11.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:11.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:11.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:11.390 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:11.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:11.390 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:16.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:16.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:16.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:16.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:16.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:16.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:16.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:16.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:16.406 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:16.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:16.406 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:16.409 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:16.409 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:16.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:16.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:16.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:16.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:16.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:16.410 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:16.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:16.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:16.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:16.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:16.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:16.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:16.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:16.413 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:16.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:16.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:16.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:16.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:16.419 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:16.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:16.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:16.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:16.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:16.938 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:16.939 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:16.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:16.941 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:16.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:16.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:16.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:16.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:16.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:16.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:16.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:16.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:16.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:16.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:16.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:16.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:16.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:16.998 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:22.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:22.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:22.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:22.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:22.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:22.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:22.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:22.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:22.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:22.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:22.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:22.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:22.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:22.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:22.019 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:22.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:22.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:22.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:22.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:22.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:22.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:22.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:22.026 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:22.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:22.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:22.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:22.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:22.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:22.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:22.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:22.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:22.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:22.033 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:22.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:22.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:22.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:22.520 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:22.559 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:22.560 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:22.562 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:22.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:22.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:22.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:22.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:22.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:22.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:22.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:22.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:22.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:22.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:22.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:22.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:22.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:22.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:22.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:22.621 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:27.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:27.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:27.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:27.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:27.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:27.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:27.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:27.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:27.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:27.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:27.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:27.657 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:27.657 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:27.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:27.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:27.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:27.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:27.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:27.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:27.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:27.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:27.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:27.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:27.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:27.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:27.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:27.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:27.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:27.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:27.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:27.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:27.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:27.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:27.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:27.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:27.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:27.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:27.669 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:27.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:27.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:28.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:28.191 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:28.194 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:28.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:28.196 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:28.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:28.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:28.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:28.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:28.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:28.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:28.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:28.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:28.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:28.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:28.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:28.251 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:28.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:28.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:33.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:33.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:33.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:33.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:33.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:33.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:33.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:33.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:33.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:33.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:33.270 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:33.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:33.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:33.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:33.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:33.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:33.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:33.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:33.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:33.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:33.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:33.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:33.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:33.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:33.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:33.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:33.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:33.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:33.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:33.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:33.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:33.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:33.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:33.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:33.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:33.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:33.301 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:33.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:33.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:33.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:33.827 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:33.829 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:33.831 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:33.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:33.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:33.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:33.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:33.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:33.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:33.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:33.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:33.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:33.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:33.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:33.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:33.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:33.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:33.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:33.916 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:38.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:38.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:38.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:38.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:38.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:38.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:38.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:38.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:38.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:38.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:38.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:38.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:38.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:38.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:38.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:38.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:38.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:38.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:38.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:38.948 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:38.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:38.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:38.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:38.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:38.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:38.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:38.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:38.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:38.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:38.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:38.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:38.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:38.959 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:38.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:38.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:39.445 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:39.483 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:39.485 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:39.486 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:39.489 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 05:09:39.489 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 200
2025-12-12 05:09:39.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 05:09:39.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:09:40.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:40.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:40.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:40.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:40.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:40.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:09:40.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:09:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:41.131 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 05:09:41.131 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 0
2025-12-12 05:09:41.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 05:09:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:41.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:41.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:41.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:41.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:41.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:41.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:41.142 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:46.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:46.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:46.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:46.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:46.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:46.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:46.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:46.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:46.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:46.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:46.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:46.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:46.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:46.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:46.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:46.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:46.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:46.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:46.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:46.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:46.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:46.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:46.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:46.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:46.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:46.167 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:46.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:46.167 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:46.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:46.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:46.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:46.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:46.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:46.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:46.172 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:46.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:46.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:46.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:46.690 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:46.690 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:46.691 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:46.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:46.692 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 05:09:46.692 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 200
2025-12-12 05:09:46.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 05:09:46.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:47.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:09:47.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:47.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:47.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:47.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:47.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:47.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:09:47.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:47.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:09:48.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.331 [DEBUG] fake_trx.py:377 (BTS@172.18.142.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-12-12 05:09:48.331 [INFO] fake_trx.py:380 (BTS@172.18.142.20:5700) Artificial TRXC delay set to 0
2025-12-12 05:09:48.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-12-12 05:09:48.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:48.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:48.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:48.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:48.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:48.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:48.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:48.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:48.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:48.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:48.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:48.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:48.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:48.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:48.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:48.339 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:48.339 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:09:53.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:53.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:53.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:53.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:53.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:53.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:53.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:53.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:53.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:53.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:53.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:53.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:53.362 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:53.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:53.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:53.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:53.363 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:53.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:53.363 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:53.365 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:53.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:53.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:53.366 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:53.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:53.366 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:53.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:53.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:53.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:53.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.373 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:53.373 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:53.373 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:53.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:53.378 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:53.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:53.894 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:53.895 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:53.895 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:53.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:53.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:53.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:53.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:53.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:53.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:53.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:53.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:53.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:53.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:53.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:53.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:53.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:53.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:53.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:53.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:53.953 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:09:58.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:58.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:58.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:58.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:58.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:58.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:58.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:58.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:58.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:58.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:09:58.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:09:58.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:09:58.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:09:58.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:58.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:58.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:58.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:09:58.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:09:58.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:09:58.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:09:58.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:09:58.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:58.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:58.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:58.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:09:58.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:09:58.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:09:58.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:09:58.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:09:58.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:58.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:09:58.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:58.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:09:58.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:09:58.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:09:58.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:09:58.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:09:58.994 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:09:58.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:09:58.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:09:59.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:09:59.526 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:09:59.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:59.530 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:09:59.532 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:09:59.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:09:59.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:09:59.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:09:59.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:59.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:09:59.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:09:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:09:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:09:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:09:59.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:09:59.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:09:59.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:09:59.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:09:59.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:09:59.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:09:59.597 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:10:04.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:10:04.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:10:04.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:04.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:04.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:04.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:04.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:04.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:10:04.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:04.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:10:04.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:10:04.614 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:10:04.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:10:04.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:10:04.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:04.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:04.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:10:04.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:10:04.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:10:04.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:10:04.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:10:04.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:10:04.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:04.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:04.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:10:04.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:10:04.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:10:04.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:10:04.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:10:04.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:10:04.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:04.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:04.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:10:04.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:10:04.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:10:04.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:10:04.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:10:04.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:10:04.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:10:04.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:10:04.627 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:10:04.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:10:04.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:04.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:04.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:10:05.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:10:05.145 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:10:05.146 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:10:05.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:05.148 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:10:05.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:05.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:05.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:05.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:05.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:05.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:05.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:05.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:05.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:05.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:05.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:05.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:05.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:05.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:05.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:05.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:05.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:05.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:05.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:05.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:05.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:05.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:05.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:05.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:05.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:10:05.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:05.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:05.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:05.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:06.069 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:10:06.546 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:10:06.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:06.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:06.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:06.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:07.024 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:10:07.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:10:07.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:07.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:07.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:07.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:07.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:10:08.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:08.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:08.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:08.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:08.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:08.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:08.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:08.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:08.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:08.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:08.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:08.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:08.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:08.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:08.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:08.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:08.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:10:08.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:08.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:08.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:08.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:08.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:08.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:08.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:08.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:08.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:08.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:08.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:08.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:08.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:08.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:08.935 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:10:09.432 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:10:09.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:09.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:09.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:09.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:09.911 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:10:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:10:10.867 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:10:11.345 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:10:11.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:11.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:11.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:11.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:11.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:11.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:11.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:11.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:11.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:11.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:11.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:11.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:11.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:11.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:11.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:11.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:11.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:11.822 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:10:12.300 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:10:12.778 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:10:13.256 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:10:13.734 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:10:14.213 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:10:14.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:14.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:14.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:14.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:14.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:14.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:14.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:14.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:14.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:14.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:14.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:14.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:14.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:14.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:14.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:14.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:14.691 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:10:14.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:14.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:14.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:14.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:14.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:14.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:14.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:14.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:14.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:14.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:15.168 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:10:15.647 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:10:15.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:15.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:15.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:15.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:15.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:15.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:15.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:15.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:15.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:15.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:15.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:15.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:15.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:15.937 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:15.937 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:15.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:15.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:16.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:16.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:16.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:16.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:16.033 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:16.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:16.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:16.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:16.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:16.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:16.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:16.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:16.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:16.068 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:16.068 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:16.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:16.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:10:16.603 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:10:17.081 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:10:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:10:18.040 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:10:18.519 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:10:18.998 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:10:19.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:19.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:19.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:19.077 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:19.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:19.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:19.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:19.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:19.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:19.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:19.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:19.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:19.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:19.146 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:19.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:19.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:19.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:19.209 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:19.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:19.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:19.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:19.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:19.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:19.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:19.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:19.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:19.289 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:19.289 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:19.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:19.474 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:10:19.953 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:10:20.431 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:10:20.908 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:10:21.387 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:10:21.866 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:10:22.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:22.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:22.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:22.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:22.299 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:22.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:22.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:22.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:22.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:22.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:22.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:22.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:22.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:22.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:22.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:22.339 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:22.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:22.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:22.345 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:10:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:10:23.303 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:10:23.781 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:10:24.260 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:10:24.739 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:10:25.218 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:10:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:25.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:25.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:25.348 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:25.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:25.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:25.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:25.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:25.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:25.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:25.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:25.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:25.410 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:25.410 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:25.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:25.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:25.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:25.510 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:25.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:25.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:25.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:25.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:25.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:25.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:25.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:25.545 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:25.545 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:25.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:10:26.173 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:10:26.652 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:10:26.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:26.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:26.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:26.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:26.836 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:26.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:26.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:26.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:26.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:26.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:26.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:26.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:26.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:26.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:26.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:26.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:26.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:26.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:27.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:27.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:27.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:27.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:10:27.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:27.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:27.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:27.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:27.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:27.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:27.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:27.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:27.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:27.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:27.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:27.607 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:10:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:10:28.563 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:10:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:10:29.520 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:10:29.998 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:10:30.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:30.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:30.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:30.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:30.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:30.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:30.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:30.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:30.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:30.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:30.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:30.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:30.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:30.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:30.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:30.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:30.476 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:10:30.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:30.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:30.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:30.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:30.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:30.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:30.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:30.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:30.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:30.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:30.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:30.953 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:10:31.431 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:10:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:10:32.388 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:10:32.866 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:10:33.344 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:10:33.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:33.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:33.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:33.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:33.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:33.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:33.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:33.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:33.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:33.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:33.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:33.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:33.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:33.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:33.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:33.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:33.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:33.822 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:10:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:10:34.777 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:10:35.255 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:10:35.733 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:10:36.210 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:10:36.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:36.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:36.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:36.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:36.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:36.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:36.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:36.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:36.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:36.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:36.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:36.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:36.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:36.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:36.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:36.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:10:36.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:36.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:36.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:36.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:36.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:36.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:36.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:36.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:36.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:36.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:36.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:36.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.165 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:10:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:10:37.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:37.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:37.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:37.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:37.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:37.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:37.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:37.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:37.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:37.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:37.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:37.745 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:37.745 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:37.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:37.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:37.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:37.805 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:37.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:37.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:37.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:37.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:37.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:37.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:37.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:37.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:37.883 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:37.883 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:37.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:37.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:10:38.599 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:10:39.078 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:10:39.556 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:10:40.035 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:10:40.513 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:10:40.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:40.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:40.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:40.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:40.893 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:40.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:40.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:40.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:40.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:40.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:40.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:40.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:40.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:40.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:40.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:40.939 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:40.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:40.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:40.991 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:10:41.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:41.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:41.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:41.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:41.385 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:41.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:41.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:41.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:41.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:41.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:41.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:41.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:41.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:41.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:41.409 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:41.409 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:41.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:41.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:41.468 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:10:41.947 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:10:42.426 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:10:42.904 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:10:43.382 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:10:43.860 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:10:44.338 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:10:44.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:44.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:44.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:44.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:44.419 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:44.419 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=8485 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:10:44.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:44.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:44.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:44.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:44.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:44.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:44.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:44.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:44.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:44.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:44.486 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:44.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:44.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:44.815 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:10:45.293 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 05:10:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 05:10:46.251 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 05:10:46.729 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 05:10:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 05:10:47.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:47.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:47.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:47.495 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:47.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:47.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:47.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:47.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:47.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:47.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:47.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:47.542 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:47.542 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:47.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:47.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:47.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:47.605 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:47.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:47.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:47.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:47.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:47.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:47.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:47.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:47.626 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:47.626 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:47.685 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 05:10:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 05:10:48.641 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 05:10:49.120 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 05:10:49.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:49.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:49.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:49.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:49.582 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:49.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:49.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:49.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:49.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:49.598 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 05:10:49.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:49.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:49.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:49.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:49.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:10:49.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:10:49.602 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:10:54.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:10:54.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:10:54.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:54.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:54.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:54.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:54.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:54.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:10:54.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:54.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:10:54.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:10:54.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:10:54.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:10:54.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:10:54.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:10:54.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:10:54.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:10:54.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:54.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:54.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:10:54.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:10:54.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:10:54.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:10:54.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:10:54.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:10:54.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:10:54.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:10:54.634 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:10:54.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:10:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:10:55.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:10:55.162 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:10:55.164 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:10:55.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.167 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:10:55.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:55.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:55.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:55.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:55.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:55.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:55.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.365 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:55.365 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:10:55.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.445 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:55.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:55.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:55.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:10:55.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:55.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:55.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:55.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:10:55.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:10:55.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:10:55.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:10:55.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:10:55.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.842 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:10:55.842 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:10:55.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:10:55.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:10:55.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:10:55.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:10:55.922 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:10:55.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:10:55.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:10:55.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:10:55.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:10:55.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:10:55.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:10:55.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:10:55.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:10:55.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:10:55.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:10:55.938 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:10:55.938 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:00.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:00.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:00.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:00.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:00.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:00.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:00.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:00.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:00.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:11:00.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:11:00.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:11:00.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:00.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:00.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:00.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:11:00.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:00.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:11:00.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:11:00.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:11:00.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:00.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:00.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:00.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:11:00.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:00.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:11:00.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:11:00.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:11:00.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:00.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:00.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:00.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:11:00.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:00.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:11:00.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:11:00.972 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:11:00.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:11:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:11:01.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:11:01.498 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:11:01.500 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:11:01.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:01.501 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:11:01.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:01.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:01.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:01.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:01.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:01.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:01.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:01.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:01.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:01.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.938 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:11:01.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:01.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:01.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:01.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:01.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:01.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:01.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:01.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:01.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:01.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:01.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:01.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:01.986 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:01.986 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:11:01.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:01.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:11:02.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:02.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:02.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:02.677 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:02.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:02.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:02.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:02.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:02.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:02.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:02.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:02.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:02.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:02.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:02.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:02.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:02.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:02.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:02.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:02.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:02.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:02.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:02.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:02.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:02.884 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:02.884 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:11:02.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:02.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:11:02.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:02.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:02.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:02.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:03.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:03.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:03.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:03.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:03.289 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:03.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:03.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:03.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:03.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:03.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:03.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:03.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:03.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:03.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:03.301 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:11:03.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:08.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:08.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:08.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:08.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:08.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:08.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:08.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:08.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:08.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:08.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:08.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:08.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:11:08.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:08.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:11:08.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:11:08.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:11:08.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:08.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:08.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:08.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:11:08.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:08.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:08.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:11:08.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:08.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:11:08.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:11:08.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:11:08.332 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:11:08.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:11:08.818 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:11:08.846 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:11:08.846 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:11:08.847 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:11:08.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:08.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:08.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:08.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:08.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:08.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:08.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:08.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:08.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:08.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:08.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:08.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:08.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:08.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:09.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:09.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:09.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:09.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:09.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:09.107 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:11:09.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:11:09.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:09.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:09.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:09.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.403 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:09.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:09.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:09.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:09.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:09.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:09.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:09.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.773 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:11:09.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:09.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:09.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:09.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:09.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:09.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:09.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:09.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:09.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:09.829 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:11:09.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:09.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:10.251 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:11:10.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:10.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:10.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:10.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:10.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:10.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:10.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:10.646 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:10.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:10.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:10.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:10.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:10.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:10.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:10.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:10.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:10.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:10.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:10.663 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:11:10.663 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.663 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:10.664 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:15.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:15.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:15.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:15.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:15.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:15.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:15.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:15.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:15.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:15.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:15.676 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:11:15.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:11:15.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:11:15.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:15.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:15.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:15.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:11:15.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:15.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:11:15.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:11:15.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:11:15.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:15.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:15.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:15.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:11:15.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:15.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:15.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:11:15.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:15.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:11:15.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:11:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:11:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:11:15.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:11:15.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:11:15.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:11:15.696 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:11:15.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:15.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:11:16.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:11:16.226 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:11:16.228 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:11:16.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.230 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:11:16.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:16.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:16.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:16.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:16.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:16.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:16.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:16.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:16.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:16.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:16.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:16.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:16.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:16.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:16.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:16.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:16.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:16.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:16.522 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:11:16.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:11:16.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:16.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:16.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:16.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:16.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:16.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:16.811 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:16.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:16.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:16.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:16.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:16.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:16.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:16.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:16.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:16.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:16.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:16.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:17.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:17.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:17.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:17.139 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:11:17.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:17.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:17.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:17.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:17.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:17.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:17.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:17.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:17.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:17.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:17.194 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:11:17.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:17.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:11:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:17.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:17.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:17.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:18.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:18.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:18.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:18.010 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:18.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:18.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:18.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:18.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:18.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:18.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:18.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:18.023 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:11:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:18.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:23.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:23.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:23.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:23.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:23.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:23.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:23.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:23.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:23.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:23.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:23.039 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:11:23.041 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:11:23.041 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:11:23.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:23.042 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:23.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:23.042 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:11:23.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:23.042 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:23.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:11:23.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:23.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:11:23.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:11:23.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:11:23.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:23.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:23.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:23.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:11:23.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:23.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:11:23.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:11:23.050 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:11:23.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:23.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:11:23.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:11:23.575 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:11:23.577 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:11:23.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:23.579 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:11:23.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:23.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:23.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:23.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:23.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:23.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:23.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:23.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:23.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:23.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:23.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:23.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:23.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:24.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:11:24.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:24.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:24.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:24.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:24.492 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:11:24.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:11:25.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:25.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:25.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:25.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:25.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:11:25.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:25.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:25.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:25.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:25.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:25.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:25.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:25.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:25.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:25.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:25.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:25.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:25.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:25.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:25.547 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:11:25.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:25.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:25.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:11:26.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:26.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:26.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:26.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:26.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:11:26.882 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:11:27.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:27.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:27.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:27.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:27.361 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:11:27.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:27.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:27.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:27.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:27.696 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:27.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:27.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:27.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:27.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:27.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:27.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:27.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:27.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:27.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:27.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:27.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:27.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:27.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:11:28.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:28.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:28.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:28.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:28.317 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:11:28.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:11:29.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:11:29.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:29.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:29.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:29.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:29.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:29.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:29.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:29.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:29.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:29.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:29.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:29.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:29.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:29.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:29.375 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:11:29.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:29.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:29.751 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:11:30.229 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:11:30.708 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:11:31.186 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:11:31.665 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:11:32.143 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:11:32.622 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:11:33.100 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:11:33.579 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:11:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:11:34.544 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:11:35.022 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:11:35.500 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:11:35.979 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:11:36.458 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:11:36.937 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:11:37.415 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:11:37.894 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:11:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:11:38.850 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:11:39.329 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:11:39.808 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:11:40.286 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:11:40.764 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:11:41.243 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:11:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:11:42.200 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:11:42.679 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:11:43.158 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:11:43.636 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:11:44.115 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:11:44.592 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:11:45.070 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:11:45.549 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:11:46.027 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:11:46.506 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:11:46.984 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:11:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:11:47.941 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:11:48.420 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:11:48.898 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:11:49.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:49.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:49.340 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:49.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:49.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:49.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:49.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:49.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:49.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:49.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:49.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:49.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:49.344 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:11:49.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:49.344 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.344 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.344 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.344 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.344 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.345 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.345 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:49.345 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:11:54.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:11:54.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:11:54.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:54.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:54.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:54.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:54.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:11:54.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:54.360 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:54.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:11:54.360 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:11:54.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:11:54.364 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:11:54.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:54.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:54.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:11:54.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:11:54.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:11:54.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:11:54.367 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:11:54.367 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:11:54.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:54.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:54.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:11:54.368 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:11:54.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:11:54.368 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:11:54.370 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:11:54.370 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:11:54.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:54.370 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:11:54.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:11:54.370 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:11:54.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:11:54.371 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:11:54.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:11:54.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:11:54.377 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:11:54.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:11:54.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:11:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:11:54.897 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:11:54.898 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:11:54.899 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:11:54.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:54.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:54.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:54.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:54.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:54.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:54.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:54.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:54.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:54.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:54.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:54.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:54.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:54.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:55.343 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:11:55.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:55.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:55.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:55.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:55.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:11:56.299 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:11:56.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:56.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:56.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:56.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:56.777 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:11:56.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:56.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:56.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:56.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:56.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:56.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:56.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:56.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:56.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:56.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:56.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:56.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:56.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:56.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:11:56.875 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:11:56.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:56.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:11:57.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:57.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:57.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:57.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:57.733 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:11:58.210 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:11:58.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:58.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:58.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:58.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:58.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:11:59.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:59.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:59.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:59.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:59.022 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:11:59.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:11:59.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:11:59.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:11:59.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:59.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:59.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:59.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:11:59.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:11:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:11:59.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:11:59.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:11:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:11:59.167 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:11:59.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:11:59.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:11:59.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:11:59.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:11:59.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:12:00.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:12:00.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:12:00.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:00.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:00.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:00.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:00.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:00.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:00.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:00.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:00.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:00.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:00.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:00.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:00.702 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:00.702 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:12:00.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:00.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:01.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:12:01.557 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:12:02.036 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:12:02.514 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:12:02.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:12:03.471 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:12:03.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:12:04.429 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:12:04.908 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:12:05.386 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:12:05.865 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:12:06.343 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:12:06.822 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:12:07.301 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:12:07.779 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:12:08.258 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:12:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:12:09.215 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:12:09.694 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:12:10.172 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:12:10.650 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:12:11.128 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:12:11.606 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:12:12.085 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:12:12.563 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:12:13.041 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:12:13.520 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:12:13.998 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:12:14.477 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:12:14.955 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:12:15.434 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:12:15.909 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:12:16.386 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:12:16.865 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:12:17.343 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:12:17.821 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:12:18.300 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:12:18.779 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:12:19.257 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:12:19.735 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:12:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:12:20.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:20.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:20.687 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:20.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:20.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:20.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:20.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:20.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:12:20.692 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:12:20.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:12:20.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:12:20.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:12:20.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:12:20.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:12:20.694 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:12:25.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:12:25.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:12:25.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:12:25.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:12:25.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:12:25.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:12:25.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:12:25.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:12:25.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:12:25.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:12:25.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:12:25.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:12:25.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:12:25.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:12:25.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:12:25.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:12:25.725 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:12:25.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:12:25.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:12:25.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:12:25.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:12:25.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:12:25.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:12:25.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:12:25.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:12:25.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:12:25.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:12:25.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:12:25.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:12:25.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:12:25.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:12:25.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:12:25.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:12:25.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:12:25.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:12:25.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:12:25.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:12:25.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:12:25.740 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:12:25.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:12:25.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:12:26.227 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:12:26.262 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:12:26.264 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:12:26.265 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:12:26.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:26.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:26.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:26.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:26.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:26.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:26.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:26.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:26.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:26.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:26.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:26.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:26.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:26.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:26.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:26.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:26.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:26.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:26.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:26.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:26.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:26.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:26.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:26.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:26.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:12:26.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:26.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:26.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:26.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:12:27.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:12:27.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:27.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:27.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:27.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:28.137 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:12:28.615 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:12:28.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:28.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:28.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:28.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:28.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:28.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:28.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:28.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:28.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:28.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:28.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:28.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:28.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:28.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:28.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:28.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:28.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:28.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:28.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:28.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:28.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:28.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:28.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:28.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:28.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:28.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:28.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:28.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:28.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:28.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:28.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:28.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:29.092 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:12:29.571 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:12:29.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:29.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:29.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:29.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:30.049 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:12:30.526 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:12:30.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:12:30.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:12:30.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:12:30.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:12:31.005 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:12:31.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:31.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:31.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:31.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:31.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:31.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:31.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:31.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:31.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:31.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:31.149 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:31.150 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:12:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:31.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:31.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:31.421 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:31.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:31.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:31.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:31.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:31.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:31.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:31.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:31.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:31.482 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:12:31.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:31.484 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:12:31.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:31.961 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:12:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:12:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:12:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:12:33.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:33.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:33.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:33.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:33.780 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:33.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:33.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:33.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:33.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:33.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:33.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:33.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:33.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:33.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:33.819 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:33.819 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:12:33.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:33.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:33.874 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:12:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:34.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:34.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:34.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:34.105 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:34.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:34.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:34.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:34.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:34.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:34.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:34.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:34.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:34.167 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:34.167 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:12:34.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:34.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:34.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:12:34.830 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:12:35.308 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:12:35.787 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:12:36.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:36.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:36.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:36.216 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:36.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:36.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:36.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:36.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:36.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:36.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:36.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:36.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:36.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:36.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:36.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.265 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:12:36.743 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:12:36.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:36.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:36.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:36.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:36.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:36.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:36.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:36.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:36.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:36.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:36.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:36.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:36.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:36.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:36.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:37.220 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:12:37.698 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:12:38.175 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:12:38.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:38.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:38.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:38.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:38.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:38.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:38.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:38.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:38.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:38.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:38.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:38.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:38.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:38.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:38.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:38.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:38.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:38.652 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:12:39.130 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:12:39.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:39.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:39.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:39.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:39.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:39.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:39.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:39.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:39.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:39.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:39.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:39.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:39.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:39.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:39.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:39.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:39.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:39.607 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:12:40.085 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:12:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:12:41.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:41.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:41.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:41.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:41.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:41.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:41.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:41.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:41.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:41.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:41.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:41.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:41.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:41.033 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:12:41.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:41.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:41.041 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:12:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:12:41.998 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:12:42.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:42.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:42.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:42.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:42.322 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:12:42.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:12:42.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:12:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:12:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:42.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:12:42.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:12:42.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:12:42.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:12:42.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:12:42.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:12:42.378 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:12:42.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:42.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:12:42.476 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:12:42.955 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:12:43.433 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:12:43.912 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:12:44.389 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:12:44.867 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:12:45.346 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:12:45.825 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:12:46.303 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:12:46.782 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:12:47.261 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:12:47.739 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:12:48.218 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:12:48.696 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:12:49.175 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:12:49.654 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:12:50.133 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:12:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:12:51.090 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:12:51.569 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:12:52.048 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:12:52.527 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:12:53.006 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:12:53.484 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:12:53.962 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:12:54.440 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:12:54.919 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:12:55.397 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:12:55.875 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:12:56.354 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:12:56.832 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:12:57.311 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:12:57.789 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:12:58.268 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:12:58.747 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:12:59.225 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:12:59.703 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:13:00.182 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:13:00.660 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:13:01.139 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:13:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:13:02.095 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:13:02.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:02.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:02.335 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:02.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:02.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:02.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:02.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:02.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:02.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:02.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:02.339 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:07.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:07.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:07.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:07.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:07.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:07.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:07.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:07.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:07.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:07.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:07.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:07.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:07.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:07.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:07.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:07.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:07.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:07.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:07.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:07.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:07.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:07.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:07.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:07.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:07.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:07.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:07.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:07.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:07.375 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:07.375 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:07.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:07.380 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:07.863 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:07.901 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:07.903 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:07.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:07.905 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:07.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:07.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:07.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:07.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:07.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:07.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:07.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:07.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:07.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:07.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:07.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:07.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:07.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:08.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:08.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.247 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:08.247 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:08.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:08.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.344 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:08.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:08.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:08.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:08.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:08.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:08.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.392 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:08.393 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:08.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.462 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:08.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:08.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:08.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.817 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:08.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:08.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:08.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:08.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:08.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:08.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:08.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:08.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:08.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:09.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:09.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:09.061 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:09.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:09.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:09.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:09.140 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:09.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:09.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:09.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:09.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:09.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:09.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:09.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:09.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:09.202 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:09.202 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:09.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:09.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:09.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:09.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:09.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:09.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:09.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:09.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:09.383 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:09.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:09.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:09.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:09.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:09.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:09.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:09.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:09.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:09.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:09.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:09.401 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:09.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=432 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=432 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.401 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:09.402 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=433 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:14.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:14.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:14.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:14.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:14.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:14.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:14.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:14.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:14.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:14.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:14.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:14.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:14.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:14.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:14.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:14.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:14.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:14.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:14.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:14.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:14.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:14.426 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:14.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:14.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:14.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:14.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:14.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:14.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:14.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:14.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:14.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:14.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:14.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:14.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:14.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:14.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:14.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:14.437 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:14.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:14.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:14.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:14.962 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:14.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:14.964 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:14.966 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:14.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:14.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:14.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:14.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:14.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:14.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:14.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:14.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:15.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:15.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:15.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:15.405 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:15.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:15.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:15.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:15.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:15.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:15.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:15.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:15.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:15.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:15.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:15.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:15.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:15.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:15.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:15.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:15.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:15.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:15.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:15.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:15.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:15.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:16.361 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:16.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:16.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:16.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:16.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:16.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:16.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:16.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:16.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:16.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:16.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:16.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:16.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:16.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:16.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:16.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:16.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:16.462 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:16.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:16.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:16.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:13:17.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.122 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:17.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:17.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:17.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:17.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:17.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.175 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:17.175 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:17.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:13:17.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:17.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:17.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:17.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:17.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.607 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:17.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:17.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:17.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:17.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:17.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:17.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:17.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:17.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:17.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:17.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:17.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:17.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:17.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:17.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:17.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:17.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:17.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:17.791 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:13:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:18.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:18.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:18.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:18.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:18.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:18.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:18.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:18.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:18.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:18.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:18.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:18.260 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:18.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:13:18.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:18.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:18.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:18.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:18.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:18.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:18.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:18.666 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:18.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:18.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:18.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:18.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:18.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:18.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:18.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:18.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:18.744 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:18.744 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:18.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:18.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:13:19.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:19.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:19.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:19.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:19.142 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:19.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:19.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:19.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:19.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:19.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:19.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:19.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:19.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:19.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:19.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:19.154 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:19.154 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:19.154 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:19.154 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:19.154 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:24.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:24.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:24.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:24.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:24.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:24.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:24.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:24.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:24.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:24.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:24.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:24.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:24.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:24.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:24.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:24.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:24.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:24.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:24.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:24.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:24.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:24.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:24.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:24.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:24.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:24.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:24.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:24.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:24.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:24.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:24.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:24.192 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:24.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:24.197 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:24.713 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:24.714 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:24.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:24.715 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:24.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:24.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:24.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:24.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:24.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:24.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:24.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:24.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:24.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:24.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:24.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:24.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:24.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:24.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:24.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:24.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:24.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:24.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:24.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:24.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:24.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:24.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:24.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:24.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:24.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:24.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:24.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:24.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:24.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:25.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:25.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:25.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.007 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:25.007 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:25.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.104 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:25.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:25.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:25.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:25.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:25.160 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:25.160 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:25.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:25.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:25.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.230 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:25.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:25.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:25.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:25.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:25.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:25.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:25.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.635 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:25.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:25.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:25.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:25.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:25.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:25.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:25.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:25.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:25.689 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:25.689 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:25.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:25.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.113 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:26.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:26.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:26.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:26.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:26.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:26.274 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:26.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:26.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:26.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:26.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:26.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:26.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:26.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:26.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:26.358 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:26.358 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:26.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:26.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:26.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:26.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:26.508 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:26.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:26.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:26.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:26.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:26.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:26.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:26.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:26.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:26.523 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:26.524 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:31.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:31.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:31.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:31.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:31.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:31.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:31.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:31.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:31.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:31.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:31.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:31.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:31.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:31.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:31.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:31.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:31.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:31.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:31.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:31.564 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:31.564 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:31.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:31.564 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:31.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:31.565 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:31.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:31.565 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:31.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:31.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:31.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:31.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:31.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:31.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:31.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:31.574 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:31.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:31.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:32.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:32.103 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:32.105 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:32.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:32.108 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:32.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:32.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:32.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:32.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:32.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:32.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:32.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:32.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:32.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:32.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:32.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:32.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:32.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:32.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:32.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:32.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:32.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:32.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:33.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:33.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:33.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:33.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:33.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:33.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:33.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:33.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:33.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:33.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:33.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:33.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:33.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:33.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:33.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:33.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:33.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:33.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:33.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:33.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:33.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:33.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:33.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:33.976 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:13:34.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:34.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:34.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:34.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:34.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:34.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:34.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:34.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:34.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:34.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:34.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:34.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:34.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:34.080 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:34.080 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:34.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:34.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:34.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:13:34.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:34.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:34.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:34.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:13:35.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:35.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:35.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:35.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:35.237 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:35.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:35.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:35.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:35.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:35.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:35.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:35.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:35.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:35.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:35.259 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:35.259 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:35.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:35.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:35.412 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:13:35.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:35.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:35.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:35.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:35.891 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:13:36.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:36.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:36.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:36.213 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:36.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:36.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:36.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:36.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:36.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:36.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:36.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:36.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:36.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:36.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:36.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.369 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:13:36.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:36.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:36.847 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:13:36.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:36.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:36.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:36.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:36.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:36.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:36.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:36.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:36.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:36.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:36.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:36.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:36.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:13:37.803 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:13:37.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:37.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:37.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:37.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:37.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:37.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:37.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:37.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:37.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:37.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:37.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:37.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:37.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:37.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:37.904 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:37.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:37.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:38.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:13:38.759 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:13:39.257 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:13:39.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:39.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:39.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:39.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:39.718 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:39.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:39.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:39.735 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:13:39.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:39.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:39.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:39.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:39.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:39.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:39.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:39.791 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:39.791 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:39.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:39.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:40.213 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:13:40.691 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:13:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:13:41.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:41.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:41.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:41.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:41.630 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:41.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:41.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:41.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:41.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:41.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:41.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:41.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:41.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:41.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:41.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:41.647 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:41.648 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:46.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:46.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:46.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:46.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:46.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:46.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:46.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:46.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:46.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:46.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:46.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:46.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:46.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:46.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:46.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:46.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:46.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:46.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:46.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:46.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:46.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:46.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:46.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:46.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:46.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:46.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:46.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:46.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:46.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:46.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:46.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:46.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:46.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:46.669 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:46.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:46.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:47.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:47.187 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:47.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.190 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:47.192 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:47.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:47.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:47.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:47.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:47.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:47.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:47.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.452 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:47.452 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:47.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.624 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:47.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:47.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:47.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:47.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:47.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:47.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:47.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:47.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:47.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:47.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:47.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:47.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:47.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:47.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:47.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:47.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:47.919 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:47.919 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:47.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:47.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:48.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:48.588 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:48.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:48.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:48.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:48.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:48.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:48.749 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:48.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:48.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:48.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:48.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:48.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:48.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:48.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:48.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:48.759 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:13:48.759 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:48.759 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:48.759 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:48.759 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:13:53.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:53.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:53.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:53.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:53.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:53.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:53.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:53.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:53.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:53.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:13:53.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:53.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:13:53.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:13:53.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:13:53.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:13:53.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:13:53.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:53.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:53.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:53.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:13:53.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:13:53.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:53.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:13:53.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:13:53.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:13:53.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:13:53.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:13:53.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:13:53.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:13:53.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:13:53.790 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:13:53.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:13:53.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:13:53.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:13:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:13:54.317 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:13:54.319 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:13:54.321 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:13:54.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:54.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:54.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:54.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:54.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:54.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:54.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.513 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:54.513 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:13:54.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.664 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:54.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:54.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:54.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:54.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:13:54.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:54.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:54.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:54.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:54.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:54.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:54.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:13:54.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:54.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:13:54.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:13:54.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:13:54.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:13:55.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:55.041 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:13:55.041 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:13:55.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:55.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:55.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:13:55.712 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:13:55.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:13:55.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:13:55.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:13:55.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:13:55.871 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:13:55.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:13:55.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:13:55.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:13:55.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:13:55.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:13:55.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:13:55.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:13:55.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:13:55.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:13:55.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:13:55.883 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:00.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:00.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:00.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:00.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:00.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:00.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:00.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:00.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:00.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:00.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:00.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:00.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:00.912 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:00.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:00.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:00.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:00.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:00.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:00.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:00.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:00.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:00.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:00.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:00.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:00.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:00.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:00.916 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:00.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:00.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:00.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:00.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:00.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:00.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:00.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:00.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:00.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:00.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:00.921 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:00.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:01.410 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:01.439 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:01.440 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:01.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.441 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:01.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:01.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:01.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:01.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:01.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:01.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:01.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:01.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:01.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:01.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:01.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:01.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:01.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:01.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:01.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:01.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:01.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:01.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:01.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.645 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:01.645 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:01.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:01.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:01.797 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:01.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:01.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:01.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:01.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:01.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:01.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:01.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:01.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:01.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:01.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:01.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:01.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:01.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:01.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:01.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:01.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:02.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:02.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:02.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:02.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:02.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:02.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:02.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:02.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:02.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:02.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:02.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:02.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:02.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:02.174 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:02.175 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:02.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:02.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:02.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:02.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:02.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:02.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:02.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:02.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:03.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:03.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:03.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:03.002 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:03.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:03.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:03.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:03.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:03.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:03.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:03.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:03.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:03.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:03.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:03.015 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:03.015 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:08.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:08.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:08.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:08.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:08.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:08.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:08.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:08.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:08.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:08.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:08.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:08.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:08.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:08.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:08.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:08.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:08.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:08.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:08.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:08.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:08.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:08.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:08.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:08.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:08.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:08.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:08.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:08.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:08.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:08.040 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:08.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:08.045 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:08.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:08.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:08.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:08.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:08.571 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:08.573 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:08.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.575 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:08.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:08.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:08.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:08.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:08.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:08.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:08.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:08.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:08.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:08.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:08.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:08.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:08.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:08.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:08.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:08.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:08.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:08.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:08.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.765 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:08.765 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:08.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:08.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:08.916 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:08.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:08.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:08.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:08.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:08.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:08.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:08.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:08.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:08.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:08.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:08.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:08.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:09.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:09.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:09.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:09.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:09.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:09.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:09.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:09.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:09.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:09.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:09.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:09.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:09.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:09.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:09.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:09.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:09.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:09.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:09.282 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:09.282 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:09.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:09.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:09.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:09.962 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:10.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:10.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:10.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:10.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:10.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:10.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:10.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:10.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:10.122 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:10.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:10.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:10.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:10.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:10.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:10.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:10.131 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:10.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:15.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:15.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:15.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:15.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:15.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:15.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:15.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:15.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:15.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:15.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:15.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:15.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:15.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:15.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:15.156 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:15.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:15.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:15.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:15.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:15.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:15.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:15.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:15.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:15.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:15.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:15.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:15.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:15.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:15.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:15.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:15.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:15.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:15.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:15.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:15.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:15.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:15.175 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:15.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:15.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:15.700 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:15.703 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:15.705 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:15.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:15.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:15.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:15.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:15.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:15.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:15.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:15.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:15.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:15.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:15.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:15.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:15.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:16.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:16.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:16.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:16.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:16.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:16.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:16.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:16.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:16.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:16.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:16.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:16.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:16.141 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:16.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:16.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:16.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:16.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:16.612 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:16.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:16.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:16.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:16.627 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:16.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:16.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:16.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:16.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:16.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:16.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:16.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:16.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:16.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:16.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:16.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:16.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:17.090 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:17.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:17.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:17.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:17.569 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:14:17.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:17.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:17.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:17.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:17.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:17.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:17.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:17.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:17.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:17.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:17.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:17.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:17.751 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:17.751 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:17.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:17.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:14:18.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:18.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:18.524 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:14:19.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:14:19.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:19.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:19.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:19.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:19.482 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:14:19.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:19.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:19.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:19.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:19.805 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:19.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:19.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:19.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:19.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:19.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:19.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:19.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:19.819 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:19.819 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:24.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:24.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:24.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:24.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:24.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:24.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:24.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:24.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:24.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:24.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:24.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:24.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:24.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:24.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:24.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:24.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:24.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:24.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:24.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:24.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:24.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:24.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:24.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:24.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:24.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:24.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:24.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:24.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:24.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:24.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:24.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:24.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:24.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:24.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:24.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:24.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:24.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:24.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:24.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:24.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:24.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:24.854 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:24.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:24.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:24.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:24.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:25.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:25.378 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:25.379 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:25.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:25.381 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:25.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:25.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:25.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:25.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:25.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:25.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:25.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:25.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:25.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:25.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:25.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:25.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:25.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:25.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:25.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:25.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:25.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:25.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:25.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:25.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:25.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:25.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:25.824 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:25.824 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:25.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:25.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:25.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:25.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:25.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:26.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:26.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:26.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:26.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:26.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:26.318 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:26.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:26.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:26.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:26.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:26.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:26.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:26.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:26.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:26.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:26.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:26.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:26.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:26.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:26.778 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:26.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:26.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:26.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:27.256 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:14:27.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:27.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:27.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:27.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:27.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:27.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:27.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:27.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:27.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:27.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:27.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:27.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:27.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:27.496 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:27.496 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:27.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:27.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:27.734 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:14:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:27.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:27.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:28.212 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:14:28.691 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:14:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:28.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:29.170 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:14:29.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:29.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:29.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:29.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:29.493 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:29.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:29.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:29.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:29.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:29.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:29.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:29.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:29.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:29.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:29.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:29.498 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.498 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:29.499 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:34.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:34.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:34.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:34.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:34.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:34.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:34.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:34.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:34.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:34.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:34.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:34.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:34.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:34.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:34.522 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:34.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:34.522 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:34.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:34.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:34.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:34.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:34.527 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:34.528 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:34.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:35.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:35.047 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:35.048 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:35.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:35.050 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:35.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:35.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:35.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:35.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:35.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:35.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:35.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:35.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:35.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:35.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:35.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:35.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:35.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:35.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:35.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:35.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:35.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:35.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:35.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:35.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:35.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:35.492 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:35.492 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:35.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:35.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:35.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:35.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:35.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:35.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:35.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:35.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:35.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:35.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:35.990 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:36.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:36.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:36.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:36.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:36.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:36.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:36.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:36.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:36.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:36.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:36.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:36.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:36.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:36.449 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:36.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:36.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:36.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:36.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:36.927 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:14:37.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:37.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:37.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:37.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:37.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:37.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:37.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:37.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:37.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:37.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:37.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:37.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:37.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:37.113 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:37.113 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:37.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:37.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:37.405 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:14:37.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:37.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:37.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:37.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:37.883 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:14:38.362 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:14:38.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:38.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:38.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:38.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:38.840 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:14:39.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:39.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:39.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:39.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:39.163 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:39.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:39.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:39.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:39.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:39.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:39.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:39.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:39.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:39.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:39.175 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:39.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:44.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:44.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:44.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:44.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:44.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:44.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:44.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:44.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:44.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:44.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:44.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:44.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:44.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:44.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:44.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:44.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:44.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:44.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:44.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:44.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:44.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:44.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:44.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:44.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:44.202 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:44.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:44.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:44.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:44.720 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:44.721 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:44.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:44.723 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:44.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:44.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:44.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:44.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:44.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:44.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:44.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:44.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:44.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:44.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:44.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:44.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:45.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:45.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:45.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:45.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:45.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:45.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:45.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:45.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:45.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:45.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:14:45.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:45.170 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:14:45.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:45.645 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:14:45.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:45.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:45.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:45.664 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:45.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:45.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:45.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:45.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:45.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:45.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:45.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:45.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:45.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:45.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:45.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:45.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:46.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:14:46.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:46.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:46.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:46.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:46.601 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:14:46.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:46.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:46.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:46.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:46.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:46.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:46.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:46.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:46.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:14:46.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:14:46.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:14:46.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:14:46.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:46.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:14:46.841 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:14:46.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:46.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:47.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:14:47.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:47.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:47.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:47.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:47.556 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:14:48.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:14:48.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:48.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:48.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:48.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:48.514 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:14:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:48.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:14:48.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:48.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:48.836 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:14:48.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:48.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:48.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:48.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:48.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:48.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:48.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:48.842 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:48.842 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:53.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:53.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:53.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:53.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:53.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:53.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:53.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:53.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:53.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:53.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:53.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:53.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:53.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:53.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:53.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:53.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:53.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:53.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:53.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:53.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:53.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:53.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:53.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:53.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:53.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:53.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:53.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:53.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:53.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:53.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:53.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:53.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:53.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:53.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:53.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:53.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:53.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:53.884 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:53.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:53.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:53.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:14:54.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:14:54.409 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:14:54.410 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:14:54.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:14:54.411 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:14:54.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:14:54.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:14:54.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:14:54.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:14:54.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:14:54.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:14:54.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:14:54.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:54.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:54.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:54.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:54.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:54.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:54.460 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:54.461 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:14:59.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:14:59.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:14:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:59.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:59.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:59.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:59.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:14:59.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:59.480 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:59.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:14:59.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:14:59.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:14:59.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:14:59.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:59.489 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:59.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:14:59.490 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:14:59.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:14:59.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:14:59.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:14:59.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:14:59.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:59.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:59.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:14:59.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:14:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:14:59.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:14:59.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:14:59.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:14:59.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:59.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:14:59.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:14:59.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:14:59.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:14:59.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:14:59.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:14:59.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:14:59.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:14:59.514 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:14:59.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:14:59.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:15:00.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:15:00.035 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:15:00.035 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:15:00.036 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:15:00.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:00.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:00.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:00.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:00.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:00.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:00.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:00.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:00.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:00.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:00.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:00.128 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:15:00.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:00.128 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:05.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:05.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:05.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:05.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:05.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:05.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:05.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:05.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:05.147 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:05.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:05.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:15:05.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:15:05.153 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:15:05.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:05.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:05.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:05.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:15:05.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:05.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:15:05.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:15:05.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:15:05.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:05.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:05.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:05.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:15:05.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:05.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:15:05.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:15:05.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:15:05.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:05.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:05.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:15:05.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:05.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:15:05.169 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:15:05.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:15:05.170 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:15:05.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:05.174 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:15:05.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:15:05.691 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:15:05.692 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:15:05.692 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:15:05.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:05.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:05.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:05.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:05.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:05.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:05.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:05.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:05.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:05.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:05.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:05.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:05.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:05.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:05.746 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:15:10.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:10.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:10.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:10.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:10.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:10.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:10.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:10.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:10.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:10.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:15:10.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:15:10.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:15:10.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:10.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:10.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:10.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:15:10.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:10.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:15:10.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:15:10.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:15:10.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:10.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:10.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:10.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:15:10.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:10.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:15:10.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:15:10.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:15:10.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:10.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:10.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:10.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:15:10.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:10.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:15:10.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:15:10.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:15:10.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:15:10.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:15:10.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:15:10.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:15:10.792 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:15:10.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:10.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:10.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:10.795 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:15:10.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:15.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:15.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:15.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:15.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:15.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:15.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:15.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:15.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:15.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:15.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:15:15.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:15:15.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:15:15.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:15.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:15.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:15.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:15:15.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:15.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:15:15.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:15:15.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:15:15.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:15.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:15.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:15.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:15:15.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:15.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:15.833 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:15:15.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:15.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:15:15.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:15:15.839 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:15:15.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:15.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:15:16.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:15:16.363 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:15:16.365 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:15:16.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:16.366 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:15:16.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:16.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:16.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:16.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:16.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:16.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:16.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:16.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:16.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:16.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:16.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:16.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:16.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:16.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:15:16.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:16.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:16.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:16.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:17.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:15:17.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:17.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:17.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:17.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:17.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:17.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:17.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:17.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:17.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:17.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:17.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:17.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:17.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:17.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:17.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:17.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:17.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:17.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:15:17.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:17.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:17.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:17.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:18.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:15:18.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:18.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:18.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:18.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:18.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:18.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:18.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:18.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:18.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:18.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:18.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:18.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:18.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:18.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:18.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:18.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:18.716 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:15:18.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:18.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:18.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:18.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:19.194 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:15:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:19.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:19.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:19.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:19.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:19.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:19.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:19.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:19.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:19.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:19.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:19.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:19.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:19.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:19.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:15:19.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:19.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:19.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:19.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:20.149 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:15:20.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:20.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:20.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:20.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:20.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:20.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:20.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:20.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:20.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:20.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:20.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:20.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:20.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:20.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:15:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:20.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:20.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:20.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:20.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:20.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:20.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:20.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:20.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:20.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:20.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:20.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:20.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:20.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:21.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:21.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:21.010 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:15:21.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:15:21.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:21.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:21.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:21.556 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:21.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:21.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:21.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:21.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:21.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:21.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:21.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:21.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:21.574 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:21.574 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2025-12-12 05:15:21.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:15:22.061 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:15:22.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:22.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:22.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:22.134 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:22.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:22.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:22.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:22.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:22.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:22.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:22.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:22.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:22.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:22.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:22.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:22.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:15:22.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:22.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:22.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:22.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:22.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:22.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:22.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:22.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:22.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:22.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:22.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:22.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:22.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:22.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:22.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:23.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:15:23.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:23.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:23.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:23.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:23.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:23.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:23.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:23.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:23.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:23.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:23.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:23.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:23.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:23.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:23.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:23.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:23.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:23.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:15:23.972 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:15:24.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:24.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:24.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:24.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:24.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:24.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:24.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:24.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:24.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:24.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:24.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:24.119 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:24.119 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:15:24.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.450 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:15:24.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:24.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:24.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:24.722 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:24.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:24.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:24.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:24.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:24.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:24.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:24.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:24.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:24.787 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:24.787 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:15:24.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:24.928 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:15:25.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:25.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:25.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:25.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:25.375 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:25.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:25.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:25.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:25.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:25.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:25.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:25.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:25.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:25.406 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:15:25.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:25.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:25.462 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:25.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:25.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:25.885 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:15:26.364 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:15:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:26.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:26.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:26.369 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:26.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:26.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:26.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:26.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:26.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:26.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:26.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:26.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:26.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:26.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:26.415 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:26.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:26.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:26.841 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:15:27.320 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:15:27.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:27.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:27.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:27.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:27.351 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:27.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:27.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:27.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:27.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:27.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:27.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:27.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:27.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:27.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:27.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:27.364 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:15:28.275 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:15:28.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:28.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:28.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:28.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:28.326 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:28.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:28.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:28.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:28.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:28.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:28.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:28.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:28.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:28.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:28.375 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:28.375 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:28.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:28.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:28.753 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:15:29.232 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:15:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:29.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:29.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:29.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:29.301 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:29.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:29.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:29.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:29.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:29.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:29.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:29.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:29.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:29.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:29.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:29.324 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:29.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:29.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:29.708 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:15:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:15:30.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:30.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:30.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:30.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:30.274 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:30.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:30.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:30.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:30.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:30.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:30.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:30.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:30.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:30.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:30.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:30.329 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:30.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:30.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:30.664 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:15:31.143 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:15:31.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:31.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:31.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:31.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:31.248 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:31.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:31.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:31.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:31.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:31.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:31.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:31.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:31.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:31.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:31.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:31.287 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:31.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:31.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:31.620 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:15:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:15:32.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:32.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:32.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:32.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:32.223 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:32.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:32.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:32.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:32.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:32.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:32.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:32.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:32.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:32.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:32.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:15:32.291 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:15:32.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:32.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:15:33.054 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:15:33.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:33.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:33.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:33.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:33.195 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:15:33.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:33.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:33.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:33.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:33.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:33.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:33.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:33.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:33.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:33.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:33.208 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:15:38.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:38.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:38.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:38.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:38.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:38.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:38.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:38.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:38.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:38.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:38.226 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:15:38.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:15:38.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:15:38.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:38.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:38.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:38.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:15:38.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:38.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:15:38.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:15:38.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:15:38.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:38.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:38.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:38.237 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:15:38.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:38.237 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:38.241 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:15:38.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:38.241 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:15:38.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:15:38.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:15:38.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:15:38.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:15:38.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:15:38.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:15:38.248 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:15:38.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:38.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:15:38.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:15:38.775 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:15:38.778 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:15:38.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:38.780 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:15:38.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:38.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:38.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:38.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:38.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:38.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:38.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:38.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:38.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:38.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:38.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:38.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:38.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:39.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:39.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:39.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.212 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:15:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:39.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:39.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:39.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:39.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:15:39.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:15:39.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:15:39.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:15:39.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:15:39.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:15:39.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:15:39.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:15:39.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:15:39.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:15:39.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:15:39.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:15:39.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:15:39.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:15:39.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:39.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:39.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:39.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:39.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:39.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:39.877 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:15:39.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:39.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:39.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:39.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:39.877 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:15:44.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:15:44.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:15:44.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:44.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:44.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:44.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:44.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:15:44.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:44.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:44.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:15:44.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:44.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:15:44.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:15:44.896 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:15:44.899 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:15:44.899 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:15:44.899 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:44.899 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:44.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:15:44.900 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:15:44.900 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:15:44.900 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:44.902 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:15:44.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:15:44.902 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:15:44.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:15:44.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:15:44.906 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:15:44.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:15:44.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:15:45.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:15:45.873 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:15:46.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:15:46.829 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:15:47.308 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:15:47.786 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:15:48.265 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:15:48.744 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:15:49.222 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:15:49.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:15:50.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:15:50.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:15:51.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:15:51.617 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:15:52.095 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:15:52.574 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:15:53.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:15:53.531 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:15:54.009 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:15:54.488 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:15:54.966 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:15:55.445 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:15:55.924 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:15:56.403 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:15:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:15:57.360 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:15:57.838 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:15:58.317 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:15:58.796 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:15:59.275 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:15:59.754 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:16:00.231 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:16:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:16:01.189 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:16:01.667 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:16:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:16:02.624 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:16:03.103 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:16:03.581 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:16:04.060 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:16:04.539 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:16:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:16:05.497 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:16:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:16:06.454 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:16:06.933 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:16:07.412 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:16:07.889 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:16:08.368 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:16:08.845 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:16:08.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:16:08.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:16:08.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:16:08.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:16:08.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:16:08.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:16:08.939 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:16:08.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.939 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:08.940 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=5122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:16:13.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:16:13.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:16:13.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:16:13.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:16:13.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:16:13.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:16:13.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:16:13.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:16:13.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:16:13.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:16:13.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:16:13.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:16:13.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:16:13.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:16:13.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:16:13.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:16:13.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:16:13.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:16:13.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:16:13.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:16:13.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:16:13.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:16:13.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:16:13.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:16:13.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:16:13.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:16:13.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:16:13.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:16:13.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:16:13.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:16:13.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:16:13.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:16:13.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:16:13.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:16:13.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:16:13.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:16:13.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:16:13.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:16:13.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:16:13.976 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:16:13.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:16:13.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:16:13.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:16:13.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:16:14.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:16:14.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:16:15.419 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:16:15.898 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:16:16.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:16:16.855 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:16:17.334 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:16:17.812 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:16:18.291 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:16:18.769 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:16:19.247 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:16:19.726 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:16:20.204 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:16:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:16:21.161 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:16:21.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:16:22.118 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:16:22.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:16:23.076 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:16:23.554 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:16:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:16:24.511 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:16:24.991 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:16:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:16:25.948 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:16:26.425 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:16:26.903 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:16:27.381 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:16:27.860 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:16:28.336 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:16:28.813 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:16:29.292 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:16:29.770 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:16:30.249 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:16:30.727 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:16:31.206 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:16:31.685 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:16:32.163 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:16:32.642 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:16:33.120 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:16:33.599 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:16:34.078 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:16:34.557 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:16:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:16:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:16:35.992 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:16:36.471 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:16:36.949 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:16:37.428 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:16:37.907 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:16:38.386 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:16:38.864 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:16:39.342 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:16:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:16:40.299 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:16:40.776 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:16:41.255 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:16:41.733 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:16:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:16:42.691 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:16:43.169 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:16:43.647 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:16:44.126 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:16:44.604 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:16:45.084 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:16:45.564 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:16:46.043 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:16:46.521 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:16:46.999 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:16:47.479 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:16:47.957 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:16:48.436 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:16:48.914 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:16:49.393 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:16:49.872 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:16:50.350 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:16:50.829 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:16:51.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:51.307 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:16:51.786 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:16:52.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:52.265 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:16:52.744 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:16:53.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:53.222 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:16:53.700 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:16:54.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:16:54.658 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 05:16:55.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:55.137 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 05:16:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 05:16:56.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:16:56.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:16:56.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:16:56.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:16:56.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:16:56.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:16:56.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:16:56.017 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:17:01.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:17:01.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:17:01.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:01.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:01.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:01.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:01.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:01.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:01.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:01.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:01.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:17:01.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:17:01.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:17:01.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:01.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:01.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:01.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:17:01.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:01.036 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:17:01.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:17:01.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:17:01.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:01.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:01.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:01.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:17:01.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:01.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:01.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:17:01.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:01.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:17:01.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:17:01.046 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:17:01.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:01.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:17:01.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:17:01.563 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:17:01.564 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:01.566 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:17:01.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:01.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:01.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:01.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:01.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:01.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:01.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:01.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:01.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:01.627 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:01.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:01.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:01.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:01.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:01.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:02.011 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:17:02.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:02.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:02.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:02.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:02.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:17:02.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:17:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:03.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:03.445 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:17:03.923 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:17:04.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:04.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:04.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:04.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:04.401 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:17:04.879 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:17:05.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:05.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:05.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:05.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:05.357 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:17:05.835 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:17:05.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:05.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:05.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:05.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:05.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:05.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:05.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:05.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:05.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:05.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:05.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:05.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:05.976 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:05.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:05.992 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:17:05.992 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:17:05.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:05.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:06.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:06.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:06.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:06.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:06.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:17:06.792 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:17:07.271 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:17:07.749 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:17:08.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:17:08.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:17:09.184 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:17:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:17:10.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:10.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:10.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:10.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:10.057 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:17:10.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:10.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:10.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:10.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:10.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:10.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:10.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:10.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:10.128 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:17:10.129 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:10.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:10.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:10.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:10.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:10.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:10.606 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:17:11.085 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:17:11.562 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:17:12.041 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:17:12.518 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:17:12.997 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:17:13.475 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:17:13.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:13.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:13.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:13.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:13.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:13.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:13.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:13.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:13.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:13.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:13.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:13.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:13.942 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:13.947 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:17:13.947 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:17:13.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:13.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:13.952 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:17:14.431 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:17:14.909 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:17:15.388 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:17:15.866 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:17:16.345 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:17:16.823 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:17:17.301 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:17:17.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:17.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:17.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:17.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:17.698 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:17:17.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:17.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:17.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:17.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:17.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:17:17.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:17:17.710 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:17:17.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:22.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:17:22.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:17:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:22.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:22.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:22.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:22.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:22.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:22.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:17:22.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:17:22.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:17:22.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:22.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:22.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:22.730 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:17:22.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:22.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:17:22.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:17:22.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:17:22.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:22.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:22.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:22.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:17:22.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:22.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:17:22.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:17:22.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:17:22.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:22.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:22.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:22.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:17:22.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:22.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:17:22.744 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:17:22.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:17:22.746 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:17:22.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:22.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:22.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:22.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:17:23.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:17:23.274 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:17:23.276 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:23.278 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:17:23.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:23.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:23.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:23.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:23.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:23.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:23.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:23.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:23.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:23.328 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:23.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:23.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:23.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:23.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:23.711 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:17:23.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:23.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:23.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:23.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:24.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:17:24.206 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:24.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:17:24.693 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:24.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:24.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:24.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:24.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:25.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:17:25.180 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:25.624 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:17:25.668 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:25.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:25.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:25.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:25.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:26.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:17:26.154 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:26.580 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:17:26.642 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:26.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:26.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:26.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:26.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:27.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:17:27.129 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:27.536 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:17:27.617 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:27.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:27.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:27.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:27.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:28.015 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:17:28.104 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:28.493 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:17:28.592 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:17:29.080 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:17:29.568 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:17:30.055 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:30.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:17:30.543 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:30.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:17:31.030 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:31.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:17:31.518 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:31.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:31.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:31.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:31.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:31.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:31.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:31.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:31.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:31.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:31.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:31.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:31.544 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:31.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:31.548 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:17:31.548 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:17:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:31.840 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:17:32.260 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:32.318 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:17:32.731 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:32.797 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:17:33.219 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:33.276 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:17:33.708 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:33.754 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:17:34.196 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:34.234 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:17:34.684 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:34.711 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:17:35.171 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:35.190 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:17:35.659 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:35.669 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:17:36.147 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:36.148 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:17:36.627 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:17:36.643 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:37.106 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:17:37.132 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:37.585 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:17:37.620 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:38.064 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:17:38.108 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:38.542 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:17:38.595 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:39.020 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:17:39.082 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:39.499 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:17:39.571 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:39.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:39.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:39.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:39.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:39.580 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:17:39.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:39.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:39.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:39.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:39.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:39.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:39.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:39.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:39.639 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:39.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:39.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:39.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:39.936 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:39.977 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:17:40.413 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:40.456 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:17:40.891 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:40.933 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:17:41.369 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:41.411 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:17:41.847 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:41.890 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:17:42.325 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:42.368 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:17:42.804 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:42.846 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:17:43.282 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:43.325 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:17:43.760 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:43.802 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:17:44.238 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:44.280 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:17:44.716 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:44.759 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:17:45.194 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:17:45.673 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:17:46.149 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:46.191 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:17:46.627 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:46.670 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:17:47.105 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:47.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:47.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:47.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:47.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:47.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:47.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:47.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:17:47.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:47.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:17:47.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:17:47.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:17:47.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:17:47.139 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:47.147 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:17:47.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:47.151 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:17:47.151 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:17:47.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:47.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:47.538 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:47.625 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:17:48.015 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:48.104 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:17:48.495 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:48.583 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:17:48.973 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:49.061 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:17:49.452 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:49.539 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:17:49.929 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:50.018 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:17:50.408 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:50.497 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:17:50.888 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:50.975 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:17:51.365 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:51.453 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:17:51.844 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:51.932 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:17:52.322 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:52.411 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:17:52.801 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:52.890 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:17:53.279 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:53.368 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:17:53.759 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:53.845 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:17:54.235 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:54.324 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:17:54.715 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:17:54.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:17:54.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:17:54.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:17:54.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:17:54.723 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:17:54.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:17:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:17:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:17:54.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:17:54.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:54.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:54.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:54.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:54.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:17:54.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:17:54.741 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:17:59.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:17:59.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:17:59.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:59.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:59.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:59.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:59.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:17:59.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:59.750 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:59.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:17:59.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:17:59.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:17:59.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:17:59.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:59.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:59.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:17:59.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:17:59.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:17:59.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:17:59.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:17:59.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:17:59.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:59.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:59.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:17:59.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:17:59.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:17:59.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:17:59.762 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:17:59.762 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:17:59.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:59.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:17:59.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:17:59.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:17:59.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:17:59.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:17:59.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:17:59.766 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:17:59.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:17:59.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:17:59.771 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:00.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:00.286 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:00.287 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:00.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:00.289 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:00.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:00.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:00.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:00.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:00.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:00.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:00.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:00.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:00.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:00.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:00.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:00.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:00.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:00.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:00.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:00.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:00.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:01.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:01.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:01.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:01.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:01.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:02.167 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:02.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:02.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:02.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:02.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:02.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:02.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:02.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:02.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:02.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:02.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:02.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:02.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:02.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:02.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:02.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:02.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:02.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:02.645 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:18:02.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:02.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:02.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:02.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:03.124 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:18:03.602 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:18:03.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:03.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:03.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:03.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:04.080 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:18:04.559 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:18:04.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:04.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:04.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:04.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:04.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:04.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:04.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:04.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:04.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:04.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:04.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:04.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:04.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:04.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:04.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:04.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:04.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:04.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:04.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:04.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:04.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:05.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:18:05.516 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:18:05.994 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:18:06.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:18:06.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:06.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:06.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:06.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:06.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:06.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:06.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:06.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:06.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:06.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:06.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:06.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:06.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:06.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:06.793 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:11.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:11.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:11.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:11.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:11.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:11.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:11.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:11.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:11.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:11.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:11.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:11.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:11.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:11.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:11.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:11.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:11.808 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:11.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:11.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:11.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:11.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:11.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:11.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:11.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:11.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:11.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:11.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:11.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:11.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:11.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:11.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:11.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:11.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:11.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:11.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:11.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:11.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:11.820 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:11.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:12.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:12.346 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:12.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:12.348 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:12.350 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:12.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:12.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:12.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:12.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:12.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:12.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:12.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:12.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:12.414 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:18:12.414 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:18:12.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:12.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:12.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:12.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:12.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:12.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:12.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:13.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:13.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:13.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:14.224 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:14.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:14.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:14.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:14.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:14.522 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:18:14.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:14.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:14.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:14.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:14.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:14.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:14.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:14.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:14.553 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:18:14.553 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:18:14.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:14.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:14.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:18:14.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:14.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:15.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:18:15.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:18:15.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:15.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:15.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:15.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:16.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:18:16.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:18:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:16.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:16.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:16.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:16.665 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:18:16.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:16.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:16.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:16.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:16.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:16.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:16.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:16.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:16.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:16.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:16.682 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.683 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:16.684 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1036 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:21.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:21.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:21.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:21.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:21.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:21.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:21.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:21.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:21.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:21.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:21.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:21.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:21.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:21.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:21.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:21.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:21.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:21.697 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:21.699 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:21.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:21.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:21.699 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:21.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:21.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:21.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:21.700 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:21.702 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:21.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:21.702 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:21.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:21.708 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:21.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:21.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:22.197 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:22.230 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:22.231 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:22.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:22.235 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:22.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:22.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:22.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:22.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:22.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:22.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:22.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:22.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:22.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:22.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:22.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:22.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:22.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:22.674 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:22.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:22.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:22.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:22.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:23.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:23.630 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:23.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:23.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:23.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:23.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:24.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:24.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:24.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:24.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:24.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:24.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:24.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:24.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:24.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:24.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:24.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:24.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:24.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:24.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:24.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:24.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:24.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:24.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:24.586 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:18:24.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:24.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:24.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:24.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:25.064 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:18:25.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:18:25.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:25.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:25.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:25.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:18:26.499 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:18:26.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:26.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:26.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:26.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:26.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:26.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:26.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:26.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:26.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:26.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:26.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:26.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:26.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:26.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:26.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:26.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:26.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:26.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:26.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:18:27.455 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:18:27.934 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:18:28.412 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:18:28.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:28.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:28.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:28.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:28.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:28.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:28.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:28.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:28.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:28.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:28.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:28.715 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:33.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:33.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:33.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:33.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:33.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:33.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:33.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:33.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:33.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:33.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:33.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:33.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:33.734 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:33.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:33.734 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:33.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:33.735 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:33.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:33.735 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:33.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:33.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:33.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:33.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:33.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:33.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:33.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:33.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:33.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:33.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:33.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:33.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:33.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:33.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:33.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:33.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:33.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:33.749 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:33.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:33.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:33.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:33.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:34.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:34.274 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:34.276 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:34.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:34.278 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:34.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:34.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:34.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:34.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:34.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:34.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:34.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:34.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:34.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:34.340 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:18:34.340 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:18:34.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:34.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:34.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:34.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:34.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:34.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:34.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:35.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:35.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:35.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:35.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:35.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:35.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:36.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:36.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:36.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:36.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:36.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:36.453 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:18:36.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:36.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:36.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:36.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:36.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:36.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:36.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:36.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:36.477 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:18:36.477 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:18:36.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:36.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:36.629 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:18:36.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:36.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:36.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:36.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:37.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:18:37.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:18:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:37.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:38.065 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:18:38.543 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:18:38.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:38.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:38.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:38.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:38.593 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:18:38.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:38.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:38.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:38.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:38.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:38.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:38.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:38.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:38.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:38.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:38.611 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:43.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:43.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:43.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:43.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:43.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:43.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:43.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:43.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:43.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:43.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:43.624 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:43.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:43.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:43.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:43.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:43.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:43.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:43.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:43.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:43.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:43.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:43.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:43.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:43.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:43.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:43.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:43.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:43.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:43.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:43.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:43.640 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:43.640 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:43.640 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:43.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:44.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:44.159 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:44.160 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:44.161 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:44.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:44.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:44.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:44.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:44.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:44.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:44.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:44.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:44.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:44.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:44.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:44.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:44.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:44.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:44.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:44.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:44.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:44.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:44.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:45.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:45.561 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:45.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:46.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:46.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:46.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:46.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:46.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:46.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:46.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:46.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:46.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:46.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:46.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:46.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:46.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:46.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:46.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:46.418 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=593 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.420 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.421 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.421 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.421 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.421 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:46.421 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=594 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:18:51.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:51.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:51.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:51.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:51.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:51.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:51.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:51.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:51.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:51.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:51.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:51.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:51.449 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:51.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:51.449 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:51.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:51.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:51.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:51.450 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:51.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:51.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:51.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:51.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:51.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:51.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:51.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:51.455 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:51.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:51.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:51.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:51.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:51.464 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:51.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:51.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:51.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:51.977 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:51.978 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:51.978 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:51.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:51.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:51.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:51.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:51.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:51.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:51.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:51.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:51.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:52.028 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:18:52.028 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:18:52.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:52.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:52.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:18:52.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:52.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:52.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:52.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:18:53.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:18:53.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:53.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:53.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:53.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:53.865 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:18:54.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:54.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:54.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:54.243 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:18:54.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:18:54.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:18:54.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:18:54.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:18:54.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:54.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:54.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:54.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:54.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:54.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:54.259 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:18:59.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:18:59.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:18:59.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:59.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:59.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:59.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:59.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:18:59.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:59.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:59.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:18:59.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:18:59.274 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:18:59.274 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:18:59.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:59.275 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:59.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:18:59.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:18:59.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:18:59.275 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:18:59.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:18:59.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:18:59.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:59.278 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:59.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:18:59.279 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:18:59.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:18:59.279 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:18:59.282 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:18:59.282 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:18:59.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:59.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:18:59.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:18:59.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:18:59.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:18:59.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:18:59.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:18:59.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:18:59.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:18:59.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:18:59.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.289 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:18:59.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:18:59.289 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:18:59.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:18:59.294 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:18:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:18:59.805 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:18:59.805 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:18:59.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:59.806 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:18:59.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:18:59.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:18:59.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:18:59.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:59.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:59.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:59.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:18:59.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:18:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:18:59.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:18:59.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:18:59.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:18:59.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.250 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:00.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:00.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:00.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:00.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:00.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:00.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:00.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:00.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:00.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:00.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:00.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:00.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:00.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:00.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:00.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:00.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:00.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:00.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:00.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:00.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:00.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:00.728 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:19:00.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:00.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:00.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:00.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:00.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:00.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:00.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:00.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:00.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:00.740 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:00.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:00.740 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.740 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:00.741 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:05.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:05.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:05.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:05.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:05.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:05.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:05.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:05.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:05.754 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:05.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:05.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:05.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:05.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:05.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:05.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:05.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:05.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:05.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:05.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:05.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:05.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:05.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:05.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:05.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:05.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:05.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:05.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:05.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:05.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:05.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:05.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:05.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:05.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:05.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:05.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:05.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:05.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:05.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:05.780 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:05.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:05.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:05.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:06.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:06.305 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:06.306 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:06.307 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:06.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:06.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:06.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:06.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:06.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:06.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:06.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:06.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:06.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:06.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:06.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:06.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:06.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:06.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:06.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:06.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:06.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:06.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:06.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:06.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:06.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:06.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:06.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:06.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:06.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:06.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:06.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:06.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:06.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:06.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:07.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:07.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:07.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:07.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:07.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:07.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:07.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:07.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:07.208 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:12.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:12.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:12.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:12.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:12.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:12.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:12.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:12.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:12.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:12.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:12.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:12.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:12.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:12.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:12.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:12.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:12.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:12.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:12.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:12.237 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:12.238 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:12.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:12.238 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:12.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:12.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:12.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:12.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:12.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:12.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:12.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:12.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:12.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:12.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:12.248 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:12.248 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:12.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:12.769 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:12.769 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:12.770 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:12.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:12.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:12.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:12.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:12.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:12.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:12.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:12.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:12.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:12.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:12.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:12.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:12.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:12.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:13.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:13.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:13.198 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:13.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:13.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:13.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:13.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:13.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:13.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:13.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:13.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:13.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:13.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:13.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:13.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:13.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:13.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:13.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:13.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:13.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:13.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:13.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:13.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:13.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:13.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:13.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:13.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:13.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:13.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:13.647 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:13.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:13.647 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:19:18.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:18.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:18.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:18.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:18.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:18.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:18.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:18.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:18.655 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:18.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:18.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:18.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:18.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:18.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:18.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:18.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:18.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:18.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:18.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:18.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:18.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:18.658 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:18.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:18.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:18.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:18.663 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:18.663 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:18.663 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:18.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:18.668 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:19.147 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:19.179 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:19.180 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:19.181 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:19.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:19.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:19.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:19.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:19.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:19.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:19.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:19.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:19.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:19.292 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:19:19.292 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:19:19.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:19.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:19.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:19.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:19.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:19.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:19.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:20.096 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:19:20.569 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:19:20.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:20.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:20.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:20.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:21.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:19:21.522 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:19:21.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:21.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:21.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:21.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:22.001 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:19:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:19:22.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:22.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:22.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:22.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:22.959 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:19:23.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:23.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:23.297 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:19:23.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:23.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:23.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:23.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:23.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:23.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:23.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:23.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:23.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:23.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:23.303 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:28.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:28.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:28.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:28.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:28.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:28.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:28.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:28.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:28.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:28.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:28.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:28.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:28.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:28.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:28.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:28.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:28.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:28.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:28.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:28.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:28.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:28.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:28.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:28.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:28.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:28.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:28.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:28.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:28.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:28.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:28.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:28.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:28.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:28.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:28.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:28.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:28.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:28.335 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:28.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:28.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:28.340 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:28.858 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:28.859 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:28.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:28.860 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:28.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:28.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:28.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:28.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:28.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:28.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:28.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:28.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:28.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:28.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:28.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:28.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:29.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:29.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:29.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:29.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:29.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:29.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:29.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:29.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:29.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:29.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:29.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:29.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:29.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.299 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:29.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:29.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:29.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:29.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:29.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:29.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:29.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:29.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:29.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:29.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:29.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:29.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:29.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:29.439 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:34.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:34.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:34.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:34.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:34.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:34.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:34.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:34.458 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:34.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:34.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:34.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:34.461 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:34.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:34.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:34.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:34.462 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:34.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:34.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:34.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:34.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:34.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:34.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:34.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:34.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:34.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:34.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:34.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:34.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:34.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:34.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:34.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:34.475 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:34.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:34.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:35.000 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:35.002 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:35.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:35.004 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:35.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:35.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:35.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:35.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:35.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:35.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:35.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:35.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:35.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:35.109 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:19:35.109 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:19:35.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:35.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:35.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:35.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:35.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:35.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:35.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:35.917 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:19:36.396 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:19:36.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:36.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:36.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:36.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:36.874 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:19:37.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:19:37.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:37.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:37.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:37.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:37.831 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:19:38.309 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:19:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:38.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:38.787 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:19:39.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:39.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:39.113 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:19:39.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:39.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:39.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:39.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:39.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:39.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:39.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:39.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:39.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:39.118 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:39.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:44.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:44.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:44.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:44.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:44.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:44.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:44.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:44.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:44.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:44.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:44.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:44.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:44.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:44.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:44.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:44.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:44.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:44.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:44.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:44.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:44.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:44.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:44.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:44.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:44.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:44.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:44.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:44.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:44.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:44.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:44.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:44.155 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:44.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:44.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:44.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:44.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:44.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:44.684 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:44.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:44.688 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:44.691 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:44.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:44.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:44.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:44.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:44.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:44.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:44.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:44.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:44.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:44.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:44.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:45.120 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:45.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:45.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:45.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:45.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:45.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:45.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:45.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:45.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:45.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:45.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:45.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:45.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:45.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:45.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:45.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:45.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:45.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:45.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:45.517 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:50.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:50.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:50.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:50.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:50.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:50.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:50.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:50.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:50.535 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:50.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:50.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:50.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:50.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:50.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:50.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:50.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:50.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:50.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:50.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:50.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:50.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:50.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:50.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:50.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:50.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:50.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:50.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:50.553 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:50.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:50.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:50.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:51.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:51.077 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:51.079 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:51.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:51.080 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:51.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:51.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:51.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:51.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:51.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:51.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:51.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:51.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:51.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:51.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:51.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:51.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:51.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:51.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:51.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:51.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:51.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:51.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:51.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:51.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:51.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:51.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:51.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:51.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:51.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:51.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:51.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:51.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:51.875 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:19:56.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:56.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:56.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:56.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:56.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:56.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:56.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:56.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:56.891 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:56.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:19:56.892 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:19:56.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:19:56.897 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:19:56.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:56.897 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:56.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:56.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:19:56.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:19:56.899 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:19:56.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:19:56.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:19:56.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:56.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:56.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:56.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:19:56.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:19:56.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:19:56.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:19:56.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:19:56.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:56.907 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:19:56.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:56.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:19:56.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:19:56.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:19:56.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:19:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:19:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:19:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:19:56.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:19:56.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:19:56.914 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:19:56.915 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:19:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:19:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:19:57.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:19:57.439 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:19:57.442 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:19:57.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:57.444 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:19:57.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:57.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:57.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:19:57.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:57.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:57.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:57.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:19:57.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:19:57.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:57.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:19:57.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:19:57.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:57.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:57.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:19:57.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:57.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:57.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:57.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:58.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:19:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:19:58.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:19:58.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:19:58.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:19:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:19:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:19:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:19:58.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:19:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:19:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:19:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:19:58.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:19:58.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:19:58.295 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:03.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:03.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:03.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:03.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:03.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:03.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:03.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:03.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:03.298 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:03.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:03.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:03.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:03.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:03.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:03.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:03.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:03.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:03.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:03.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:03.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:03.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:03.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:03.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:03.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:03.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:03.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:03.306 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:03.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:03.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:03.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:03.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:03.819 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:03.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:03.820 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:03.820 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:03.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:03.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:03.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:03.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:03.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:03.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:03.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:03.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:03.872 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:20:03.872 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:20:03.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:03.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:04.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:04.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:04.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:04.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:04.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:04.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:04.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:04.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:04.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:04.704 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:20:04.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:04.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:04.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:04.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:04.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:04.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:04.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:04.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:04.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:04.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:04.719 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:04.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:04.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:04.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:04.719 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:09.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:09.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:09.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:09.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:09.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:09.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:09.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:09.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:09.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:09.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:09.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:09.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:09.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:09.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:09.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:09.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:09.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:09.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:09.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:09.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:09.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:09.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:09.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:09.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:09.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:09.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:09.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:09.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:09.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:09.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:09.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:09.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:09.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:09.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:09.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:09.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:09.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:09.749 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:09.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:10.268 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:10.269 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:10.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:10.270 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:10.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:10.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:10.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:10.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:10.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:10.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:10.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:10.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:10.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:10.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:10.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:10.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:10.716 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:10.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:10.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:10.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:10.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:11.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:11.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:11.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:11.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:11.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:11.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:11.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:11.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:11.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:11.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:11.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:11.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:11.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:11.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:11.133 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:16.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:16.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:16.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:16.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:16.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:16.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:16.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:16.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:16.163 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:16.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:16.164 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:16.167 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:16.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:16.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:16.168 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:16.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:16.168 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:16.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:16.169 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:16.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:16.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:16.171 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:16.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:16.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:16.174 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:16.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:16.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:16.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:16.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:16.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:16.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:16.180 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:16.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:16.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:16.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:16.668 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:16.699 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:16.701 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:16.702 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:16.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:16.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:16.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:16.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:16.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:16.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:16.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:16.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:16.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:16.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:16.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:20:16.815 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:20:16.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:16.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:17.146 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:17.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:17.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:17.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:17.623 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:20:17.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:17.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:17.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:17.683 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:20:17.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:17.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:17.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:17.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:17.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:17.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:17.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:17.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:17.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:17.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:17.700 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:22.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:22.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:22.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:22.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:22.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:22.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:22.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:22.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:22.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:22.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:22.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:22.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:22.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:22.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:22.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:22.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:22.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:22.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:22.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:22.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:22.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:22.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:22.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:22.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:22.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:22.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:22.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:22.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:22.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:22.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:22.735 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:22.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:22.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:22.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.736 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:22.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:22.737 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:22.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:22.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:22.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:22.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:23.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:23.261 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:23.262 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:23.263 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:23.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:23.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:23.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:23.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:23.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:23.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:23.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:23.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:23.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:23.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:23.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:23.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:23.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:23.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:24.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:20:24.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:24.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:24.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:24.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:24.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:24.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:24.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:24.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:24.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:24.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:24.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:24.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:24.658 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:20:24.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:24.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:24.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:24.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:25.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:20:25.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:20:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:20:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:20:25.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:25.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:25.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:25.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:25.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:25.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:25.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:25.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:25.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:25.669 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.669 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:25.670 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:20:30.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:30.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:30.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:30.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:30.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:30.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:30.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:30.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:30.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:30.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:30.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:30.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:30.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:30.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:30.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:30.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:30.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:30.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:30.697 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:30.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:30.700 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:30.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:30.700 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:30.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:30.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:30.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:30.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:30.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:30.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:30.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:30.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:30.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:30.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:30.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:30.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:30.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:30.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:30.711 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:30.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:30.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:31.200 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:31.233 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:31.234 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:31.236 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:31.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:31.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:31.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:31.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:31.679 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:31.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:31.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:31.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:31.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:32.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:20:32.636 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:20:32.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:32.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:32.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:32.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:33.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:20:33.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:20:33.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:33.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:33.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:33.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:34.071 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:20:34.549 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:20:34.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:34.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:34.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:34.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:35.028 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:20:35.507 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:20:35.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:35.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:35.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:35.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:35.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:20:36.464 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:20:36.942 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:20:37.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:37.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:37.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:37.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:37.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:37.421 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:20:37.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:20:37.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:37.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:37.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:37.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:37.900 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:20:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:20:38.858 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:20:39.337 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:20:39.816 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:20:40.285 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:20:40.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:40.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:40.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:40.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:40.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:40.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:40.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:40.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:40.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:40.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:40.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:40.425 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:20:40.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:45.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:45.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:45.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:45.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:45.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:45.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:45.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:45.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:45.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:45.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:20:45.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:20:45.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:20:45.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:20:45.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:45.449 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:45.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:45.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:20:45.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:20:45.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:20:45.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:20:45.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:20:45.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:45.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:45.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:45.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:20:45.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:20:45.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:45.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:20:45.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:20:45.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.461 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:20:45.461 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:20:45.462 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:20:45.462 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:20:45.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:20:45.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:20:45.979 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:20:45.981 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:20:45.982 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:20:45.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:20:45.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:45.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:45.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:20:46.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:20:46.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:46.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:46.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:46.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:46.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:20:47.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:20:47.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:47.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:47.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:47.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:47.861 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:20:48.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:20:48.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:48.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:48.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:48.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:20:49.297 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:20:49.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:49.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:49.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:49.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:49.776 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:20:50.254 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:20:50.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:50.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:50.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:50.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:50.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:20:51.211 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:20:51.690 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:20:52.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:52.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:52.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:52.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:20:52.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:20:52.168 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:20:52.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:20:52.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:20:52.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:20:52.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:52.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:20:52.647 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:20:53.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:20:53.604 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:20:54.083 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:20:54.562 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:20:55.041 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:20:55.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:20:55.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:20:55.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:20:55.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:20:55.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:20:55.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:20:55.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:20:55.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:20:55.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:20:55.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:20:55.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:20:55.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:20:55.163 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:21:00.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:00.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:00.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:00.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:00.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:00.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:00.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:00.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:00.181 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:00.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:00.181 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:21:00.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:21:00.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:21:00.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:00.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:00.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:00.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:21:00.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:00.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:21:00.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:21:00.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:21:00.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:00.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:00.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:00.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:21:00.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:00.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:21:00.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:21:00.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:21:00.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:00.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:00.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:00.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:21:00.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:00.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:21:00.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:21:00.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:21:00.197 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:21:00.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:00.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:21:00.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:21:00.715 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:21:00.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:21:00.717 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:21:00.717 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:21:00.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:00.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:21:01.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:21:01.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:01.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:01.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:01.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:01.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:21:02.115 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:21:02.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:02.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:02.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:02.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:02.594 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:21:03.072 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:21:03.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:03.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:03.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:03.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:03.551 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:21:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:21:04.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:04.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:04.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:04.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:04.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:21:04.986 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:21:05.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:05.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:05.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:05.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:05.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:21:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:21:06.420 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:21:06.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:06.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:06.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:06.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:21:06.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:21:06.899 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:21:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:21:06.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:06.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:06.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:06.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:07.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:21:07.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:21:08.336 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:21:08.813 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:21:09.292 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:21:09.770 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:21:09.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:09.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:09.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:09.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:09.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:09.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:09.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:09.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:09.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:09.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:09.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:09.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:09.902 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:21:14.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:14.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:14.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:14.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:14.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:14.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:14.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:14.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:14.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:14.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:14.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:21:14.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:21:14.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:21:14.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:14.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:14.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:14.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:21:14.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:14.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:21:14.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:21:14.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:21:14.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:14.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:14.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:14.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:21:14.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:14.935 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:21:14.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:21:14.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:21:14.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:14.937 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:14.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:14.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:21:14.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:14.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:21:14.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:21:14.947 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:21:14.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:14.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:21:15.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:21:15.464 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:21:15.464 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:21:15.464 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:21:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:21:15.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:15.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:15.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:21:15.914 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:21:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:15.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:16.392 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:21:16.871 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:21:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:16.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:16.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:16.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:17.349 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:21:17.828 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:21:17.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:17.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:17.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:17.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:18.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:21:18.785 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:21:18.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:18.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:18.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:18.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:19.264 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:21:19.743 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:21:19.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:19.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:19.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:19.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:20.222 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:21:20.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:21:21.178 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:21:21.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:21.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:21.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:21.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:21:21.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:21:21.657 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:21:21.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:21:21.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:21.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:21.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:21.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:22.136 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:21:22.611 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:21:23.090 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:21:23.567 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:21:24.046 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:21:24.525 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:21:24.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:24.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:24.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:24.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:24.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:24.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:24.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:24.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:24.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:24.650 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:21:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (TRX3@172.18.142.20:5700/3) RX TRXD message (ver=1 fn=2069 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.650 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.651 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:24.651 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2069 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:29.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:29.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:29.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:29.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:29.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:29.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:29.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:29.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:29.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:29.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:21:29.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:21:29.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:21:29.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:29.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:29.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:29.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:21:29.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:29.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:21:29.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:21:29.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:21:29.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:29.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:29.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:29.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:21:29.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:29.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:21:29.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:21:29.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:21:29.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:29.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:29.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:29.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:21:29.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:29.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:21:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:21:29.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:21:29.714 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:21:29.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:29.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:21:30.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:21:30.239 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:21:30.241 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:21:30.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:21:30.243 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:21:30.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:30.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:30.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:21:30.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:21:30.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:30.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:30.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:30.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:31.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:21:31.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:21:31.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:31.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:31.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:31.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:21:32.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:21:32.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:32.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:32.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:32.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:33.073 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:21:33.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:21:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:33.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:34.030 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:21:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:21:34.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:34.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:34.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:34.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:21:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:21:35.945 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:21:36.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:36.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:36.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:36.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:21:36.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:21:36.423 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:21:36.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD NOHANDOVER
2025-12-12 05:21:36.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:21:36.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:21:36.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:36.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:21:36.902 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:21:37.381 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:21:37.860 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:21:38.339 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:21:38.818 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:21:39.297 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:21:39.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:21:39.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:21:39.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:39.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:39.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:39.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:39.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:39.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:39.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:39.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:39.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:39.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:39.419 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:21:39.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2068 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:39.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2068 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:39.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2068 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:39.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2068 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:39.419 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2068 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:21:44.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:44.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:44.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:44.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:44.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:44.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:44.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:44.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:44.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:44.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:21:44.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:21:44.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:21:44.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:21:44.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:44.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:44.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:44.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:21:44.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:21:44.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:21:44.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:21:44.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:21:44.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:44.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:44.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:44.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:21:44.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:21:44.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:21:44.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:21:44.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:21:44.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:44.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:21:44.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:21:44.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:21:44.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:21:44.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:21:44.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:21:44.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:21:44.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:21:44.453 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:21:44.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:21:44.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:21:44.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:21:44.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:21:44.982 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:21:44.984 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:21:44.986 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:21:44.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:21:45.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:21:45.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:45.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:21:46.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:21:46.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:46.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:46.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:46.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:46.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:21:47.331 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:21:47.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:47.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:47.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:47.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:21:48.289 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:21:48.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:48.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:48.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:48.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:48.767 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:21:49.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:21:49.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:49.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:49.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:49.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:49.724 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:21:50.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:21:50.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:21:51.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:21:51.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:21:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:21:52.596 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:21:53.075 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:21:53.553 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:21:54.032 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:21:54.510 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:21:54.988 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:21:54.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:21:54.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:21:54.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:21:54.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:21:55.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:21:55.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:21:55.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:21:55.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:21:55.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:21:55.000 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:21:55.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:00.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:00.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:00.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:00.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:00.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:00.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:00.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:00.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:00.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:00.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:00.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:00.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:00.026 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:00.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:00.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:00.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:00.027 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:00.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:00.027 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:00.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:00.030 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:00.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:00.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:00.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:00.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:00.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:00.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:00.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:00.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:00.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:00.035 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:00.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:00.035 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:00.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:00.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:00.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:00.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:00.041 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:00.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:00.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:00.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:00.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:00.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:00.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:00.044 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:00.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:00.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:05.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:05.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:05.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:05.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:05.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:05.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:05.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:05.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:05.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:05.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:05.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:05.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:05.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:05.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:05.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:05.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:05.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:05.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:05.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:05.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:05.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:05.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:05.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:05.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:05.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:05.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:05.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:05.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:05.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:05.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:05.075 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:05.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:05.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:05.080 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:22:05.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:22:05.593 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:22:05.594 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:22:05.595 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:22:05.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:22:05.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:05.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:05.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:22:05.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:22:05.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:22:05.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:22:05.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:22:05.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:22:06.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:22:06.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:06.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:06.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:06.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:06.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:22:06.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:22:07.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:07.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:07.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:07.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:07.476 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:22:07.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:22:08.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:08.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:08.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:08.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:08.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:22:08.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:22:09.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:09.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:09.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:22:09.866 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:22:10.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:10.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:10.344 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:22:10.821 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:22:11.299 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:22:11.777 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:22:12.255 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:22:12.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:22:13.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:22:13.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:13.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:13.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:13.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:13.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:13.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:13.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:13.618 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:18.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:18.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:18.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:18.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:18.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:18.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:18.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:18.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:18.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:18.639 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:18.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:18.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:18.640 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:18.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:18.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:18.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:18.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:18.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:18.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:18.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:18.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:18.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:18.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:18.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:18.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:18.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:18.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:18.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:18.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:18.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.650 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:18.650 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:18.650 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:18.650 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:18.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:18.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:18.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:18.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:18.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:18.653 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:18.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:23.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:23.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:23.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:23.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:23.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:23.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:23.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:23.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:23.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:23.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:23.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:23.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:23.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:23.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:23.676 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:23.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:23.676 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:23.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:23.676 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:23.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:23.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:23.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:23.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:23.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:23.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:23.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:23.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:23.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:23.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:23.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:23.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:23.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:23.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:23.690 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:23.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:23.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:22:24.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:22:24.211 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:22:24.213 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:22:24.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:22:24.215 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:22:24.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:24.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:24.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:22:24.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:22:24.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:22:24.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:22:24.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:22:24.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:22:24.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:22:24.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:24.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:24.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:24.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:25.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:22:25.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:22:25.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:25.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:25.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:25.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:26.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:22:26.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:22:26.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:26.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:26.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:26.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:27.046 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:22:27.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:22:27.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:27.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:27.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:27.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:28.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:22:28.480 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:22:28.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:28.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:28.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:28.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:28.957 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:22:29.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:22:29.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:22:30.391 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:22:30.869 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:22:31.348 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:22:31.825 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:22:32.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:32.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:32.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:32.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:32.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:32.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:32.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:32.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:32.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:32.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:32.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:32.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:32.237 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:37.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:37.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:37.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:37.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:37.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:37.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:37.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:37.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:37.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:37.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:37.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:37.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:37.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:37.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:37.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:37.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:37.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:37.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:37.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:37.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:37.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:37.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:37.262 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:37.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:37.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:37.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:37.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:37.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:37.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:37.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:37.264 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:37.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:37.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:37.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:37.265 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:37.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:37.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:37.269 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:37.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:37.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:37.271 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:37.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:42.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:42.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:42.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:42.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:42.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:42.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:42.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:42.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:42.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:42.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:42.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:42.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:42.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:42.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:42.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:42.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:42.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:42.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:42.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:42.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:42.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:42.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:42.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:42.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:42.301 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:42.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:42.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:42.302 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:42.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:42.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:42.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:22:42.791 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:22:42.818 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:22:42.819 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:22:42.820 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:22:42.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:42.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:22:42.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:22:42.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:22:43.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:22:43.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:43.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:43.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:43.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:22:44.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:22:44.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:44.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:44.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:44.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:44.701 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:22:45.179 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:22:45.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:45.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:45.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:45.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:45.657 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:22:46.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:22:46.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:46.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:46.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:46.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:46.612 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:22:47.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:22:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:47.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:47.568 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:22:48.046 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:22:48.525 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:22:49.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:22:49.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:22:49.959 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:22:50.437 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:22:50.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:22:50.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:22:50.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:22:50.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:22:50.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:22:50.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:22:50.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:50.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:50.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:50.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:50.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:50.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:50.852 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:50.853 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:22:55.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:55.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:55.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:55.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:55.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:55.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:55.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:55.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:55.870 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:55.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:22:55.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:22:55.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:22:55.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:22:55.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:55.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:55.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:55.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:22:55.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:22:55.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:22:55.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:22:55.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:22:55.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:55.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:55.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:55.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:22:55.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:22:55.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:22:55.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:22:55.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:22:55.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:55.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:22:55.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:22:55.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:22:55.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:22:55.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:22:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:22:55.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:22:55.891 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:22:55.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:22:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:22:55.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:22:55.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:22:55.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:22:55.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:22:55.893 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:22:55.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:22:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:00.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:00.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:00.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:00.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:00.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:00.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:00.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:00.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:00.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:00.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:00.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:00.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:00.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:00.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:00.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:00.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:00.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:00.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:00.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:00.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:00.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:00.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:00.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:00.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:00.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:00.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:00.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:00.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:00.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:00.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:00.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:00.929 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:00.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:00.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:23:01.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:23:01.451 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:23:01.453 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:23:01.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:23:01.454 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:23:01.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:01.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:01.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:23:01.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:23:01.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:23:01.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:23:01.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:23:01.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:23:01.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:23:01.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:01.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:02.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:23:02.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:23:02.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:02.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:02.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:02.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:23:03.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:23:03.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:03.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:03.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:03.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:04.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:23:04.762 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:23:04.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:04.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:04.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:04.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:05.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:23:05.719 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:23:05.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:05.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:05.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:06.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:23:06.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:23:07.152 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:23:07.630 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:23:08.108 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:23:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:23:09.063 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:23:09.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:09.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:09.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:09.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:09.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:09.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:09.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:09.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:09.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:09.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:09.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:09.473 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:09.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:14.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:14.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:14.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:14.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:14.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:14.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:14.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:14.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:14.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:14.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:14.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:14.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:14.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:14.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:14.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:14.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:14.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:14.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:14.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:14.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:14.500 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:14.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:14.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:14.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:14.500 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:14.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:14.500 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:14.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:14.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:14.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:14.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:14.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:14.511 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:14.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:14.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:14.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:14.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:14.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:14.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:14.514 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:14.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:19.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:19.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:19.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:19.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:19.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:19.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:19.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:19.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:19.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:19.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:19.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:19.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:19.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:19.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:19.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:19.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:19.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:19.534 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:19.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:19.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:19.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:19.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:19.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:19.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:19.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:19.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:19.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:19.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:19.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:19.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:19.543 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:19.543 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:23:20.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:23:20.057 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:23:20.058 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:23:20.058 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:20.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:23:20.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:23:20.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:23:20.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:23:20.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:20.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:20.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:20.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:20.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:23:21.467 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:23:21.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:21.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:21.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:21.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:21.945 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:23:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:23:22.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:22.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:22.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:22.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:22.901 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:23:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:23:23.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:23.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:23.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:23.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:23.856 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:23:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:23:24.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:24.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:24.812 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:23:25.291 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:23:25.769 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:23:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:23:26.724 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:23:27.201 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:23:27.679 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:23:28.157 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:23:28.635 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:23:29.113 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:23:29.591 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:23:30.068 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:23:30.554 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:23:31.032 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:23:31.510 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:23:31.988 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:23:32.466 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:23:32.944 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:23:33.422 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:23:33.901 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:23:34.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:34.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:34.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:34.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:34.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:34.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:34.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:34.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:34.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:34.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:34.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:34.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:34.105 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:34.106 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3106 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:34.106 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3106 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:34.106 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3106 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:39.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:39.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:39.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:39.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:39.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:39.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:39.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:39.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:39.131 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:39.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:39.131 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:39.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:39.136 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:39.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:39.136 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:39.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:39.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:39.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:39.137 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:39.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:39.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:39.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:39.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:39.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:39.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:39.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:39.141 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:39.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:39.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:39.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:39.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:39.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:39.149 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:39.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:39.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:39.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:39.151 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:39.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:44.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:44.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:44.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:44.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:44.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:44.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:44.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:44.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:44.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:44.170 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:44.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:44.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:44.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:44.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:44.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:44.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:44.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:44.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:44.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:44.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:44.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:44.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:44.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:44.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:44.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:44.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:44.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:44.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:44.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:44.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:44.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:44.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:44.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:44.194 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:44.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:44.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:44.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:44.203 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:44.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:44.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:23:44.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:23:44.730 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:23:44.733 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:23:44.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:23:44.735 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:23:44.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:44.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:44.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:23:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:23:44.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:23:44.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:23:44.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:23:44.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:23:45.168 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:23:45.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:45.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:45.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:45.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:45.646 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:23:46.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:23:46.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:46.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:46.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:46.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:46.600 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:23:47.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:23:47.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:47.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:47.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:47.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:47.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:23:48.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:23:48.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:48.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:48.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:48.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:48.511 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:23:48.989 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:23:49.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:49.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:49.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:49.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:23:49.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:23:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:23:50.902 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:23:51.380 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:23:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:23:52.335 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:23:52.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:23:52.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:23:52.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:23:52.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:23:52.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:23:52.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:23:52.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:52.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:52.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:52.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:52.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:52.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:52.793 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:52.793 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:23:57.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:57.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:57.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:57.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:57.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:57.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:57.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:57.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:57.809 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:57.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:23:57.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:23:57.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:23:57.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:23:57.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:57.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:57.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:57.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:23:57.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:23:57.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:23:57.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:23:57.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:23:57.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:57.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:57.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:57.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:23:57.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:23:57.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:23:57.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:23:57.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:23:57.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:57.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:23:57.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:23:57.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:23:57.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:23:57.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:23:57.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:23:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:23:57.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:23:57.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:23:57.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:23:57.831 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:23:57.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:23:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:23:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:23:57.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:23:57.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:23:57.835 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:23:57.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:02.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:02.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:02.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:02.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:02.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:02.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:02.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:02.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:02.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:02.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:24:02.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:24:02.859 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:24:02.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:02.859 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:02.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:02.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:24:02.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:02.860 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:24:02.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:24:02.863 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:24:02.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:02.863 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:02.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:02.863 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:24:02.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:02.864 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:24:02.866 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:24:02.866 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:24:02.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:02.866 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:02.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:02.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:24:02.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:02.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:24:02.872 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:24:02.872 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:24:02.872 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:02.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:24:03.361 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:24:03.393 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:24:03.395 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:24:03.397 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:24:03.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:24:03.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:24:03.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:24:03.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:24:03.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:24:03.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:24:03.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:24:03.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:24:03.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:24:03.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:24:03.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:03.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:04.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:24:04.794 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:24:04.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:04.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:04.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:04.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:05.272 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:24:05.750 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:24:05.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:05.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:06.229 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:24:06.707 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:24:06.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:06.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:06.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:06.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:07.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:24:07.663 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:24:07.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:07.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:07.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:07.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:08.141 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:24:08.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:24:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:24:09.574 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:24:10.052 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:24:10.530 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:24:11.008 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:24:11.485 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:24:11.963 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:24:12.441 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:24:12.919 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:24:13.398 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:24:13.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:24:13.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:24:13.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:13.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:13.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:13.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:13.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:13.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:13.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:13.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:13.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:13.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:13.418 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:13.418 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:18.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:18.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:18.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:18.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:18.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:18.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:18.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:18.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:18.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:18.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:18.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:24:18.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:24:18.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:24:18.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:18.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:18.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:18.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:24:18.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:18.442 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:24:18.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:24:18.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:24:18.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:18.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:18.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:18.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:24:18.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:18.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:18.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:24:18.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:18.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:24:18.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:24:18.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:24:18.454 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:24:18.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:18.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:18.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:18.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:18.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:18.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:18.456 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:24:18.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:18.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:23.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:23.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:23.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:23.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:23.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:23.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:23.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:23.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:23.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:23.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:24:23.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:24:23.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:24:23.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:23.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:23.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:23.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:24:23.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:23.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:24:23.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:24:23.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:24:23.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:23.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:23.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:23.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:24:23.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:23.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:24:23.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:24:23.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:24:23.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:23.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:23.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:23.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:24:23.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:23.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:24:23.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:24:23.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:24:23.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:24:23.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:24:23.490 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:24:23.490 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:24:23.490 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:23.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:23.495 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:24:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:24:24.013 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:24:24.014 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:24:24.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:24:24.016 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:24:24.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:24:24.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:24:24.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:24:24.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:24:24.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:24:24.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:24:24.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:24:24.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:24:24.457 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:24:24.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:24.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:24.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:24.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:24.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:24:25.413 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:24:25.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:25.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:25.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:25.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:25.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:24:26.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:24:26.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:26.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:26.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:24:27.326 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:24:27.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:27.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:27.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:27.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:27.804 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:24:28.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:24:28.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:28.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:28.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:28.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:28.760 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:24:29.238 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:24:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:24:30.194 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:24:30.672 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:24:31.149 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:24:31.627 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:24:32.105 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:24:32.583 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:24:33.061 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:24:33.539 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:24:34.017 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:24:34.495 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:24:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:24:35.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:24:35.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:24:35.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:35.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:35.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:35.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:35.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:35.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:35.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:35.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:35.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:35.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:35.036 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:24:35.036 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:35.036 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:35.036 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:24:40.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:40.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:40.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:40.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:40.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:40.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:40.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:40.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:24:40.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:24:40.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:24:40.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:40.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:40.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:40.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:24:40.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:40.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:24:40.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:24:40.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:24:40.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:40.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:40.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:40.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:24:40.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:40.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:24:40.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:24:40.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:24:40.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:40.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:40.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:40.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:24:40.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:40.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:24:40.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:24:40.079 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:24:40.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:40.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:40.082 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:24:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:24:45.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:24:45.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:45.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:45.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:45.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:45.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:24:45.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:45.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:45.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:24:45.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:24:45.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:24:45.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:24:45.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:45.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:45.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:24:45.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:24:45.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:24:45.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:24:45.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:24:45.128 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:24:45.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:45.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:24:45.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:24:45.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:24:45.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:24:45.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:24:45.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:24:45.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:45.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:24:45.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:24:45.133 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:24:45.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:24:45.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:24:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:24:45.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:24:45.140 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:24:45.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:24:45.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:24:45.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:24:45.665 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:24:45.667 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:24:45.669 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:24:45.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:24:45.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:24:45.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:24:45.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:24:45.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:24:45.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:24:45.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:24:45.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:24:45.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:24:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:24:46.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:46.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:46.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:46.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:24:47.061 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:24:47.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:47.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:47.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:47.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:47.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:24:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:24:48.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:48.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:24:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:24:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:49.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:49.450 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:24:49.928 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:24:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:24:50.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:24:50.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:24:50.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:24:50.406 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:24:50.884 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:24:51.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:24:51.840 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:24:52.318 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:24:52.796 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:24:53.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:24:53.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:24:54.228 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:24:54.706 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:24:55.184 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:24:55.663 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:24:56.140 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:24:56.617 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:24:57.095 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:24:57.572 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:24:58.050 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:24:58.528 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:24:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:24:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:24:59.961 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:25:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:25:00.916 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:25:01.395 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:25:01.872 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:25:02.349 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:25:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:25:03.300 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:25:03.778 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:25:04.249 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:25:04.716 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:25:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:25:05.661 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:25:05.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:25:05.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:25:05.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:05.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:05.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:05.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:05.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:05.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:05.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:05.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:05.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:05.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:05.739 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:10.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:10.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:10.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:10.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:10.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:10.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:10.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:10.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:10.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:10.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:10.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:10.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:10.773 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:10.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:10.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:10.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:10.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:10.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:10.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:10.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:10.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:10.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:10.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:10.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:10.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:10.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:10.783 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:10.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:10.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:10.785 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:10.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:15.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:15.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:15.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:15.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:15.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:15.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:15.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:15.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:15.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:15.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:15.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:15.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:15.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:15.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:15.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:15.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:15.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:15.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:15.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:15.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:15.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:15.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:15.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:15.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:15.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:15.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:15.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:15.815 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:15.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:15.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:15.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:15.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:15.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:15.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:15.816 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:15.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:15.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:15.821 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:15.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:15.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:15.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:15.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:25:16.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:25:16.342 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:25:16.343 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:25:16.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:25:16.345 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:25:16.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:25:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:16.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:16.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:16.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:17.265 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:25:17.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:25:17.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:17.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:17.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:17.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:18.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:25:18.701 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:25:18.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:18.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:18.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:18.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:19.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:25:19.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:25:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:19.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:20.136 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:25:20.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:25:20.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:20.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:20.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:20.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:21.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:25:21.568 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:25:22.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:25:22.520 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:25:22.998 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:25:23.476 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:25:23.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:25:24.432 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:25:24.911 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:25:25.389 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:25:25.867 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:25:26.344 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:25:26.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:26.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:26.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:26.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:26.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:26.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:26.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:26.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:26.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:26.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:26.358 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:26.358 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:26.358 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:26.358 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:26.358 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:31.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:31.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:31.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:31.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:31.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:31.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:31.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:31.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:31.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:31.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:31.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:31.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:31.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:31.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:31.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:31.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:31.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:31.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:31.384 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:31.384 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:31.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:31.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:31.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:31.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:31.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:31.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:31.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:31.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:31.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:31.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.393 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:31.393 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:31.393 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:31.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:31.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:31.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:31.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:31.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:31.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:31.396 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:31.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:31.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:36.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:36.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:36.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:36.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:36.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:36.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:36.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:36.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:36.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:36.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:36.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:36.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:36.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:36.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:36.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:36.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:36.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:36.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:36.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:36.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:36.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:36.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:36.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:36.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:36.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:36.428 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:36.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:36.432 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:25:36.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:25:36.950 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:25:36.952 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:25:36.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:25:36.954 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:25:37.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:25:37.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:37.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:37.871 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:25:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:25:38.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:38.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:38.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:38.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:38.828 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:25:39.306 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:25:39.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:39.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:39.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:39.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:39.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:25:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:25:40.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:40.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:40.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:40.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:40.741 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:25:41.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:25:41.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:41.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:41.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:41.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:41.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:25:42.177 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:25:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:25:43.134 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:25:43.613 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:25:44.091 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:25:44.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:25:45.048 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:25:45.526 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:25:46.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:25:46.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:25:46.964 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:25:47.442 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:25:47.921 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:25:48.400 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:25:48.879 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:25:48.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:25:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:25:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:25:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:25:48.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:48.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:48.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:48.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:48.968 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:48.968 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2673 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:48.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:48.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:48.968 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2673 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:48.968 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2673 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:48.968 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2673 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:25:53.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:53.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:53.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:53.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:53.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:53.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:53.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:53.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:53.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:53.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:53.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:53.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:53.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:53.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:53.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:53.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:53.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:53.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:53.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:53.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:53.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:53.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:53.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:53.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:53.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:53.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:54.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:54.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:54.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:54.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:54.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:54.008 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:54.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:54.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:54.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:54.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:54.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:54.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:54.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:54.011 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:25:54.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:54.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:25:59.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:25:59.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:59.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:59.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:59.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:59.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:25:59.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:59.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:59.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:25:59.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:25:59.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:25:59.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:25:59.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:59.034 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:59.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:25:59.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:25:59.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:25:59.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:25:59.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:25:59.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:25:59.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:59.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:59.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:25:59.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:25:59.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:25:59.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:25:59.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:25:59.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:25:59.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:59.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:25:59.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:25:59.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:25:59.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:25:59.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:25:59.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:25:59.047 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:25:59.047 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:25:59.047 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:25:59.052 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:25:59.535 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:25:59.576 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:25:59.578 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:25:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:25:59.580 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:25:59.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:25:59.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:25:59.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:25:59.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:25:59.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:25:59.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:25:59.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:25:59.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:25:59.625 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:25:59.625 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:25:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:25:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:00.013 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:26:00.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:00.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:00.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:00.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:00.491 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:26:00.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:26:01.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:01.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:01.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:01.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:26:01.927 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:26:02.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:02.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:02.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:02.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:02.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:26:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:26:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:03.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:03.361 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:26:03.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:26:04.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:04.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:04.317 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:26:04.796 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:26:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:26:05.753 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:26:06.231 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:26:06.709 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:26:07.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:26:07.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:07.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:07.631 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:26:07.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:07.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:07.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:07.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:07.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:07.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:07.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:07.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:07.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:07.638 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:07.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:12.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:12.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:12.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:12.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:12.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:12.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:12.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:12.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:12.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:12.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:12.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:12.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:12.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:12.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:12.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:12.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:12.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:12.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:12.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:12.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:12.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:12.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:12.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:12.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:12.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:12.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:12.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:12.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:12.667 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:12.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:12.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:12.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:12.669 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:17.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:17.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:17.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:17.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:17.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:17.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:17.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:17.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:17.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:17.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:17.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:17.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:17.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:17.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:17.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:17.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:17.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:17.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:17.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:17.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:17.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:17.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:17.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:17.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:17.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:17.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:17.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:17.701 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:17.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:17.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:26:18.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:26:18.221 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:26:18.223 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:26:18.224 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:26:18.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:26:18.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:18.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:18.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:26:18.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:18.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:26:18.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:26:18.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:26:18.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:26:18.234 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:26:18.234 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:26:18.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:18.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:18.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:26:18.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:18.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:18.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:18.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:26:19.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:26:19.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:19.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:19.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:19.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:20.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:26:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:26:20.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:20.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:20.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:20.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:21.059 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:26:21.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:26:21.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:21.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:21.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:21.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:22.015 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:26:22.493 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:26:22.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:22.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:22.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:22.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:22.972 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:26:23.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:26:23.925 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:26:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:26:24.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:26:25.359 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:26:25.838 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:26:26.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:26.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:26.238 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:26:26.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:26.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:26.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:26.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:26.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:26.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:26.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:26.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:26.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:26.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:26.247 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:26.247 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:26.247 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:31.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:31.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:31.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:31.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:31.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:31.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:31.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:31.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:31.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:31.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:31.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:31.267 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:31.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:31.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:31.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:31.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:31.268 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:31.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:31.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:31.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:31.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:31.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:31.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:31.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:31.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:31.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:31.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:31.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:31.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:31.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:31.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:31.280 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:31.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:31.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:31.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:31.282 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:31.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:36.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:36.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:36.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:36.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:36.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:36.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:36.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:36.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:36.300 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:36.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:36.300 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:36.303 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:36.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:36.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:36.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:36.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:36.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:36.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:36.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:36.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:36.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:36.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:36.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:36.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:36.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:36.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:36.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:36.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:36.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:36.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:36.314 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:36.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:36.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:26:36.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:26:36.833 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:26:36.834 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:26:36.836 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:26:36.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:26:36.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:36.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:36.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:26:36.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:36.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:26:36.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:26:36.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:26:36.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:26:36.847 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:26:36.847 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:26:36.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:36.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:37.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:26:37.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:37.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:37.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:37.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:37.758 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:26:38.236 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:26:38.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:38.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:38.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:38.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:38.714 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:26:39.193 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:26:39.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:39.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:39.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:39.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:39.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:26:40.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:26:40.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:40.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:40.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:40.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:40.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:26:41.107 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:26:41.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:41.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:41.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:41.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:41.585 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:26:42.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:26:42.541 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:26:43.019 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:26:43.497 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:26:43.975 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:26:44.454 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:26:44.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:44.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:44.852 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:26:44.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:44.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:44.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:44.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:44.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:44.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:44.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:44.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:44.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:44.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:44.859 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:44.859 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:26:49.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:49.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:49.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:49.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:49.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:49.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:49.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:49.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:49.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:49.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:49.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:49.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:49.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:49.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:49.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:49.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:49.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:49.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:49.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:49.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:49.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:49.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:49.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:49.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:49.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:49.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:49.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:49.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:49.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:49.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:49.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:49.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:49.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:49.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:49.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:49.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:49.892 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:49.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:49.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:49.894 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:26:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:26:54.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:26:54.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:54.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:54.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:54.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:54.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:26:54.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:54.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:54.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:26:54.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:26:54.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:26:54.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:26:54.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:54.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:54.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:26:54.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:26:54.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:26:54.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:26:54.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:26:54.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:26:54.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:54.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:54.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:26:54.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:26:54.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:26:54.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:54.923 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:26:54.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:26:54.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:26:54.926 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:26:54.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:26:54.927 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:26:54.927 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:26:54.927 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:26:54.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:26:54.932 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:26:55.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:26:55.446 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:26:55.447 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:26:55.448 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:26:55.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:26:55.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:26:55.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:26:55.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:26:55.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:55.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:26:55.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:26:55.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:26:55.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:26:55.461 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:26:55.461 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:26:55.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:55.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:26:55.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:26:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:55.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:55.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:55.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:56.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:26:56.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:26:56.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:56.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:57.329 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:26:57.808 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:26:57.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:57.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:57.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:57.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:58.286 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:26:58.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:26:58.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:58.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:58.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:26:58.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:59.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:26:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:26:59.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:26:59.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:26:59.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:26:59.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:00.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:27:00.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:27:01.156 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:27:01.634 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:27:02.112 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:27:02.590 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:27:03.069 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:27:03.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:03.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:03.466 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:27:03.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:03.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:03.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:03.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:03.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:03.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:03.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:03.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:03.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:03.470 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:03.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:08.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:08.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:08.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:08.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:08.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:08.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:08.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:08.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:08.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:08.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:08.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:08.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:08.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:08.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:08.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:08.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:08.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:08.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:08.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:08.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:08.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:08.486 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:08.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:08.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:08.488 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:08.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:13.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:13.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:13.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:13.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:13.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:13.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:13.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:13.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:13.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:13.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:13.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:13.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:13.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:13.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:13.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:13.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:13.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:13.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:13.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:13.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:13.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:13.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:13.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:13.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:13.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:13.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:13.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:13.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:13.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:13.528 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:13.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:13.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:13.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:13.528 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:13.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:13.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:13.533 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:13.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:13.538 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:27:14.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:27:14.059 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:27:14.060 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:27:14.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:27:14.062 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:27:14.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:14.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:14.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:27:14.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:14.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:27:14.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:27:14.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:27:14.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:27:14.065 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:27:14.065 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:27:14.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:14.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:14.499 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:27:14.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:14.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:14.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:14.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:14.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:27:15.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:27:15.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:15.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:15.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:15.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:15.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:27:16.412 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:27:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:16.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:16.890 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:27:17.368 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:27:17.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:17.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:17.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:17.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:27:18.325 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:27:18.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:18.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:18.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:18.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:18.803 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:27:19.281 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:27:19.760 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:27:20.237 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:27:20.716 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:27:21.194 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:27:21.672 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:27:22.150 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:27:22.629 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:27:23.107 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:27:23.584 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:27:24.062 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:27:24.540 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:27:25.019 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:27:25.497 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:27:25.975 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:27:26.453 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:27:26.931 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:27:27.410 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:27:27.888 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:27:28.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:28.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:28.070 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:27:28.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:28.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:28.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:28.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:28.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:28.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:28.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:28.073 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:28.073 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3102 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:27:33.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:33.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:33.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:33.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:33.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:33.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:33.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:33.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:33.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:33.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:33.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:33.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:33.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:33.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:33.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:33.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:33.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:33.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:33.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:33.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:33.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:33.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:33.100 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:33.100 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:33.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:33.100 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:33.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:33.100 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:33.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:33.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:33.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:33.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:33.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:33.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:33.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:33.105 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:33.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:33.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:33.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:33.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:33.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:33.108 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:38.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:38.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:38.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:38.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:38.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:38.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:38.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:38.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:38.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:38.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:38.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:38.133 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:38.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:38.133 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:38.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:38.134 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:38.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:38.134 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:38.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:38.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:38.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:38.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:38.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:38.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:38.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:38.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:38.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:38.142 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:38.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:38.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:38.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:38.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:38.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:38.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:38.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:38.149 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:38.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:38.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:27:38.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:27:38.676 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:27:38.678 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:27:38.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:27:38.680 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:27:38.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:38.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:38.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:27:38.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:38.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:27:38.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:27:38.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:27:38.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:27:38.725 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:27:38.726 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:27:38.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:38.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:27:39.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:39.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:39.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:39.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:39.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:27:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:27:40.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:40.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:40.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:40.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:40.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:27:41.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:27:41.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:41.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:41.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:41.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:27:41.984 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:27:42.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:42.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:42.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:42.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:42.463 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:27:42.941 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:27:43.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:43.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:43.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:43.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:43.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:27:43.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:27:44.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:27:44.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:27:45.333 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:27:45.812 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:27:46.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:27:46.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:46.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:46.730 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:27:46.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:46.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:46.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:46.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:46.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:46.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:46.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:46.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:46.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:46.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:46.735 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:51.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:51.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:51.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:51.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:51.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:51.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:51.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:51.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:51.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:51.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:51.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:51.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:51.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:51.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:51.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:51.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:51.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:51.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:51.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:51.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:51.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:51.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:51.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:51.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:51.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:51.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:51.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:51.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:51.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:51.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:51.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:51.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:51.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:51.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:51.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:51.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:51.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:51.780 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:51.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:51.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:51.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:51.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:51.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:51.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:51.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:51.783 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:27:56.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:27:56.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:27:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:56.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:56.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:56.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:27:56.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:56.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:56.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:27:56.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:27:56.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:27:56.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:27:56.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:56.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:56.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:27:56.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:27:56.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:27:56.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:27:56.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:27:56.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:27:56.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:56.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:56.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:27:56.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:27:56.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:27:56.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:56.810 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:27:56.810 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:27:56.810 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:27:56.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:27:56.815 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:27:56.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:27:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:27:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:27:56.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:27:57.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:27:57.330 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:27:57.331 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:27:57.332 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:27:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:27:57.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:27:57.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:27:57.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:27:57.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:27:57.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:27:57.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:27:57.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:27:57.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:27:57.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:27:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:57.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:58.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:27:58.737 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:27:58.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:58.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:58.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:58.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:27:59.215 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:27:59.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:27:59.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:27:59.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:27:59.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:27:59.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:00.172 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:28:00.650 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:28:00.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:00.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:00.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:00.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:01.124 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:28:01.599 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:28:01.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:01.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:01.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:01.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:02.077 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:28:02.554 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:28:03.031 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:28:03.509 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:28:03.987 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:28:04.464 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:28:04.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:28:05.421 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:28:05.898 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:28:06.376 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:28:06.853 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:28:07.331 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:28:07.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:28:07.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:28:07.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:07.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:07.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:07.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:07.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:07.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:07.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:07.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:07.357 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:12.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:12.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:12.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:12.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:12.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:12.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:12.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:12.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:12.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:12.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:12.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:12.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:12.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:12.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:12.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:12.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:12.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:12.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:12.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:12.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:12.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:12.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:12.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:12.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:12.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:12.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:12.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:12.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:12.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:12.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:12.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:12.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:12.390 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:12.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:12.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:12.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:12.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:12.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:12.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:12.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:12.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:12.392 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:17.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:17.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:17.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:17.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:17.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:17.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:17.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:17.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:17.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:17.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:17.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:17.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:17.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:17.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:17.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:17.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:17.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:17.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:17.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:17.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:17.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:17.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:17.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:17.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:17.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:17.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:17.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:17.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:17.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:17.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:17.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:17.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:17.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:17.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:17.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:17.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:17.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:17.432 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:17.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:17.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:28:17.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:28:17.959 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:28:17.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:28:17.960 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:28:17.961 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:28:17.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:28:17.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:28:17.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:28:17.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:28:17.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:28:17.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:28:17.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:28:17.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:28:17.964 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:28:17.964 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2025-12-12 05:28:17.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:28:17.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:28:18.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:28:18.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:18.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:18.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:18.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:18.877 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:28:19.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:28:19.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:19.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:19.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:19.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:19.833 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:28:20.311 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:28:20.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:20.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:20.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:20.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:20.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:28:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:28:21.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:21.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:21.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:21.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:21.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:28:22.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:28:22.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:22.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:22.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:22.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:22.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:28:23.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:28:23.658 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:28:24.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:28:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:28:25.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:28:25.571 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:28:26.049 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:28:26.527 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:28:27.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:28:27.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:28:27.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:28:28.440 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:28:28.919 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:28:28.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:28:28.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:28:28.970 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:28:28.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:28.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:28.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:28.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:28.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:28.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:28.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:28.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:28.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:28.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:28.977 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:33.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:33.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:33.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:33.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:33.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:33.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:33.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:33.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:33.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:33.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:33.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:34.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:34.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:34.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:34.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:34.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:34.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:34.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:34.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:34.011 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:34.011 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:34.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:34.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:34.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:34.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:34.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:34.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:34.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:34.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:34.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:34.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:34.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:34.016 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:34.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:34.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:34.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:34.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:34.023 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:34.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:34.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:34.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:34.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:34.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:34.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:34.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:34.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:34.026 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:39.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:39.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:39.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:39.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:39.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:39.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:39.047 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:39.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:39.047 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:39.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:39.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:39.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:39.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:39.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:39.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:39.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:39.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:39.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:39.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:39.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:39.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:39.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:39.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:39.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:39.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:39.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:39.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:39.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:39.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:39.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:39.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:39.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:39.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:39.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:39.069 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:39.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:39.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:28:39.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:28:39.595 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:28:39.597 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:28:39.598 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:28:39.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:28:40.034 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:28:40.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:40.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:40.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:40.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:40.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:28:40.991 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:28:41.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:41.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:41.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:41.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:41.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:28:41.947 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:28:42.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:42.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:42.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:42.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:42.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:28:42.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:28:43.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:43.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:43.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:43.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:43.382 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:28:43.860 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:28:44.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:44.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:44.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:44.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:44.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:28:44.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:28:45.297 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:28:45.775 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:28:46.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:28:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:28:47.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:28:47.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:28:48.169 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:28:48.648 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:28:49.126 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:28:49.605 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:28:49.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:28:49.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:28:49.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:28:49.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:28:49.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:49.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:49.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:49.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:49.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:49.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:49.608 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:54.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:54.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:54.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:54.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:54.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:54.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:54.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:54.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:54.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:54.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:54.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:54.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:54.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:54.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:54.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:54.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:54.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:54.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:54.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:54.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:54.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:54.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:54.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:54.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:54.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:54.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:54.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:54.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:54.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:54.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:54.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:54.637 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:54.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:54.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:54.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:54.639 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:28:59.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:28:59.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:28:59.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:59.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:59.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:59.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:59.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:28:59.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:59.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:59.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:28:59.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:28:59.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:28:59.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:28:59.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:59.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:59.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:28:59.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:28:59.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:28:59.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:28:59.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:28:59.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:28:59.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:59.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:59.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:28:59.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:28:59.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:28:59.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:28:59.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:28:59.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:28:59.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:59.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:28:59.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:28:59.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:28:59.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:28:59.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:28:59.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:28:59.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:28:59.721 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:28:59.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:28:59.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:28:59.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:28:59.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:29:00.207 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:29:00.250 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:29:00.252 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:29:00.254 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:29:00.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:29:00.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:29:00.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:00.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:00.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:00.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:29:01.640 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:29:01.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:01.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:01.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:01.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:02.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:29:02.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:29:02.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:02.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:03.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:29:03.556 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:29:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:03.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:03.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:04.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:29:04.513 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:29:04.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:04.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:04.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:04.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:29:05.470 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:29:05.948 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:29:06.425 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:29:06.904 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:29:07.383 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:29:07.861 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:29:08.338 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:29:08.809 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:29:09.287 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:29:09.764 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:29:10.243 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:29:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:29:11.200 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:29:11.678 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:29:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:29:12.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:12.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:12.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:12.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:12.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:12.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:12.269 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:29:12.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:17.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:17.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:17.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:17.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:17.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:17.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:17.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:17.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:17.288 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:17.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:17.288 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:29:17.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:29:17.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:29:17.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:17.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:17.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:17.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:29:17.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:17.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:29:17.297 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:29:17.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:29:17.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:17.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:17.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:17.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:29:17.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:17.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:29:17.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:29:17.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:29:17.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:17.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:17.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:17.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:29:17.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:17.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:29:17.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:29:17.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:29:17.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:29:17.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:29:17.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:29:17.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:29:17.307 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:29:17.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:17.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:17.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:17.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:29:17.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:29:17.831 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:29:17.833 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:29:17.835 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:29:17.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:29:17.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:17.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:17.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:29:17.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:29:17.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:29:17.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:29:17.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:29:17.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:29:18.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:29:18.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:18.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:18.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:18.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:18.749 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:29:19.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:29:19.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:19.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:19.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:19.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:19.704 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:29:20.182 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:29:20.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:20.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:20.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:20.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:20.659 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:29:21.136 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:29:21.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:21.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:29:22.092 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:29:22.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:22.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:22.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:22.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:22.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:29:23.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:29:23.525 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:29:24.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:29:24.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:29:24.959 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:29:25.437 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:29:25.915 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:29:26.393 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:29:26.871 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:29:27.349 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:29:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:29:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:29:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:29:28.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:28.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:28.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:28.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:28.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:28.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:28.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:28.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:28.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:28.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:28.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:28.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:28.901 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:29:33.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:33.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:33.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:33.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:33.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:33.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:33.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:33.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:33.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:33.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:33.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:29:33.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:29:33.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:29:33.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:33.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:33.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:33.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:29:33.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:33.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:29:33.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:29:33.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:29:33.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:33.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:33.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:33.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:29:33.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:33.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:29:33.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:29:33.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:29:33.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:33.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:33.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:33.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:29:33.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:33.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:29:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:29:33.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:29:33.935 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:29:33.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:29:34.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:29:34.459 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:29:34.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:29:34.461 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:29:34.463 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:29:34.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:34.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:34.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:29:34.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:29:34.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:29:34.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:29:34.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:29:34.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:29:34.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:29:34.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:34.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:34.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:34.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:35.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:29:35.856 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:29:35.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:35.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:35.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:35.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:36.334 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:29:36.811 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:29:36.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:36.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:36.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:36.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:37.289 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:29:37.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:29:37.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:37.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:37.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:37.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:38.245 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:29:38.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:29:38.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:38.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:38.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:38.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:39.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:29:39.679 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:29:40.157 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:29:40.635 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:29:41.113 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:29:41.591 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:29:42.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:29:42.547 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:29:43.026 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:29:43.504 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:29:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:29:44.459 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:29:44.937 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:29:45.414 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:29:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:29:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:29:46.845 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:29:47.323 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:29:47.801 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:29:48.279 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:29:48.757 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:29:49.235 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:29:49.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:49.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:49.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:49.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:49.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:49.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:49.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:49.527 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3328 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3328 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3328 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:49.527 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3329 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:29:54.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:54.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:54.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:54.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:54.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:54.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:54.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:54.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:54.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:54.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:29:54.543 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:29:54.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:29:54.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:29:54.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:54.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:54.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:54.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:29:54.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:29:54.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:29:54.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:29:54.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:29:54.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:54.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:54.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:54.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:29:54.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:29:54.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:29:54.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:29:54.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:29:54.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:54.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:29:54.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:29:54.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:29:54.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:29:54.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:29:54.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:29:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:29:54.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:29:54.562 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:29:54.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:29:54.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:29:55.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:29:55.087 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:29:55.089 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:29:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:29:55.090 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:55.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:29:55.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:29:55.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:29:55.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:29:55.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:29:55.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:29:55.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:29:55.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:29:55.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:29:55.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:29:55.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:29:55.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:29:55.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:29:55.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:29:55.157 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:29:55.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:00.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:00.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:00.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:00.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:00.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:00.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:00.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:00.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:00.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:00.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:00.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:30:00.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:30:00.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:30:00.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:00.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:00.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:00.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:30:00.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:00.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:30:00.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:30:00.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:30:00.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:00.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:00.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:00.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:30:00.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:00.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:00.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:30:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:00.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:30:00.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:30:00.188 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:30:00.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:30:00.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:00.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:30:00.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:30:00.711 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:30:00.713 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:30:00.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:00.715 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:30:00.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:00.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:00.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:00.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:00.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:00.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:00.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:00.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:00.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:00.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:00.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:00.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:00.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:00.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:00.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:00.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:00.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:00.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:00.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:00.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:00.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:00.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:00.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:00.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:00.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:00.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:00.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:00.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:00.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:00.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:00.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:01.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:01.006 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:30:01.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.151 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:30:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:01.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:01.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:01.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.199 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:01.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:01.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:01.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:01.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:01.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:01.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:01.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:01.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:01.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:01.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:01.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:01.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:01.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:01.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:01.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:01.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:01.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:01.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:01.618 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:01.618 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:30:01.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:01.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:30:02.105 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:30:02.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:02.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:02.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:02.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:02.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:02.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:02.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:02.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:02.429 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:02.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:02.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:02.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:02.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:02.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:02.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:02.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:02.448 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:30:02.448 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:30:02.448 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:30:02.449 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:30:02.449 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:30:02.449 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:30:07.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:07.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:07.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:07.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:07.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:07.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:07.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:07.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:07.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:07.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:07.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:30:07.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:30:07.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:30:07.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:07.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:07.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:07.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:30:07.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:07.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:30:07.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:30:07.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:30:07.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:07.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:07.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:07.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:30:07.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:07.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:30:07.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:30:07.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:30:07.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:07.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:07.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:30:07.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:07.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:30:07.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:30:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:30:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:30:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:30:07.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:30:07.485 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:30:07.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:07.489 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:30:07.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:30:08.011 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:30:08.013 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:30:08.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:08.016 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:30:08.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:08.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:08.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:08.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:08.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:08.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:08.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:08.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:08.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:08.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:08.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:08.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:08.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:08.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:08.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:08.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:08.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:30:08.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:08.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:08.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:08.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:08.927 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:30:09.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:30:09.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:09.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:09.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:09.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:30:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:30:10.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:10.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:30:11.319 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:30:11.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:11.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:30:12.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:30:12.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:12.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:12.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:12.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:12.755 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:30:13.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:13.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:13.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:13.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:13.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:13.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:13.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:13.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:13.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:13.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:13.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:13.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:13.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:13.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:13.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:13.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:13.174 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:13.174 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:30:13.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:13.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:13.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:30:13.711 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:30:14.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:30:14.668 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:30:15.147 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:30:15.625 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:30:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:30:16.582 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:30:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:30:17.539 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:30:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:30:18.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:18.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:18.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:18.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:18.185 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:18.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:18.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:18.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:18.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:18.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:18.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:18.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:18.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:18.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:18.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:18.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:18.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:18.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:18.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:18.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:18.490 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:30:18.969 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:30:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:30:19.926 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:30:20.404 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:30:20.882 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:30:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:30:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:30:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:30:22.793 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:30:23.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:23.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:23.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:23.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:23.272 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:30:23.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:23.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:23.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:23.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:23.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:23.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:23.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:23.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:23.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:23.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:23.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:23.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:23.317 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:23.317 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:30:23.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:23.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:23.748 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:30:24.226 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:30:24.704 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:30:25.182 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:30:25.661 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:30:26.140 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:30:26.618 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:30:27.097 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:30:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:30:28.054 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:30:28.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:28.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:28.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:28.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:28.328 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:28.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:28.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:28.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:28.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:28.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:28.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:28.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:28.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:28.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:28.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:28.338 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:30:33.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:33.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:33.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:33.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:33.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:33.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:33.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:33.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:33.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:33.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:33.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:30:33.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:30:33.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:30:33.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:33.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:33.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:33.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:30:33.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:33.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:30:33.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:30:33.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:30:33.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:33.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:33.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:33.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:30:33.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:33.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:30:33.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:30:33.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:30:33.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:33.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:33.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:33.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:30:33.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:33.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:30:33.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:30:33.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:30:33.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:30:33.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:30:33.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:30:33.374 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:30:33.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:33.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:30:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:30:33.897 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:30:33.898 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:30:33.900 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:30:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:33.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:33.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:33.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:33.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:33.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:33.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:33.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:33.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:33.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:33.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:33.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:33.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:33.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:33.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:33.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:34.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:30:34.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:34.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:34.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:30:35.296 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:30:35.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:35.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:35.774 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:30:36.252 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:30:36.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:36.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:36.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:30:37.208 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:30:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:37.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:37.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:37.687 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:30:38.165 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:30:38.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:38.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:38.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:38.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:38.643 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:30:38.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:38.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:38.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:38.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:38.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:38.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:38.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:38.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:38.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:38.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:38.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:38.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:38.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:38.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:38.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:39.017 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:39.017 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:30:39.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:39.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:39.121 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:30:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:30:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:30:40.556 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:30:41.035 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:30:41.513 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:30:41.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:30:42.470 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:30:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:30:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:30:43.904 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:30:44.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:44.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:44.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:44.027 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:44.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:44.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:44.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:44.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:44.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:44.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:44.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:44.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:44.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:44.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:44.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:44.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:44.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:44.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:44.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:44.381 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:30:44.857 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:30:45.335 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:30:45.813 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:30:46.291 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:30:46.769 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:30:47.248 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:30:47.726 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:30:48.203 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:30:48.681 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:30:49.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:49.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:49.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:49.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:49.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:49.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:49.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:49.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:49.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:49.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:49.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:49.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:49.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:49.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:49.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:49.151 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:30:49.151 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:30:49.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:49.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:49.158 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:30:49.636 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:30:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:30:50.593 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:30:51.072 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:30:51.550 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:30:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:30:52.507 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:30:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:30:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:30:53.941 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:30:54.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:54.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:54.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:54.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:54.161 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:30:54.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:30:54.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:30:54.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:30:54.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:30:54.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:54.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:54.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:54.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:54.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:54.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:54.178 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:30:59.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:30:59.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:30:59.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:59.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:59.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:59.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:59.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:30:59.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:59.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:59.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:30:59.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:30:59.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:30:59.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:30:59.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:59.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:59.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:30:59.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:30:59.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:30:59.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:30:59.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:30:59.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:30:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:59.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:59.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:30:59.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:30:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:30:59.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:30:59.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:30:59.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:30:59.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:59.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:30:59.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:30:59.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:30:59.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:30:59.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:30:59.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:30:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:30:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:30:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:30:59.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:30:59.211 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:30:59.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:30:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:30:59.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:30:59.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:30:59.732 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:30:59.732 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:30:59.733 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:30:59.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:59.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:59.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:59.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:59.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:30:59.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:30:59.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:30:59.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:30:59.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:59.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:59.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:59.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:30:59.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:30:59.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:30:59.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:30:59.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:30:59.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:00.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:31:00.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:00.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:00.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:00.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:00.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:31:01.134 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:31:01.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:01.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:01.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:01.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:01.612 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:31:02.090 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:31:02.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:02.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:02.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:02.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:02.568 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:31:03.047 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:31:03.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:03.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:03.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:03.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:03.525 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:31:04.003 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:31:04.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:04.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:04.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:04.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:04.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:31:04.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:04.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:04.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:04.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:04.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:04.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:04.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:04.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:04.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:04.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:04.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:04.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:04.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:04.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:04.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:04.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:04.857 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:04.857 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:31:04.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:04.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:04.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:31:05.437 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:31:05.916 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:31:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:31:06.874 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:31:07.351 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:31:07.829 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:31:08.308 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:31:08.786 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:31:09.265 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:31:09.744 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:31:09.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:09.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:09.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:09.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:09.865 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:09.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:09.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:09.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:09.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:09.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:09.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:09.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:09.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:09.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:09.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:09.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:09.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:09.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:09.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:09.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:09.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:10.222 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:31:10.701 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:31:11.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:31:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:31:12.135 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:31:12.613 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:31:13.090 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:31:13.568 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:31:14.045 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:31:14.523 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:31:14.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:14.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:14.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:14.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:14.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:14.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:14.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:14.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:14.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:14.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:14.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:14.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:14.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:14.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:14.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:14.993 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:14.993 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:31:14.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:14.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:15.000 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:31:15.478 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:31:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:31:16.435 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:31:16.913 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:31:17.391 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:31:17.870 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:31:18.349 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:31:18.827 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:31:19.306 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:31:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:31:19.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:19.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:20.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:20.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:20.004 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:20.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:20.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:20.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:20.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:20.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:20.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:20.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:20.018 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:20.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:31:25.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:25.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:25.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:25.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:25.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:25.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:25.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:25.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:25.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:25.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:25.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:31:25.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:31:25.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:31:25.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:25.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:25.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:25.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:31:25.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:25.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:25.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:31:25.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:25.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:25.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:31:25.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:25.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:31:25.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:31:25.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:31:25.054 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:31:25.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:25.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:25.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:31:25.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:31:25.585 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:31:25.587 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:31:25.589 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:31:25.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:25.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:25.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:25.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:25.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:25.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:25.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:25.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:25.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:25.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:25.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:25.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:25.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:25.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:25.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:25.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:25.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:26.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:31:26.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:26.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:26.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:26.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:26.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:31:26.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:31:27.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:27.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:27.453 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:31:27.931 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:31:28.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:28.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:28.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:28.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:28.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:31:28.888 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:31:29.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:29.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:29.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:29.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:29.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:31:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:31:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:30.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:30.323 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:31:30.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:30.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:30.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:30.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:30.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:30.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:30.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:30.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:30.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:30.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:30.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:30.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:30.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:30.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:30.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:30.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:30.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:30.742 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:31:30.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:30.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:30.799 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:31:31.278 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:31:31.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:31:32.235 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:31:32.714 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:31:33.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:31:33.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:31:34.147 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:31:34.620 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:31:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:31:35.577 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:31:35.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:35.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:35.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:35.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:35.752 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:35.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:35.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:35.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:35.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:35.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:35.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:35.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:35.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:35.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:35.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:35.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:35.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:35.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:35.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:35.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:35.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:31:36.533 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:31:37.011 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:31:37.489 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:31:37.967 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:31:38.445 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:31:38.923 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:31:39.401 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:31:39.879 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:31:40.356 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:31:40.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:40.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:40.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:40.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:40.834 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:31:40.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:40.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:40.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:40.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:40.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:40.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:40.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:40.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:40.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:40.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:40.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:40.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:40.879 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:40.879 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:31:40.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:40.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:31:41.789 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:31:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:31:42.745 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:31:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:31:43.702 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:31:44.180 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:31:44.659 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:31:45.131 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:31:45.609 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:31:45.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:45.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:45.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:45.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:45.890 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:45.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:45.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:45.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:45.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:45.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:45.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:45.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:45.897 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:31:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:50.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:50.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:50.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:50.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:50.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:50.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:50.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:50.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:50.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:50.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:50.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:31:50.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:31:50.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:31:50.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:50.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:50.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:50.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:31:50.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:50.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:31:50.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:31:50.927 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:31:50.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:50.927 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:50.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:50.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:31:50.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:50.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:31:50.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:31:50.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:31:50.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:50.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:50.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:50.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:31:50.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:50.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:31:50.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:31:50.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:31:50.936 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:31:50.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:50.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:31:51.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:31:51.461 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:31:51.463 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:31:51.465 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:31:51.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:51.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:51.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:51.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:51.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:51.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:51.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:51.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:51.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:51.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:51.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:51.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:51.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:51.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:51.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:51.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:51.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:51.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:51.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:51.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:51.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:51.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:51.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:51.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:51.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:51.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:51.836 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:31:51.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:51.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:31:51.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:51.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:51.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:51.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:52.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:52.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:52.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:52.229 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:52.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:52.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:52.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:52.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:52.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:52.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:52.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:52.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:52.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:52.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:52.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:52.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:52.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:52.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:52.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:52.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:52.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:31:52.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:31:52.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:52.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:52.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:52.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:53.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:53.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:53.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:53.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:53.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:53.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:53.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:53.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:53.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:53.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:53.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:53.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:53.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:53.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:53.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:53.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:53.087 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:31:53.087 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:31:53.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:53.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:53.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:31:53.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:53.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:53.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:53.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:53.652 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:31:53.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:53.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:53.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:53.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:31:53.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:53.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:53.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:53.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:53.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:53.660 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:31:53.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:58.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:31:58.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:31:58.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:58.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:58.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:58.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:58.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:31:58.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:58.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:58.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:31:58.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:31:58.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:31:58.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:31:58.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:58.687 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:58.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:31:58.687 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:31:58.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:31:58.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:31:58.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:31:58.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:31:58.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:58.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:58.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:31:58.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:31:58.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:31:58.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:58.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:31:58.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:31:58.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:31:58.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:31:58.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:31:58.704 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:31:58.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:31:58.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:31:59.193 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:31:59.230 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:31:59.232 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:31:59.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:59.234 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:31:59.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:59.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:59.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:59.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:31:59.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:31:59.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:31:59.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:31:59.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:59.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:59.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:59.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:31:59.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:31:59.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:31:59.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:31:59.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:59.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:31:59.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:31:59.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:31:59.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:31:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:31:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:32:00.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:32:00.628 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:32:00.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:32:00.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:32:00.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:32:00.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:32:01.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:32:01.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:32:01.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:32:01.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:32:01.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:32:01.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:32:02.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:32:02.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:32:02.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:32:02.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:32:02.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:32:02.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:32:03.019 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:32:03.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:32:03.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:32:03.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:32:03.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:32:03.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:32:03.976 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:32:04.454 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:32:04.933 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:32:05.412 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:32:05.890 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:32:06.368 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:32:06.846 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:32:07.324 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:32:07.802 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:32:08.280 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:32:08.758 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:32:09.236 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:32:09.715 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:32:10.192 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:32:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:32:11.149 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:32:11.627 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:32:12.105 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:32:12.583 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:32:13.061 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:32:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:32:14.018 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:32:14.497 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:32:14.975 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:32:15.453 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:32:15.931 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:32:16.409 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:32:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:32:17.365 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:32:17.843 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:32:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:32:18.800 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:32:19.278 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:32:19.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:19.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:19.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:19.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:19.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:19.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:19.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:19.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:19.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:19.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:19.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:19.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:19.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:32:19.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:32:19.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:32:19.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:32:19.368 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:32:19.368 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:32:19.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:19.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:19.756 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:32:20.235 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:32:20.713 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:32:21.191 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:32:21.670 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:32:22.149 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:32:22.628 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:32:23.107 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:32:23.585 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:32:24.064 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:32:24.543 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:32:25.022 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:32:25.501 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:32:25.980 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:32:26.459 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:32:26.938 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:32:27.417 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:32:27.896 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:32:28.375 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:32:28.854 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:32:29.332 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:32:29.811 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:32:30.291 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:32:30.769 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:32:31.248 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:32:31.727 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:32:32.204 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:32:32.683 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:32:33.163 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:32:33.641 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:32:34.121 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:32:34.599 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:32:35.078 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:32:35.557 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:32:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:32:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:32:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:32:37.473 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:32:37.951 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:32:38.429 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:32:38.901 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:32:39.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:39.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:39.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:39.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:39.376 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:32:39.377 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 05:32:39.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:39.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:39.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:39.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:39.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:39.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:39.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:39.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:32:39.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:32:39.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:32:39.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:32:39.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:32:39.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:32:39.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:39.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:39.853 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 05:32:40.331 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 05:32:40.809 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 05:32:41.287 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 05:32:41.765 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 05:32:42.243 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 05:32:42.721 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 05:32:43.198 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 05:32:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 05:32:44.154 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 05:32:44.631 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 05:32:45.110 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 05:32:45.588 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 05:32:46.066 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 05:32:46.543 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 05:32:47.021 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 05:32:47.499 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 05:32:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 05:32:48.455 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 05:32:48.933 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 05:32:49.411 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 05:32:49.889 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 05:32:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 05:32:50.846 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 05:32:51.324 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 05:32:51.801 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 05:32:52.279 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 05:32:52.757 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 05:32:53.235 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 05:32:53.712 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 05:32:54.191 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 05:32:54.668 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 05:32:55.146 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 05:32:55.624 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 05:32:56.102 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 05:32:56.580 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 05:32:57.058 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 05:32:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 05:32:58.013 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 05:32:58.491 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 05:32:58.969 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 05:32:59.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:59.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:59.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:59.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:59.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:59.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:59.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:59.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:32:59.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:32:59.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:32:59.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:32:59.446 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 05:32:59.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:59.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:32:59.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:32:59.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:32:59.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:32:59.492 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:32:59.492 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:32:59.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:59.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:32:59.924 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 05:33:00.397 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 05:33:00.875 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 05:33:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 05:33:01.832 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 05:33:02.310 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 05:33:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 05:33:03.266 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 05:33:03.744 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 05:33:04.222 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 05:33:04.700 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 05:33:05.179 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 05:33:05.658 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 05:33:06.136 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 05:33:06.615 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 05:33:07.092 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 05:33:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 05:33:08.048 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 05:33:08.525 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 05:33:09.003 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 05:33:09.481 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 05:33:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 05:33:10.437 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 05:33:10.916 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 05:33:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 05:33:11.873 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 05:33:12.351 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 05:33:12.829 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 05:33:13.307 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 05:33:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 05:33:14.263 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 05:33:14.741 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 05:33:15.228 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 05:33:15.706 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 05:33:16.184 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 05:33:16.663 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 05:33:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 05:33:17.619 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 05:33:18.097 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 05:33:18.575 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 05:33:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 05:33:19.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:19.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:19.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:19.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:19.504 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:19.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:19.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:19.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:19.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:19.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:19.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:19.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:19.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:19.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:19.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:19.523 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:33:19.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:33:19.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:33:19.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:33:19.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:33:19.523 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=17239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:33:24.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:24.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:24.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:24.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:24.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:24.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:24.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:24.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:24.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:24.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:24.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:33:24.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:33:24.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:33:24.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:24.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:24.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:24.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:33:24.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:24.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:33:24.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:33:24.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:33:24.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:24.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:24.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:24.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:33:24.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:24.551 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:33:24.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:33:24.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:33:24.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:24.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:24.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:24.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:33:24.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:24.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:33:24.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:33:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:33:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:33:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:33:24.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:33:24.564 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:33:24.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:24.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:24.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:24.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:24.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:24.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:24.567 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:33:24.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:24.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:29.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:29.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:29.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:29.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:29.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:29.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:29.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:29.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:29.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:29.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:33:29.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:33:29.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:33:29.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:29.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:29.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:29.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:33:29.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:29.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:33:29.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:33:29.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:33:29.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:29.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:29.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:29.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:33:29.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:29.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:33:29.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:33:29.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:33:29.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:29.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:29.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:29.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:33:29.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:29.596 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:33:29.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:33:29.601 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:33:29.601 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:33:29.601 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:29.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:29.606 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:33:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:33:30.119 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:33:30.120 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:33:30.120 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:33:30.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:30.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:30.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:30.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:30.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:33:30.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:30.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:30.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:30.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:30.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:30.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:30.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:30.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:30.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:30.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:30.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:30.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:30.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:30.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:30.984 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:30.984 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:33:30.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:30.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.037 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:33:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:31.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:31.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:31.293 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:31.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:31.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:31.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:31.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:31.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:31.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:31.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:31.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:31.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:31.361 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:33:31.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:33:31.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:31.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:31.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:31.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:31.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:31.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:31.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:31.661 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:31.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:31.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:31.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:31.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:31.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:31.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:31.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:31.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:31.695 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:31.695 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:33:31.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:31.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:31.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:31.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:31.983 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:31.990 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:33:32.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:32.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:32.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:32.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:32.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:32.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:32.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:32.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:32.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:32.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:32.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:32.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:32.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:32.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:32.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:32.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:32.467 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:33:32.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:32.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:32.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:32.945 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:33:33.422 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:33:33.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:33.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:33.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:33.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:33.900 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:33:34.378 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:33:34.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:34.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:34.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:34.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:34.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:34.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:34.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:34.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:34.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:34.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:34.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:34.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:34.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:34.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:34.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:34.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:34.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:34.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:34.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:33:35.332 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:33:35.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:33:36.288 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:33:36.765 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:33:37.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:37.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:37.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:37.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:37.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:37.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:37.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:37.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:37.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:37.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:37.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:37.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:37.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:37.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:37.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:37.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:37.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:33:37.721 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:33:38.199 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:33:38.676 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:33:39.154 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:33:39.632 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:33:39.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:39.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:39.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:39.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:39.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:39.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:39.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:39.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:39.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:39.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:39.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:39.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:39.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:39.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:39.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:39.866 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:39.867 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:33:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:40.108 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:33:40.587 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:33:41.066 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:33:41.544 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:33:42.023 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:33:42.501 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:33:42.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:42.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:42.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:42.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:42.591 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:42.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:42.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:42.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:42.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:42.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:42.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:42.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:42.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:42.639 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:42.640 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:33:42.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:42.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:42.979 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:33:43.457 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:33:43.936 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:33:44.414 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:33:44.893 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:33:45.371 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:33:45.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:45.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:45.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:45.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:45.460 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:45.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:45.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:45.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:45.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:45.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:45.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:45.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:45.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:45.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:45.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:45.509 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:33:45.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:45.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:33:46.327 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:33:46.806 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:33:47.285 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:33:47.762 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:33:48.240 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:33:48.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:48.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:48.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:48.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:48.329 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:33:48.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:48.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:48.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:48.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:48.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:48.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:48.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:48.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:48.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:48.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:48.354 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:33:53.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:33:53.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:33:53.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:53.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:53.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:53.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:53.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:33:53.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:53.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:53.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:33:53.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:33:53.365 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:33:53.365 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:33:53.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:53.365 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:53.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:33:53.366 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:33:53.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:33:53.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:33:53.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:33:53.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:33:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:53.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:53.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:33:53.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:33:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:33:53.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:53.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:33:53.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:33:53.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:33:53.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:33:53.378 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:33:53.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:33:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:33:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:33:53.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:33:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:33:53.903 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:33:53.905 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:33:53.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:53.908 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:33:53.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:53.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:53.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:53.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:53.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:53.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:53.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:53.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:53.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:53.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:53.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:53.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:54.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:54.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:54.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:33:54.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:54.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:54.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:54.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:54.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:33:55.296 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:33:55.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:55.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:55.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:55.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:55.775 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:33:56.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:33:56.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:56.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:56.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:56.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:56.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:33:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:57.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:57.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:57.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:57.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:57.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:57.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:57.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:33:57.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:33:57.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:33:57.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:33:57.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:57.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:33:57.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:33:57.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:33:57.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:33:57.148 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:33:57.148 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:33:57.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:57.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:33:57.209 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:33:57.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:57.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:57.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:57.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:57.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:33:58.166 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:33:58.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:33:58.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:33:58.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:33:58.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:33:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:33:59.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:33:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:34:00.077 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:34:00.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:00.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:00.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:00.335 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:00.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:00.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:00.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:00.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:00.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:00.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:00.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:00.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:00.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:00.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:00.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:00.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:00.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:00.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:00.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:00.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:00.556 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:34:01.034 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:34:01.512 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:34:01.990 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:34:02.468 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:34:02.946 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:34:03.424 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:34:03.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:03.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:03.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:03.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:03.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:03.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:03.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:03.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:03.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:03.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:03.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:03.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:03.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:03.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:34:03.609 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:34:03.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:03.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:03.901 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:34:04.379 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:34:04.858 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:34:05.337 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:34:05.815 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:34:06.293 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:34:06.771 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:34:06.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:06.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:06.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:06.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:06.818 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:06.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:06.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:06.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:06.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:06.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:06.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:06.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:06.835 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:34:06.835 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:06.835 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:06.835 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:06.835 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:06.835 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=2871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:11.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:11.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:11.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:11.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:11.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:11.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:11.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:11.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:11.849 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:11.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:11.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:34:11.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:34:11.854 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:34:11.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:11.854 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:11.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:11.855 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:34:11.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:11.855 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:34:11.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:34:11.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:34:11.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:11.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:11.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:34:11.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:11.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:34:11.861 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:34:11.861 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:34:11.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:11.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:11.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:11.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:34:11.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:11.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:34:11.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:34:11.866 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:34:11.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:11.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:11.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:34:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:34:12.389 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:34:12.391 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:34:12.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:12.394 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:34:12.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:12.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:12.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:12.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:12.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:12.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:12.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:12.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:12.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:12.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:12.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:12.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:12.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:12.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:12.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:12.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:34:12.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:12.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:12.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:12.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:12.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:12.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:12.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:12.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:12.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:12.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:12.868 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:34:12.868 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:34:12.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:12.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:12.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:12.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:12.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:13.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:34:13.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:13.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:13.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:13.359 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:13.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:13.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:13.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:13.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:13.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:13.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:13.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:13.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:13.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:13.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:13.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:13.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:13.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:13.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:13.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:13.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:13.776 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:34:13.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:13.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:13.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:13.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:14.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:34:14.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:34:14.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:14.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:14.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:14.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:15.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:34:15.687 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:34:15.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:15.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:16.165 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:34:16.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:16.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:16.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:16.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:16.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:16.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:16.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:16.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:16.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:16.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:16.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:16.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:16.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:16.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:16.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:16.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:16.636 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:34:16.636 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:34:16.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:16.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:16.642 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:34:16.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:16.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:16.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:16.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:17.121 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:34:17.600 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:34:18.078 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:34:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:34:19.036 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:34:19.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:34:19.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:19.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:19.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:19.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:19.603 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:19.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:19.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:19.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:19.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:19.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:19.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:19.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:19.616 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:34:19.616 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1655 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:19.616 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1655 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:34:24.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:24.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:24.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:24.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:24.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:24.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:24.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:24.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:24.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:24.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:24.631 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:34:24.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:34:24.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:34:24.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:24.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:24.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:24.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:34:24.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:24.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:34:24.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:34:24.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:34:24.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:24.638 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:24.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:24.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:34:24.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:24.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:34:24.640 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:34:24.641 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:34:24.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:24.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:24.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:24.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:34:24.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:24.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:34:24.644 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:34:24.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:34:24.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:34:24.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:34:24.644 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:34:24.645 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:34:24.645 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:34:24.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:24.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:24.650 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:34:25.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:34:25.163 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:34:25.164 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:34:25.165 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:34:25.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:25.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:25.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:25.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:25.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:25.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:25.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:25.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:25.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:25.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:25.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:25.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:25.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:25.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:25.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:25.610 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:34:25.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:25.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:25.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:25.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:26.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:34:26.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:26.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:26.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:26.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:26.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:26.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:26.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:26.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:26.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:26.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:26.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:26.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:26.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:26.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:26.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:26.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:26.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:34:26.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:34:26.612 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:34:26.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:26.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:26.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:26.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:26.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:26.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:27.045 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:34:27.524 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:34:27.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:27.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:27.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:27.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:28.003 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:34:28.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:34:28.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:28.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:28.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:28.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:28.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:28.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:28.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:28.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:28.768 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:28.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:28.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:28.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:28.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:28.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:28.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:28.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:28.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:28.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:28.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:28.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:28.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:28.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:28.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:28.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:28.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:28.959 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:34:29.436 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:34:29.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:29.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:29.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:29.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:29.915 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:34:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:34:30.871 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:34:31.348 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:34:31.827 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:34:32.305 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:34:32.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:34:33.261 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:34:33.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:33.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:33.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:33.739 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:34:33.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:33.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:33.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:33.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:33.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:33.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:33.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:33.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:33.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:33.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:33.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:33.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:33.785 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:34:33.785 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:34:33.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:33.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:34.217 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:34:34.696 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:34:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:34:35.653 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:34:36.132 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:34:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:34:37.089 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:34:37.567 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:34:38.046 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:34:38.524 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:34:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:34:39.481 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:34:39.960 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:34:40.438 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:34:40.917 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:34:41.395 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:34:41.874 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:34:42.353 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:34:42.832 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:34:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:34:43.789 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:34:44.268 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:34:44.747 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:34:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:34:45.704 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:34:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:34:46.662 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:34:47.141 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:34:47.619 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:34:48.097 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:34:48.576 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:34:49.054 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:34:49.533 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:34:50.012 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:34:50.490 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:34:50.969 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:34:51.447 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:34:51.925 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:34:52.404 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:34:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:34:53.361 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:34:53.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:53.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:53.751 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:34:53.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:53.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:53.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:53.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:34:53.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:53.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:53.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:53.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:53.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:53.756 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:34:53.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:58.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:34:58.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:34:58.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:58.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:58.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:58.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:34:58.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:58.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:58.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:34:58.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:34:58.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:34:58.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:34:58.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:58.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:58.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:34:58.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:34:58.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:34:58.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:34:58.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:34:58.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:34:58.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:58.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:34:58.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:34:58.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:34:58.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:58.798 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:34:58.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:34:58.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:34:58.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:34:58.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:34:58.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:34:58.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:34:58.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:34:58.804 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:34:58.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:34:58.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:34:59.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:34:59.331 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:34:59.333 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:34:59.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:59.334 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:34:59.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:59.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:59.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:59.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:34:59.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:34:59.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:34:59.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:34:59.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:59.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:59.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:59.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:34:59.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:34:59.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:34:59.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:34:59.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:59.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:34:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:34:59.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:34:59.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:34:59.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:34:59.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:00.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:00.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:00.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:00.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:00.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:00.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:00.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:00.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:00.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:00.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:00.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:00.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:00.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:00.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:00.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:00.097 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:35:00.097 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:35:00.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:00.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:00.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:35:00.725 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:35:00.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:00.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:00.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:00.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:01.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:01.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:01.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:01.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:01.034 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:35:01.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:01.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:01.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:01.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:01.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:01.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:01.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:01.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:01.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:01.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:01.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:01.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:01.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:01.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:01.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:01.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:01.202 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:35:01.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:35:01.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:01.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:01.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:01.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:35:02.636 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:35:02.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:02.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:02.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:02.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:03.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:03.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:03.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:03.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:03.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:03.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:03.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:03.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:03.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:03.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:03.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:03.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:03.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:03.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:03.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:03.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:03.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:35:03.107 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:35:03.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:03.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:03.113 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:35:03.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:35:03.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:03.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:03.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:03.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:04.069 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:35:04.548 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:35:05.027 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:35:05.505 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:35:05.983 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:35:06.462 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:35:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:35:07.419 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:35:07.898 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:35:08.376 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:35:08.854 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:35:09.333 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:35:09.812 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:35:10.290 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:35:10.768 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:35:11.247 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:35:11.726 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:35:12.205 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:35:12.683 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:35:13.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:35:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:35:14.119 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:35:14.597 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:35:15.075 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:35:15.554 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:35:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:35:16.511 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:35:16.990 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:35:17.469 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:35:17.948 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:35:18.426 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:35:18.904 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:35:19.383 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:35:19.861 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:35:20.339 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:35:20.818 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:35:21.296 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:35:21.774 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:35:22.253 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:35:22.731 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:35:23.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:23.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:23.056 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:35:23.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:23.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:35:23.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:35:23.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:35:23.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:35:23.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:35:23.062 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:35:23.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:35:28.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:35:28.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:35:28.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:35:28.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:35:28.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:35:28.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:35:28.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:35:28.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:35:28.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:35:28.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:35:28.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:35:28.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:35:28.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:35:28.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:35:28.084 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:35:28.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:35:28.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:35:28.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:35:28.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:35:28.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:35:28.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:35:28.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:35:28.088 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:35:28.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:35:28.088 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:35:28.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:35:28.088 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:35:28.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:35:28.091 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:35:28.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:35:28.091 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:35:28.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:35:28.091 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:35:28.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:35:28.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:35:28.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:35:28.096 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:35:28.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:35:28.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:35:28.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:35:28.616 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:35:28.617 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:35:28.619 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:35:28.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:28.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:28.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:28.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:28.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:28.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:28.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:28.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:28.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:28.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:28.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:28.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:28.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:28.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:28.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:28.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:28.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:29.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:35:29.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:29.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:29.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:29.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:29.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:35:30.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:35:30.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:30.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:30.497 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:35:30.975 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:35:31.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:31.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:31.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:31.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:31.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:31.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:31.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:31.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:31.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:31.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:31.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:31.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:31.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:31.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:31.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:31.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:31.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:31.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:31.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:31.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:31.208 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:35:31.208 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:35:31.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:31.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:31.450 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:35:31.928 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:35:32.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:32.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:32.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:32.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:32.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:35:32.886 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:35:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:33.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:33.365 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:35:33.845 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:35:33.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:33.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:33.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:33.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:33.911 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:35:33.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:33.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:33.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:33.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:33.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:33.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:33.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:33.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:33.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:33.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:33.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:33.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:33.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:33.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:33.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:33.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:34.322 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:35:34.800 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:35:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:35:35.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:35:36.235 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:35:36.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:35:37.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:35:37.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:37.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:37.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:37.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:37.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:37.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:37.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:37.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:37.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:37.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:35:37.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:35:37.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:37.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:35:37.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:35:37.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:35:37.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:35:37.427 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:35:37.427 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:35:37.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:37.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:35:37.669 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:35:38.147 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:35:38.625 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:35:39.104 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:35:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:35:40.061 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:35:40.539 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:35:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:35:41.496 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:35:41.975 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:35:42.453 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:35:42.931 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:35:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:35:43.887 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:35:44.366 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:35:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:35:45.321 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:35:45.800 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:35:46.278 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:35:46.757 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:35:47.235 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:35:47.714 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:35:48.191 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:35:48.668 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:35:49.146 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:35:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:35:50.102 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:35:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:35:51.060 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:35:51.538 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:35:52.017 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:35:52.494 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:35:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:35:53.452 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:35:53.930 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:35:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:35:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:35:55.366 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:35:55.845 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:35:56.323 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:35:56.802 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:35:57.280 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:35:57.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:35:57.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:35:57.377 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:35:57.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:35:57.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:35:57.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:35:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:35:57.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:35:57.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:35:57.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:35:57.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:35:57.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:35:57.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:35:57.383 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:36:02.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:36:02.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:36:02.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:36:02.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:36:02.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:36:02.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:36:02.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:36:02.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:36:02.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:02.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:36:02.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:36:02.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:36:02.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:36:02.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:36:02.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:02.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:36:02.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:36:02.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:36:02.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:36:02.409 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:36:02.409 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:36:02.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:36:02.409 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:02.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:36:02.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:36:02.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:36:02.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:36:02.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:36:02.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:36:02.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:36:02.414 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:36:02.414 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:36:02.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:36:02.414 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:36:02.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:36:02.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:36:02.420 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:36:02.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:02.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:36:02.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:36:02.947 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:36:02.949 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:36:02.951 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:36:02.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:02.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:02.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:02.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:02.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:02.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:02.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:02.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:03.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:03.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:03.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:03.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:03.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:03.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:03.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:03.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:03.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:03.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:03.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:03.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:03.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:03.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:03.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:36:03.327 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:36:03.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:36:03.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:03.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:03.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:03.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:03.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:03.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.675 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:36:03.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:03.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:03.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:03.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:03.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:03.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:03.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:03.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:03.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:03.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:03.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:03.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:03.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:36:04.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:04.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:04.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:04.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:04.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:04.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:04.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:04.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:04.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:04.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:04.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:04.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:04.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:04.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:04.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:04.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:04.332 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:36:04.332 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:36:04.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:04.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:04.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:36:04.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:04.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:04.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:04.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:04.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:36:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:04.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:04.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:04.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:04.907 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:36:04.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:04.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:04.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:04.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:04.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:36:04.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:36:04.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:36:04.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:36:04.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:36:04.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:36:04.922 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:36:09.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:36:09.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:36:09.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:36:09.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:36:09.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:36:09.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:36:09.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:36:09.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:36:09.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:09.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:36:09.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:36:09.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:36:09.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:36:09.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:36:09.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:09.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:36:09.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:36:09.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:36:09.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:36:09.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:36:09.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:36:09.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:36:09.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:09.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:36:09.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:36:09.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:36:09.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:36:09.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:36:09.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:36:09.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:36:09.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:36:09.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:36:09.959 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:36:09.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:36:09.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:36:10.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:36:10.479 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:36:10.481 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:36:10.482 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:36:10.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:10.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:10.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:10.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:10.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:10.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:10.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:10.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:10.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:10.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:10.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:10.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:10.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:10.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:10.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:10.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:10.927 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:36:10.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:10.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:10.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:10.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:11.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:36:11.883 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:36:11.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:11.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:11.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:11.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:12.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:36:12.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:36:12.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:12.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:12.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:12.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:13.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:36:13.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:36:13.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:13.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:13.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:13.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:36:14.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:36:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:36:14.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:36:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:36:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:36:15.232 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:36:15.711 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:36:16.189 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:36:16.668 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:36:17.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:36:17.624 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:36:18.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:36:18.580 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:36:19.059 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:36:19.537 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:36:20.016 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:36:20.494 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:36:20.972 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:36:21.450 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:36:21.929 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:36:22.407 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:36:22.885 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:36:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:36:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:36:24.319 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:36:24.795 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:36:25.274 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:36:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:36:26.231 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:36:26.709 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:36:27.187 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:36:27.665 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:36:28.144 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:36:28.622 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:36:29.100 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:36:29.578 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:36:30.056 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:36:30.534 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:36:31.013 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:36:31.491 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:36:31.969 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:36:32.448 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:36:32.926 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:36:33.404 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:36:33.883 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:36:34.361 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:36:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:36:35.318 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:36:35.796 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:36:36.275 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:36:36.753 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:36:37.231 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:36:37.709 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:36:38.187 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:36:38.665 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:36:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:36:39.621 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:36:40.100 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:36:40.578 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:36:41.056 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:36:41.534 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:36:42.012 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:36:42.491 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:36:42.968 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:36:43.447 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:36:43.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:43.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:43.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:43.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:43.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:43.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:43.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:43.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:36:43.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:36:43.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:36:43.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:36:43.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:43.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:36:43.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:36:43.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:36:43.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:36:43.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:36:43.582 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:36:43.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:43.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:36:43.924 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:36:44.402 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:36:44.881 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:36:45.360 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:36:45.838 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:36:46.317 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:36:46.796 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:36:47.275 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:36:47.754 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:36:48.233 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:36:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:36:49.191 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:36:49.670 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:36:50.149 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:36:50.628 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 05:36:51.107 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 05:36:51.586 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 05:36:52.065 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 05:36:52.544 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 05:36:53.018 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 05:36:53.495 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 05:36:53.974 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 05:36:54.453 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 05:36:54.931 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 05:36:55.408 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 05:36:55.888 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 05:36:56.367 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 05:36:56.846 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 05:36:57.325 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 05:36:57.804 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 05:36:58.283 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 05:36:58.762 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2025-12-12 05:36:59.241 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2025-12-12 05:36:59.719 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2025-12-12 05:37:00.198 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2025-12-12 05:37:00.676 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2025-12-12 05:37:01.155 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2025-12-12 05:37:01.634 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2025-12-12 05:37:02.113 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2025-12-12 05:37:02.592 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2025-12-12 05:37:03.071 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2025-12-12 05:37:03.550 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2025-12-12 05:37:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2025-12-12 05:37:04.509 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2025-12-12 05:37:04.988 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2025-12-12 05:37:05.467 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2025-12-12 05:37:05.946 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2025-12-12 05:37:06.424 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2025-12-12 05:37:06.903 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2025-12-12 05:37:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2025-12-12 05:37:07.861 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2025-12-12 05:37:08.341 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2025-12-12 05:37:08.818 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2025-12-12 05:37:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2025-12-12 05:37:09.777 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2025-12-12 05:37:10.256 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2025-12-12 05:37:10.735 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2025-12-12 05:37:11.214 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2025-12-12 05:37:11.693 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2025-12-12 05:37:12.173 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2025-12-12 05:37:12.662 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2025-12-12 05:37:13.141 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2025-12-12 05:37:13.620 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2025-12-12 05:37:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2025-12-12 05:37:14.576 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2025-12-12 05:37:15.055 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2025-12-12 05:37:15.534 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2025-12-12 05:37:16.013 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2025-12-12 05:37:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2025-12-12 05:37:16.971 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2025-12-12 05:37:17.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:17.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:37:17.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:17.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:17.194 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:37:17.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:17.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:17.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:37:17.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:17.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:17.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:37:17.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:37:17.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:17.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:37:17.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:37:17.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:37:17.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:37:17.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:37:17.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:37:17.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:17.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:17.449 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2025-12-12 05:37:17.927 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2025-12-12 05:37:18.404 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2025-12-12 05:37:18.882 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2025-12-12 05:37:19.360 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2025-12-12 05:37:19.839 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2025-12-12 05:37:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2025-12-12 05:37:20.794 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2025-12-12 05:37:21.272 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2025-12-12 05:37:21.749 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2025-12-12 05:37:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2025-12-12 05:37:22.705 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2025-12-12 05:37:23.182 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2025-12-12 05:37:23.660 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2025-12-12 05:37:24.138 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2025-12-12 05:37:24.617 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2025-12-12 05:37:25.094 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2025-12-12 05:37:25.572 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2025-12-12 05:37:26.050 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2025-12-12 05:37:26.527 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2025-12-12 05:37:27.005 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2025-12-12 05:37:27.482 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2025-12-12 05:37:27.960 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2025-12-12 05:37:28.438 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2025-12-12 05:37:28.916 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2025-12-12 05:37:29.393 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2025-12-12 05:37:29.871 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2025-12-12 05:37:30.349 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2025-12-12 05:37:30.827 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2025-12-12 05:37:31.305 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2025-12-12 05:37:31.782 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2025-12-12 05:37:32.259 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2025-12-12 05:37:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2025-12-12 05:37:33.211 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2025-12-12 05:37:33.689 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2025-12-12 05:37:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2025-12-12 05:37:34.644 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2025-12-12 05:37:35.122 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2025-12-12 05:37:35.599 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2025-12-12 05:37:36.078 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2025-12-12 05:37:36.555 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2025-12-12 05:37:37.033 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2025-12-12 05:37:37.511 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2025-12-12 05:37:37.989 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2025-12-12 05:37:38.466 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2025-12-12 05:37:38.944 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2025-12-12 05:37:39.422 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2025-12-12 05:37:39.900 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2025-12-12 05:37:40.377 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2025-12-12 05:37:40.854 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2025-12-12 05:37:41.332 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2025-12-12 05:37:41.810 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2025-12-12 05:37:42.287 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2025-12-12 05:37:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2025-12-12 05:37:43.243 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2025-12-12 05:37:43.722 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2025-12-12 05:37:44.199 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2025-12-12 05:37:44.677 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2025-12-12 05:37:45.155 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2025-12-12 05:37:45.633 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2025-12-12 05:37:46.111 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2025-12-12 05:37:46.589 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2025-12-12 05:37:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2025-12-12 05:37:47.545 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2025-12-12 05:37:48.023 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2025-12-12 05:37:48.501 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2025-12-12 05:37:48.978 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2025-12-12 05:37:49.456 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2025-12-12 05:37:49.933 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2025-12-12 05:37:50.411 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2025-12-12 05:37:50.889 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2025-12-12 05:37:51.367 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2025-12-12 05:37:51.845 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2025-12-12 05:37:52.323 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2025-12-12 05:37:52.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:52.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:37:52.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:52.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:52.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:52.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:52.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:37:52.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:52.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:52.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:37:52.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:37:52.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:52.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:37:52.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:37:52.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:37:52.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:37:52.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:37:52.796 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:37:52.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:52.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:37:52.800 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2025-12-12 05:37:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2025-12-12 05:37:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2025-12-12 05:37:54.233 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2025-12-12 05:37:54.712 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2025-12-12 05:37:55.189 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2025-12-12 05:37:55.668 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2025-12-12 05:37:56.146 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2025-12-12 05:37:56.624 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2025-12-12 05:37:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2025-12-12 05:37:57.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:37:57.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:37:57.121 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:37:57.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:37:57.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:37:57.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:37:57.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:37:57.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:37:57.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:37:57.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:37:57.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:37:57.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:37:57.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:37:57.125 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:38:02.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:38:02.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:38:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:02.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:02.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:02.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:02.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:02.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:02.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:02.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:38:02.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:38:02.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:38:02.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:02.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:02.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:02.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:38:02.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:02.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:38:02.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:38:02.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:38:02.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:02.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:02.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:02.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:38:02.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:02.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:38:02.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:38:02.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:38:02.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:02.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:02.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:02.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:38:02.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:02.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:38:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:38:02.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:38:02.163 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:38:02.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:38:02.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:38:02.166 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:02.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:38:07.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:38:07.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:07.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:07.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:07.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:07.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:07.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:07.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:07.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:07.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:38:07.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:38:07.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:38:07.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:07.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:07.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:07.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:38:07.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:07.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:38:07.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:38:07.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:38:07.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:07.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:07.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:07.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:38:07.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:07.192 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:07.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:38:07.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:07.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:38:07.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:38:07.200 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:38:07.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:07.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:07.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:38:07.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:38:07.718 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:38:07.719 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:38:07.720 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:38:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:07.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:07.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:07.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:07.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:07.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:07.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:07.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:07.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:07.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:07.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:07.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:07.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:07.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:07.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:07.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:07.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:08.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:38:08.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:08.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:08.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:08.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:38:09.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:38:09.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:09.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:09.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:09.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:09.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:09.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:09.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:09.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:09.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:09.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:09.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:09.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:09.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:09.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:09.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:09.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:09.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:09.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:09.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:09.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:09.257 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:38:09.257 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:38:09.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:09.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:38:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:38:10.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:10.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:10.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:10.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:10.558 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:38:11.037 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:38:11.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:11.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:11.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:11.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:11.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:38:11.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:11.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:11.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:11.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:11.545 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:38:11.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:11.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:11.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:11.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:11.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:11.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:11.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:11.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:11.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:11.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:11.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:11.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:11.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:11.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:11.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:11.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:11.990 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:38:12.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:12.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:12.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:12.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:12.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:38:12.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:38:13.423 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:38:13.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:38:14.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:38:14.855 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:38:15.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:15.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:15.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:15.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:15.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:15.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:15.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:15.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:15.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:15.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:15.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:15.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:15.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:15.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:15.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:15.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:15.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:38:15.092 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:38:15.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:15.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:15.333 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:38:15.812 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:38:16.289 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:38:16.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:16.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:16.374 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:38:16.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:16.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:16.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:16.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:16.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:16.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:16.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:16.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:16.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:38:16.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:38:16.383 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:38:16.383 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1960 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:38:16.384 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1960 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:38:16.384 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1960 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:38:16.384 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1960 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:38:21.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:38:21.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:38:21.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:21.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:21.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:21.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:21.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:38:21.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:21.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:21.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:38:21.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:38:21.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:38:21.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:38:21.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:21.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:21.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:38:21.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:38:21.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:38:21.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:38:21.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:38:21.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:38:21.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:21.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:21.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:38:21.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:38:21.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:38:21.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:38:21.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:38:21.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:38:21.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:21.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:38:21.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:38:21.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:38:21.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:38:21.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:38:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:38:21.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:38:21.418 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:38:21.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:38:21.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:38:21.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:38:21.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:38:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:38:21.942 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:38:21.944 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:38:21.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:21.946 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:38:21.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:21.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:21.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:21.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:21.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:21.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:21.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:21.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:21.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:21.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:21.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:21.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:21.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:21.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:21.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:22.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:38:22.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:22.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:22.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:22.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:22.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:38:23.340 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:38:23.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:23.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:23.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:23.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:38:24.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:38:24.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:24.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:24.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:24.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:38:25.252 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:38:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:25.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:25.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:38:26.208 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:38:26.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:38:26.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:38:26.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:38:26.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:38:26.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:38:27.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:38:27.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:38:28.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:38:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:38:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:38:29.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:38:30.033 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:38:30.511 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:38:30.989 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:38:31.467 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:38:31.945 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:38:32.424 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:38:32.902 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:38:33.381 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:38:33.859 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:38:34.337 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:38:34.810 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:38:35.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:38:35.767 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:38:36.245 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:38:36.723 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:38:37.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:37.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:37.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:37.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:37.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:37.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:37.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:37.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:37.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:37.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:37.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:37.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:37.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:37.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:37.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:37.047 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:38:37.048 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:38:37.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:37.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:37.199 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:38:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:38:38.157 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:38:38.636 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:38:39.115 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:38:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:38:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:38:40.552 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:38:41.031 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:38:41.510 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:38:41.988 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:38:42.468 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:38:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:38:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:38:43.905 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:38:44.384 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:38:44.863 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:38:45.342 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:38:45.820 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:38:46.299 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:38:46.778 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:38:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:38:47.737 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:38:48.216 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:38:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:38:49.173 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:38:49.652 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:38:50.130 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:38:50.609 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:38:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:38:51.567 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:38:52.045 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:38:52.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:52.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:52.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:52.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:52.392 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:38:52.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:52.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:52.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:52.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:38:52.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:38:52.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:38:52.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:38:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:52.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:52.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:52.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:38:52.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:38:52.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:38:52.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:38:52.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:52.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:38:52.523 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:38:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:38:53.478 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:38:53.956 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:38:54.434 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:38:54.911 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:38:55.389 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:38:55.867 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:38:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:38:56.823 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:38:57.301 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:38:57.779 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:38:58.257 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:38:58.735 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:38:59.213 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:38:59.691 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:39:00.170 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:39:00.647 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:39:01.125 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:39:01.604 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:39:02.081 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2025-12-12 05:39:02.559 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2025-12-12 05:39:03.037 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2025-12-12 05:39:03.515 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2025-12-12 05:39:03.993 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2025-12-12 05:39:04.471 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2025-12-12 05:39:04.949 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2025-12-12 05:39:05.428 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2025-12-12 05:39:05.905 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2025-12-12 05:39:06.384 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2025-12-12 05:39:06.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:06.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:06.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:06.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:06.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:06.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:06.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:06.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:06.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:06.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:06.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:06.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:06.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:06.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:06.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:39:06.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:39:06.861 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2025-12-12 05:39:06.906 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:39:06.906 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:39:06.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:06.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:07.338 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2025-12-12 05:39:07.816 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2025-12-12 05:39:08.294 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2025-12-12 05:39:08.772 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2025-12-12 05:39:09.250 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2025-12-12 05:39:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2025-12-12 05:39:10.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:10.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:10.122 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:39:10.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:10.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:39:10.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:39:10.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:39:10.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:39:10.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:39:10.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:39:10.127 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:39:15.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:39:15.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:39:15.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:39:15.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:39:15.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:39:15.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:39:15.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:39:15.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:39:15.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:39:15.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:39:15.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:39:15.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:39:15.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:39:15.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:39:15.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:39:15.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:39:15.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:39:15.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:39:15.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:39:15.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:39:15.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:39:15.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:39:15.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:39:15.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:39:15.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:39:15.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:39:15.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:39:15.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:39:15.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:39:15.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:39:15.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:39:15.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:39:15.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:39:15.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:39:15.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:39:15.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:39:15.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:39:15.172 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:39:15.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:39:15.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:39:15.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:39:15.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:39:15.698 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:39:15.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:15.701 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:39:15.702 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:39:15.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:15.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:15.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:15.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:15.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:15.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:15.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:15.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:15.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:15.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:15.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:39:15.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:39:15.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:15.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:15.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:15.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:16.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:39:16.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:16.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:16.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:16.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:16.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:39:17.092 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:39:17.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:17.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:39:18.049 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:39:18.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:18.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:18.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:18.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:39:19.006 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:39:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:19.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:19.484 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:39:19.962 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:39:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:20.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:20.440 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:39:20.919 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:39:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:39:21.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:39:22.353 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:39:22.831 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:39:23.309 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:39:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:39:24.265 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:39:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:39:25.222 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:39:25.700 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:39:26.178 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:39:26.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:26.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:26.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:26.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:26.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:26.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:26.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:26.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:26.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:26.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:26.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:26.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:26.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:26.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:26.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:39:26.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:39:26.460 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:39:26.460 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:39:26.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:26.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:26.656 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:39:27.134 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:39:27.612 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:39:28.091 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:39:28.571 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:39:29.050 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:39:29.529 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:39:30.006 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:39:30.479 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:39:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:39:31.436 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:39:31.914 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:39:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:39:32.872 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:39:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:39:33.830 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:39:34.309 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:39:34.788 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:39:35.267 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:39:35.745 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:39:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:39:36.703 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:39:36.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:36.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:36.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:36.878 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:39:36.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:36.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:36.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:36.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:36.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:36.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:36.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:36.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:36.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:36.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:36.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:39:36.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:39:36.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:36.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:37.181 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:39:37.659 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:39:38.137 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:39:38.614 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:39:39.092 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:39:39.570 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:39:40.048 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:39:40.526 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:39:41.004 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:39:41.481 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:39:41.959 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:39:42.437 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:39:42.915 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:39:43.392 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:39:43.870 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:39:43.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:43.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:43.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:43.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:43.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:43.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:43.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:43.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:43.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:39:43.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:43.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:43.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:39:43.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:39:43.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:39:43.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:39:43.961 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:39:43.961 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:39:43.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:43.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:44.347 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:39:44.825 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2025-12-12 05:39:45.304 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2025-12-12 05:39:45.782 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2025-12-12 05:39:46.261 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2025-12-12 05:39:46.740 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2025-12-12 05:39:47.218 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2025-12-12 05:39:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2025-12-12 05:39:48.176 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2025-12-12 05:39:48.655 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2025-12-12 05:39:49.132 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2025-12-12 05:39:49.611 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2025-12-12 05:39:50.090 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2025-12-12 05:39:50.569 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2025-12-12 05:39:51.047 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2025-12-12 05:39:51.525 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2025-12-12 05:39:52.004 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2025-12-12 05:39:52.482 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2025-12-12 05:39:52.960 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2025-12-12 05:39:53.439 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2025-12-12 05:39:53.917 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2025-12-12 05:39:54.396 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2025-12-12 05:39:54.874 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2025-12-12 05:39:55.353 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2025-12-12 05:39:55.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:39:55.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:39:55.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:39:55.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:39:55.402 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:39:55.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:39:55.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:39:55.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:39:55.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:39:55.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:39:55.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:39:55.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:39:55.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:39:55.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:39:55.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:39:55.423 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:39:55.423 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=8585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:00.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:00.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:00.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:00.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:00.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:00.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:00.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:00.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:00.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:00.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:00.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:40:00.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:40:00.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:40:00.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:00.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:00.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:00.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:40:00.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:00.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:40:00.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:40:00.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:40:00.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:00.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:00.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:00.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:40:00.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:00.455 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:40:00.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:40:00.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:40:00.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:00.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:00.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:00.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:40:00.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:00.460 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:40:00.468 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:40:00.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:40:00.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:40:00.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:40:00.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.469 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:40:00.469 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:40:00.470 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:40:00.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:00.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:00.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:00.474 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:40:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:40:00.998 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:40:01.000 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:40:01.002 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:40:01.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:01.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:01.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:01.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:01.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:01.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:01.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:40:01.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:01.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:01.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:01.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:01.474 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:01.474 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:40:01.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:01.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:01.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:01.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:40:01.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.970 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:01.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:01.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:01.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:01.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:01.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:01.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:01.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:01.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:01.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:01.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:01.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:01.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:02.386 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:40:02.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:02.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:02.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:02.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:02.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:02.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:02.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:02.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:02.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:02.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:02.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:02.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:02.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:02.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:02.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:02.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:02.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:02.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:02.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:02.856 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:02.857 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:40:02.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:02.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:02.863 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:40:03.341 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:40:03.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:03.820 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:40:04.298 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:40:04.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:04.776 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:40:05.255 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:40:05.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:05.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:40:06.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:40:06.690 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:40:06.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:06.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:06.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:06.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:06.910 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:06.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:06.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:06.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:06.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:06.917 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:40:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:06.917 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=1377 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:11.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:11.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:11.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:11.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:11.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:11.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:11.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:11.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:11.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:11.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:11.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:11.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:40:11.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:11.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:11.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:11.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:11.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:11.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:11.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:11.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:40:11.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:40:11.947 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:40:11.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:11.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:40:12.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:40:12.466 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:40:12.467 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:40:12.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:12.469 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:40:12.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:12.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:12.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:12.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:12.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:12.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:12.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:12.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:12.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:12.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:12.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:12.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:12.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:12.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:12.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:12.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:12.911 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:40:12.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:12.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:13.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:40:13.867 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:40:13.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:13.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:14.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:40:14.824 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:40:14.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:14.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:14.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:14.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:15.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:40:15.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:15.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:15.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:15.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:15.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:15.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:15.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:15.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:15.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:15.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:15.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:15.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:15.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:15.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:15.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:15.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:15.769 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:15.769 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:40:15.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:15.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:15.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:40:15.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:15.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:15.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:15.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:16.256 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:40:16.735 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:40:16.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:16.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:16.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:16.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:17.213 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:40:17.692 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:40:18.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:40:18.649 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:40:19.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:19.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:40:19.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:19.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:19.131 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:19.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:19.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:19.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:19.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:19.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:19.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:19.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:19.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:19.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:19.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:19.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:19.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:19.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:19.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:19.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:19.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:40:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:40:20.561 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:40:21.039 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:40:21.517 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:40:21.994 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:40:22.472 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:40:22.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:22.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:22.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:22.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:22.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:22.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:22.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:22.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:22.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:22.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:22.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:22.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:22.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:22.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:22.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:22.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:22.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:22.943 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:40:22.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:22.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:22.949 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:40:23.427 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:40:23.905 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:40:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:40:24.861 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:40:25.340 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:40:25.819 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:40:26.297 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:40:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:40:27.254 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:40:27.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:27.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:27.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:27.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:27.342 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:27.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:27.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:27.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:27.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:27.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:27.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:27.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:27.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:27.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:27.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:27.356 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:40:27.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:27.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:27.357 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:32.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:32.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:32.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:32.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:32.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:32.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:32.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:32.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:32.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:32.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:32.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:40:32.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:40:32.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:40:32.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:32.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:32.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:32.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:40:32.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:32.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:40:32.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:40:32.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:40:32.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:32.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:32.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:32.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:40:32.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:32.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:40:32.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:40:32.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:40:32.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:32.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:32.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:32.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:40:32.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:40:32.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:40:32.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:40:32.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:40:32.388 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:40:32.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:40:32.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:40:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:40:32.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:40:32.904 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:40:32.905 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:40:32.906 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:40:32.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:32.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:32.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:32.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:32.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:32.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:32.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:32.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:32.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:32.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:32.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:32.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:32.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:32.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:32.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:32.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:32.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:33.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:40:33.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:33.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:33.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:33.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:33.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:33.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:33.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:33.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:33.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:33.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:33.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:33.399 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:33.399 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:40:33.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.830 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:40:33.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:33.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.968 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:33.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:33.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:33.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:33.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:33.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:33.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:33.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:33.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:33.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:33.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:34.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:34.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:34.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:34.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:34.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:40:34.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:34.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:34.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:34.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:40:34.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:34.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:34.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:34.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:34.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:34.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:34.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:34.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:34.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:34.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:40:34.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:40:34.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:34.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:40:34.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:40:34.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:40:34.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:40:35.020 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:40:35.020 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:40:35.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:35.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:40:35.261 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:40:35.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:35.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:35.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:35.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:35.740 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:40:36.217 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:40:36.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:36.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:36.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:36.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:40:37.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:40:37.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:37.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:37.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:37.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:37.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:40:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:40:38.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:40:39.088 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:40:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:40:40.045 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:40:40.524 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:40:41.002 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:40:41.481 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:40:41.960 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:40:42.438 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:40:42.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:40:43.395 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:40:43.874 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:40:44.352 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:40:44.831 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:40:45.310 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:40:45.789 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:40:46.267 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:40:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:40:47.224 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:40:47.703 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:40:48.182 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:40:48.660 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:40:49.138 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:40:49.616 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:40:50.094 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:40:50.573 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:40:51.052 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:40:51.530 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:40:52.009 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:40:52.487 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:40:52.965 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:40:53.443 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:40:53.919 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:40:54.398 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:40:54.876 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:40:54.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:40:54.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:40:54.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:40:54.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:40:54.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:40:54.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:40:54.972 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:54.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:54.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:54.974 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:54.974 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=4817 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:40:59.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:40:59.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:40:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:59.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:59.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:40:59.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:59.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:40:59.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:59.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:59.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:40:59.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:40:59.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:40:59.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:40:59.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:59.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:59.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:40:59.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:40:59.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:40:59.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:40:59.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:40:59.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:40:59.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:59.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:40:59.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:40:59.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:40:59.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:40:59.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:00.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:41:00.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:00.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:41:00.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:41:00.008 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:41:00.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:00.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:41:00.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:41:00.530 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:41:00.532 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:41:00.533 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:41:00.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:00.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:00.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:00.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:00.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:00.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:00.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:00.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:00.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:00.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:00.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:00.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:00.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:00.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:00.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:00.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:00.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:00.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:41:01.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:01.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:01.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:01.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:41:01.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:41:02.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:02.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:02.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:02.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:02.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:41:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:41:03.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:03.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:03.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:03.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:03.361 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:41:03.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:03.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:03.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:03.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:03.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:03.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:03.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:03.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:03.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:03.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:03.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:03.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:03.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:03.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:03.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:03.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:03.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:41:03.597 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:41:03.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:03.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:03.838 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:41:04.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:04.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:04.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:04.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:04.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:41:04.795 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:41:05.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:05.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:05.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:05.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:05.274 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:41:05.753 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:41:06.232 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:41:06.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:41:07.188 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:41:07.667 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:41:08.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:41:08.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:08.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:08.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:08.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:08.173 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:41:08.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:08.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:08.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:08.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:08.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:08.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:08.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:08.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:08.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:08.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:08.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:08.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:08.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:08.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:08.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:08.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:08.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:41:09.100 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:41:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:41:10.055 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:41:10.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:41:11.011 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:41:11.488 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:41:11.966 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:41:12.445 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:41:12.923 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:41:13.401 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:41:13.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:41:14.357 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:41:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:41:14.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:14.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:14.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:14.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:15.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:15.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:15.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:15.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:15.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:15.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:15.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:15.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:15.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:15.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:15.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:41:15.071 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:41:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:15.313 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:41:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:41:15.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:15.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:15.876 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:41:15.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:15.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:15.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:15.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:15.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:15.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:15.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:15.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:15.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:41:15.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:41:15.881 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:15.881 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:20.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:41:20.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:41:20.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:20.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:20.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:20.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:20.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:20.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:41:20.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:20.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:41:20.899 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:41:20.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:41:20.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:41:20.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:41:20.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:20.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:20.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:41:20.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:41:20.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:41:20.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:41:20.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:41:20.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:41:20.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:20.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:20.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:41:20.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:41:20.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:20.912 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:41:20.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:20.912 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:41:20.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:41:20.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:41:20.918 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:41:20.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:20.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:20.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:41:21.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:41:21.438 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:41:21.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:21.439 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:41:21.440 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:41:21.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:21.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:21.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:21.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:21.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:21.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:21.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:21.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:21.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:21.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:21.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:21.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:21.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:21.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:21.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:21.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:21.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:41:21.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:21.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:21.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:21.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:22.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:41:22.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:41:22.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:22.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:22.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:22.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:23.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:23.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:23.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:23.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:23.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:23.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:23.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:23.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:23.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:23.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:23.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:23.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:23.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:23.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:23.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:23.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:23.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:41:23.309 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2025-12-12 05:41:23.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:23.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:41:23.792 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:41:23.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:23.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:23.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:23.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:24.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:41:24.750 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:41:24.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:24.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:24.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:24.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:25.229 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:41:25.708 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:41:25.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:25.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:25.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:25.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:26.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:26.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:26.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:26.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:26.074 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:41:26.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:26.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:26.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:26.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:26.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:26.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:26.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:26.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:26.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:26.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:26.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:26.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:26.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:26.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:26.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:26.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:26.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:41:26.664 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:41:27.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:41:27.620 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:41:28.098 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:41:28.576 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:41:29.055 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:41:29.532 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:41:30.009 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:41:30.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:30.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:30.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:30.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:30.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:30.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:30.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:30.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:30.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:41:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:30.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:30.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:41:30.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:41:30.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:41:30.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:41:30.480 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.142.22:6700) Recv SETFH cmd
2025-12-12 05:41:30.480 [INFO] transceiver.py:201 (MS@172.18.142.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2025-12-12 05:41:30.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:30.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:41:30.487 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:41:30.965 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:41:31.444 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:41:31.922 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:41:32.401 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:41:32.879 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:41:33.358 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:41:33.836 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:41:34.315 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:41:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:41:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:41:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:41:36.229 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:41:36.707 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:41:37.186 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2025-12-12 05:41:37.664 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2025-12-12 05:41:38.143 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2025-12-12 05:41:38.641 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2025-12-12 05:41:39.120 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2025-12-12 05:41:39.598 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2025-12-12 05:41:40.077 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2025-12-12 05:41:40.555 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2025-12-12 05:41:41.034 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2025-12-12 05:41:41.512 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2025-12-12 05:41:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2025-12-12 05:41:42.469 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2025-12-12 05:41:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2025-12-12 05:41:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2025-12-12 05:41:43.905 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2025-12-12 05:41:44.384 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2025-12-12 05:41:44.862 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2025-12-12 05:41:45.340 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2025-12-12 05:41:45.819 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2025-12-12 05:41:46.298 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2025-12-12 05:41:46.776 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2025-12-12 05:41:47.254 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2025-12-12 05:41:47.732 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2025-12-12 05:41:48.211 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2025-12-12 05:41:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2025-12-12 05:41:49.166 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2025-12-12 05:41:49.644 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2025-12-12 05:41:50.122 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2025-12-12 05:41:50.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:41:50.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:41:50.429 [INFO] transceiver.py:205 (MS@172.18.142.22:6700) Frequency hopping disabled
2025-12-12 05:41:50.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:50.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:50.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:50.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:50.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:50.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:50.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:50.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:50.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:41:50.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:41:50.436 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (TRX3@172.18.142.20:5700/3) RX TRXD message (ver=1 fn=6292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:50.436 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=6292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:55.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:41:55.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:41:55.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:55.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:55.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:55.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:55.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:55.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:41:55.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:55.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:41:55.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:41:55.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:41:55.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:41:55.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:41:55.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:55.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:55.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:41:55.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:41:55.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:41:55.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:41:55.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:41:55.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:41:55.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:55.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:55.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:41:55.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:41:55.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:55.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:41:55.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:41:55.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:41:55.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:41:55.475 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:41:55.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:41:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:41:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:41:55.999 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:41:56.001 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:41:56.002 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:41:56.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:41:56.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:56.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:56.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:56.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:56.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:41:57.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:41:57.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:41:57.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:41:57.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:41:57.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:41:57.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:41:57.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:41:57.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:41:57.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:41:57.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:41:57.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:41:57.361 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:41:57.361 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:57.362 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:57.362 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:57.362 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:57.362 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:41:57.362 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:02.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:02.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:02.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:02.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:02.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:02.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:02.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:02.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:02.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:02.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:02.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:02.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:02.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:02.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:02.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:02.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:02.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:02.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:02.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:02.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:02.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:02.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:02.384 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:02.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:02.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:02.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:02.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:02.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:02.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:02.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:02.389 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:02.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:02.389 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:02.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:02.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:02.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:02.396 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:02.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:02.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:02.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:02.920 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:02.922 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:02.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:02.924 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:02.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:02.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:02.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:02.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:03.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:03.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:03.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:03.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:03.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:03.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:04.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:04.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:04.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:04.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:04.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:04.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:04.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:04.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:04.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:04.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:04.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:04.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:04.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:04.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:04.296 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:09.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:09.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:09.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:09.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:09.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:09.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:09.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:09.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:09.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:09.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:09.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:09.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:09.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:09.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:09.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:09.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:09.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:09.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:09.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:09.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:09.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:09.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:09.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:09.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:09.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:09.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:09.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:09.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:09.343 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:09.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:09.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:09.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:09.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:09.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:09.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:09.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:09.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:09.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:09.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:09.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:09.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:09.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:09.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:09.362 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:09.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:09.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:09.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:09.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:09.891 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:09.892 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:09.893 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:09.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:09.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:10.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:10.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:10.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:10.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:10.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:11.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:11.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:11.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:11.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:11.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:11.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:11.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:11.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:11.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:11.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:11.251 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:11.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:11.251 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:16.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:16.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:16.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:16.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:16.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:16.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:16.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:16.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:16.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:16.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:16.273 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:16.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:16.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:16.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:16.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:16.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:16.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:16.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:16.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:16.283 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:16.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:16.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:16.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:16.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:16.284 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:16.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:16.284 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:16.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:16.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:16.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:16.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:16.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:16.293 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:16.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:16.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:16.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:16.819 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:16.821 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:16.823 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:16.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:17.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:17.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:17.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:17.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:17.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.736 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:17.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:18.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:18.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:18.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:18.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:18.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:18.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:18.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:18.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:18.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:18.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:18.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:18.169 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:23.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:23.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:23.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:23.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:23.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:23.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:23.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:23.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:23.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:23.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:23.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:23.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:23.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:23.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:23.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:23.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:23.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:23.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:23.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:23.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:23.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:23.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:23.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:23.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:23.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:23.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:23.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:23.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:23.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:23.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:23.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:23.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:23.207 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:23.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:23.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:23.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:23.728 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:23.730 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:23.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:23.731 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:23.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:23.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:24.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:24.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:24.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:24.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:24.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:24.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:24.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:25.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:25.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:25.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:25.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:25.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:25.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:25.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:25.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:25.082 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.082 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:25.083 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:30.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:30.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:30.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:30.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:30.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:30.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:30.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:30.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:30.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:30.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:30.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:30.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:30.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:30.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:30.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:30.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:30.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:30.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:30.110 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:30.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:30.110 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:30.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:30.111 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:30.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:30.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:30.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:30.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:30.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:30.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:30.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:30.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:30.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:30.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:30.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:30.122 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:30.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:30.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:30.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:30.645 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:30.647 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:30.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:30.648 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:30.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:30.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:30.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:30.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:30.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:31.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:31.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:31.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:31.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:31.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:31.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:31.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:32.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:32.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:32.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:32.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:32.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:32.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:32.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:32.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:32.004 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:32.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:32.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:32.004 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:32.005 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:32.005 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:32.005 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:32.005 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:32.005 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:37.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:37.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:37.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:37.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:37.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:37.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:37.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:37.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:37.023 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:37.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:37.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:37.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:37.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:37.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:37.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:37.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:37.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:37.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:37.030 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:37.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:37.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:37.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:37.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:37.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:37.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:37.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:37.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:37.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:37.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:37.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:37.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:37.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:37.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:37.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:37.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:37.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:37.047 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:37.047 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:37.047 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:37.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:37.052 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:37.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:37.573 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:37.575 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:37.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.577 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:37.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:37.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.011 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:42:38.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:38.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:38.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:38.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:38.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.487 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:42:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:38.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:38.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:38.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:38.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:38.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:38.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:38.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:38.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:38.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:38.922 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:38.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:38.922 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:38.922 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:38.922 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:38.922 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:38.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:38.923 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:42:43.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:43.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:43.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:43.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:43.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:43.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:43.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:43.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:43.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:43.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:43.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:43.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:43.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:43.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:43.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:43.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:43.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:43.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:43.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:43.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:43.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:43.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:43.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:43.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:43.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:43.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:43.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:43.950 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:43.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:43.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:44.439 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:44.465 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:44.466 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:44.467 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:44.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:44.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:44.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:44.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:44.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:44.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:44.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:44.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:44.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:44.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:44.526 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:44.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:49.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:49.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:49.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:49.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:49.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:49.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:49.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:49.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:49.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:49.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:49.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:49.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:49.548 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:49.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:49.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:49.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:49.548 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:49.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:49.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:49.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:49.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:49.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:49.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:49.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:49.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:49.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:49.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:49.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:49.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:49.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:49.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:49.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:49.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:49.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:49.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:49.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:49.561 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:49.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:49.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:50.050 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:50.091 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:50.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.095 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:50.098 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:50.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:50.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:50.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:50.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:50.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:50.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:50.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:50.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:50.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:50.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:50.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:50.229 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:42:55.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:55.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:55.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:55.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:55.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:55.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:55.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:55.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:55.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:55.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:42:55.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:42:55.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:42:55.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:42:55.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:55.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:55.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:55.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:42:55.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:42:55.251 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:42:55.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:42:55.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:42:55.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:55.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:55.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:55.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:42:55.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:42:55.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:42:55.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:42:55.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:42:55.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:55.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:42:55.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:42:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:55.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:42:55.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:42:55.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:42:55.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:42:55.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:42:55.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:42:55.258 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:42:55.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:42:55.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:42:55.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:42:55.777 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:42:55.778 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:42:55.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.779 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:42:55.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:42:55.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:42:55.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:42:55.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:42:55.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:42:55.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:42:55.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:42:55.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:42:55.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:42:55.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:42:55.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:42:55.898 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:00.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:00.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:00.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:00.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:00.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:00.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:00.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:00.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:00.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:00.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:00.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:00.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:00.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:00.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:00.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:00.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:00.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:00.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:00.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:00.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:00.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:00.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:00.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:00.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:00.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:00.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:00.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:00.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:00.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:00.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:00.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:00.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:00.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:00.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:00.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:00.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:00.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:00.938 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:00.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:00.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:00.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:01.459 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:01.461 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:01.462 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:01.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:01.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:01.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:01.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:01.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:01.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:01.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:01.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:01.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:01.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:01.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:01.587 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:06.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:06.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:06.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:06.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:06.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:06.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:06.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:06.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:06.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:06.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:06.606 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:06.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:06.612 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:06.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:06.612 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:06.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:06.613 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:06.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:06.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:06.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:06.617 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:06.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:06.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:06.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:06.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:06.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:06.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:06.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:06.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:06.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:06.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:06.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:06.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:06.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:06.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:06.628 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:06.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:06.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:07.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:07.151 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:07.153 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.155 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:07.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:07.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:07.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:07.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:07.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:07.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:07.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:07.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:07.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:07.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:07.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:07.262 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:07.262 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:12.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:12.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:12.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:12.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:12.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:12.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:12.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:12.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:12.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:12.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:12.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:12.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:12.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:12.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:12.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:12.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:12.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:12.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:12.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:12.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:12.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:12.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:12.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:12.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:12.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:12.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:12.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:12.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:12.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:12.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:12.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:12.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:12.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:12.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:12.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:12.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:12.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:12.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:12.312 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:12.312 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:12.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:12.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:12.837 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:12.838 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:12.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.840 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:12.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:12.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:12.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:12.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:12.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:12.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:12.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:12.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:12.963 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:12.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:17.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:17.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:17.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:17.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:17.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:17.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:17.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:17.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:17.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:17.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:17.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:17.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:17.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:17.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:17.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:17.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:17.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:17.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:17.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:18.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:18.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:18.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:18.002 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:18.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:18.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:18.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:18.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:18.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:18.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:18.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:18.007 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:18.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:18.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:18.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:18.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:18.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:18.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:18.014 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:18.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:18.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:18.019 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:18.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:18.540 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:18.541 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:18.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.543 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:18.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:18.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:18.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:18.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:18.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:18.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:18.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:18.665 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:18.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:23.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:23.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:23.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:23.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:23.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:23.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:23.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:23.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:23.681 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:23.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:23.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:23.684 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:23.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:23.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:23.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:23.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:23.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:23.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:23.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:23.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:23.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:23.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:23.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:23.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:23.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:23.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:23.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:23.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:23.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:23.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:23.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:23.694 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:23.694 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:23.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:23.699 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:24.212 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:24.213 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:24.214 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:24.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:24.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:24.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:24.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:24.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:24.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:24.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:24.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:24.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:24.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:43:24.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:25.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:43:25.615 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:43:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:25.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:26.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:43:26.570 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:43:26.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:26.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:26.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:26.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:27.064 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:43:27.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:43:27.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:27.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:27.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:27.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:27.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:27.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:27.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:27.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:27.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:27.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:27.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:27.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:27.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:27.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:27.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:27.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:27.709 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:27.709 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.709 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.710 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:27.711 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:32.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:32.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:32.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:32.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:32.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:32.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:32.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:32.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:32.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:32.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:32.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:32.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:32.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:32.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:32.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:32.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:32.730 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:32.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:32.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:32.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:32.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:32.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:32.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:32.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:32.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:32.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:32.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:32.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:32.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:32.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:32.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:32.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:32.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:32.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:32.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:32.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:32.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:32.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:32.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.744 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:32.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:32.745 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:32.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:32.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:32.749 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:33.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:33.270 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:33.272 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:33.274 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:33.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:33.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:33.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:33.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:33.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:33.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:33.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:33.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:33.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:33.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 05:43:33.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:33.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:33.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:33.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:43:33.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:33.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:33.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:33.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:33.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:33.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:33.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:33.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:33.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:33.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:33.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:33.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:33.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:33.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:33.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:33.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:33.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:33.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:33.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:33.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:33.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:33.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:33.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:33.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:33.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:33.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:33.866 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:33.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.866 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.867 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.868 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:33.868 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:38.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:38.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:38.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:38.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:38.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:38.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:38.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:38.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:38.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:38.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:43:38.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:43:38.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:43:38.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:43:38.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:38.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:38.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:38.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:43:38.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:43:38.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:38.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:43:38.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:43:38.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:38.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:43:38.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:43:38.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:43:38.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:43:38.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:43:38.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:43:38.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:43:38.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:43:38.891 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:43:38.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:43:38.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:43:39.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:43:39.406 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:43:39.407 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:43:39.408 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:43:39.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:39.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:39.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:39.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:39.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:39.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:39.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:39.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:39.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:39.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 05:43:39.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:39.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:39.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:39.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:39.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:39.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:39.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:39.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:39.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:39.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:39.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:39.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:39.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:39.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:39.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:43:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:39.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:39.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:39.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:40.336 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:43:40.814 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:43:40.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:40.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:40.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:40.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:41.292 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:43:41.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2025-12-12 05:43:41.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:41.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:41.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:41.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:42.248 [DEBUG] clck_gen.py:113 IND CLOCK 714
2025-12-12 05:43:42.726 [DEBUG] clck_gen.py:113 IND CLOCK 816
2025-12-12 05:43:42.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:42.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:42.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:42.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:43.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2025-12-12 05:43:43.683 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2025-12-12 05:43:43.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:43.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:43.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:43.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:44.161 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2025-12-12 05:43:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2025-12-12 05:43:45.117 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2025-12-12 05:43:45.595 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2025-12-12 05:43:46.073 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2025-12-12 05:43:46.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2025-12-12 05:43:47.030 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2025-12-12 05:43:47.508 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2025-12-12 05:43:47.986 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2025-12-12 05:43:48.464 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2025-12-12 05:43:48.940 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2025-12-12 05:43:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2025-12-12 05:43:49.893 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2025-12-12 05:43:50.371 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2025-12-12 05:43:50.849 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2025-12-12 05:43:51.327 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2025-12-12 05:43:51.806 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2025-12-12 05:43:52.284 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2025-12-12 05:43:52.762 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2025-12-12 05:43:53.241 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2025-12-12 05:43:53.718 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2025-12-12 05:43:54.196 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2025-12-12 05:43:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2025-12-12 05:43:54.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:54.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:54.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:54.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:43:54.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:43:54.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:43:54.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:43:54.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:43:54.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:43:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:43:55.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:43:55.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:43:55.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:43:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:43:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:43:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:43:55.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:43:55.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:43:55.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:43:55.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:43:55.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:43:55.018 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:55.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:43:55.018 [WARNING] transceiver.py:250 (BTS@172.18.142.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:44:00.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:00.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:00.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:00.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:00.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:00.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:00.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:00.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:00.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:00.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:00.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:44:00.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:44:00.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:44:00.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:00.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:00.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:00.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:44:00.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:00.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:44:00.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:44:00.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:44:00.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:00.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:00.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:00.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:44:00.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:00.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:44:00.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:44:00.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:44:00.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:00.044 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:00.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:00.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:44:00.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:00.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:44:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:44:00.048 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:44:00.048 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:44:00.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:00.053 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:44:00.535 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:44:00.566 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:44:00.567 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:44:00.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:44:00.569 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:44:00.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:00.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:00.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:44:00.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:00.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:00.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:00.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:44:00.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:44:00.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 05:44:00.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:00.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:00.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:00.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:00.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:44:00.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 05:44:00.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:00.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:00.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:00.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:44:00.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:00.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:00.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:00.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:44:00.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:44:00.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:44:00.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:00.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:00.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:44:00.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:44:00.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:44:00.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:44:00.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:00.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:00.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:00.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:00.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:00.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:00.976 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:44:05.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:05.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:05.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:05.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:05.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:05.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:05.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:05.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:05.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:05.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:05.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:44:06.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:44:06.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:44:06.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:06.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:06.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:06.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:44:06.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:06.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:06.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:44:06.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:06.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:06.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:44:06.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:06.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:44:06.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:44:06.008 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:44:06.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:06.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2025-12-12 05:44:06.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2025-12-12 05:44:06.527 [DEBUG] fake_trx.py:273 (BTS@172.18.142.20:5700) Recv FAKE_TOA cmd
2025-12-12 05:44:06.528 [DEBUG] fake_trx.py:292 (BTS@172.18.142.20:5700) Recv FAKE_RSSI cmd
2025-12-12 05:44:06.529 [DEBUG] fake_trx.py:317 (BTS@172.18.142.20:5700) Recv FAKE_CI cmd
2025-12-12 05:44:06.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:44:06.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:06.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:06.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:44:06.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:06.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:06.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:06.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:44:06.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:44:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD HANDOVER
2025-12-12 05:44:06.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:06.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:06.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:06.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:06.974 [DEBUG] clck_gen.py:113 IND CLOCK 204
2025-12-12 05:44:07.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:44:07.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:44:07.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:44:07.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:44:07.453 [DEBUG] clck_gen.py:113 IND CLOCK 306
2025-12-12 05:44:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 408
2025-12-12 05:44:08.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:44:08.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:44:08.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:44:08.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:44:08.410 [DEBUG] clck_gen.py:113 IND CLOCK 510
2025-12-12 05:44:08.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:08.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:08.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:08.611 [WARNING] transceiver.py:250 (MS@172.18.142.22:6700) RX TRXD message (fn=555 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-12 05:44:08.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD ECHO
2025-12-12 05:44:08.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.142.22:6700) Ignore CMD SETSLOT
2025-12-12 05:44:08.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.142.22:6700) Recv RXTUNE cmd
2025-12-12 05:44:08.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.142.22:6700) Recv TXTUNE cmd
2025-12-12 05:44:08.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.142.22:6700) Recv POWERON CMD
2025-12-12 05:44:08.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.142.22:6700) Starting transceiver...
2025-12-12 05:44:08.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD NOHANDOVER
2025-12-12 05:44:08.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.142.22:6700) Recv POWEROFF cmd
2025-12-12 05:44:08.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.142.22:6700) Stopping transceiver...
2025-12-12 05:44:08.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.142.20:5700) Recv SETPOWER cmd
2025-12-12 05:44:08.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.142.20:5700/1) Recv SETPOWER cmd
2025-12-12 05:44:08.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.142.20:5700/2) Recv SETPOWER cmd
2025-12-12 05:44:08.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.142.20:5700/3) Recv SETPOWER cmd
2025-12-12 05:44:08.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:08.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:08.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:08.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:08.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:08.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:08.660 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:44:13.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:13.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:13.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:13.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:13.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:13.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:13.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:13.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:13.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:13.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:13.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:44:13.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:44:13.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:44:13.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:13.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:13.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:13.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:44:13.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:13.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:44:13.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:44:13.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:44:13.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:13.697 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:13.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:13.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:44:13.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:13.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:13.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:44:13.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:13.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:44:13.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:44:13.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:44:13.704 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:44:13.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:13.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:13.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:13.705 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:44:18.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:18.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:18.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:18.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:18.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:18.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:18.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:18.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:18.714 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.142.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:18.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.142.20:5700) Recv SETFORMAT cmd
2025-12-12 05:44:18.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.142.20:5700) TRXD header version 1 -> 1
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.142.20:5700/1) Recv RXTUNE cmd
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.142.20:5700/1) Recv TXTUNE cmd
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:18.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.142.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.142.20:5700/1) Recv NOMTXPOWER cmd
2025-12-12 05:44:18.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.142.20:5700/1) Recv SETFORMAT cmd
2025-12-12 05:44:18.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.142.20:5700/1) TRXD header version 1 -> 1
2025-12-12 05:44:18.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.142.20:5700/2) Recv RXTUNE cmd
2025-12-12 05:44:18.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.142.20:5700/2) Recv TXTUNE cmd
2025-12-12 05:44:18.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:18.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.142.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:18.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:18.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.142.20:5700/2) Recv NOMTXPOWER cmd
2025-12-12 05:44:18.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.142.20:5700/2) Recv SETFORMAT cmd
2025-12-12 05:44:18.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.142.20:5700/2) TRXD header version 1 -> 1
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.142.20:5700/3) Recv RXTUNE cmd
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.142.20:5700/3) Recv TXTUNE cmd
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:18.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.142.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.142.20:5700/3) Recv RFMUTE cmd
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.142.20:5700/3) Recv NOMTXPOWER cmd
2025-12-12 05:44:18.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.142.20:5700/3) Recv SETFORMAT cmd
2025-12-12 05:44:18.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.142.20:5700/3) TRXD header version 1 -> 1
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.142.20:5700) Recv RXTUNE cmd
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETTSC
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETTSC
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETTSC
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.142.20:5700) Recv TXTUNE cmd
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETRXGAIN
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETRXGAIN
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETTSC
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETRXGAIN
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.142.20:5700) Recv NOMTXPOWER cmd
2025-12-12 05:44:18.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.142.20:5700) Recv POWERON CMD
2025-12-12 05:44:18.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.142.20:5700) Starting transceiver...
2025-12-12 05:44:18.723 [INFO] transceiver.py:236 Starting clock generator
2025-12-12 05:44:18.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETRXGAIN
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.142.20:5700/1) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.142.20:5700/1) Recv RFMUTE cmd
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.142.20:5700/2) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.142.20:5700) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.142.20:5700/2) Recv RFMUTE cmd
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.142.20:5700) Recv RFMUTE cmd
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.142.20:5700) Recv POWEROFF cmd
2025-12-12 05:44:18.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.142.20:5700) Stopping transceiver...
2025-12-12 05:44:18.724 [INFO] transceiver.py:239 Stopping clock generator
2025-12-12 05:44:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.142.20:5700/3) Ignore CMD SETSLOT